Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-jun-21-2019' into staging

MIPS queue for June 21st, 2019

# gpg: Signature made Fri 21 Jun 2019 10:46:57 BST
# gpg: usi

Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-jun-21-2019' into staging

MIPS queue for June 21st, 2019

# gpg: Signature made Fri 21 Jun 2019 10:46:57 BST
# gpg: using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65

* remotes/amarkovic/tags/mips-queue-jun-21-2019:
target/mips: Fix emulation of ILVR.<B|H|W> on big endian host
target/mips: Fix emulation of ILVL.<B|H|W> on big endian host
target/mips: Fix emulation of ILVOD.<B|H|W> on big endian host
target/mips: Fix emulation of ILVEV.<B|H|W> on big endian host
tests/tcg: target/mips: Amend tests for MSA pack instructions
tests/tcg: target/mips: Include isa/ase and group name in test output
target/mips: Fix if-else-switch-case arms checkpatch errors in translate.c
target/mips: Fix some space checkpatch errors in translate.c
MAINTAINERS: Consolidate MIPS disassembler-related items
MAINTAINERS: Update file items for MIPS Malta board

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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tests/tcg: target/mips: Include isa/ase and group name in test output

For better appearance and usefullnes, include ISA/ASE name and
instruction group name in the output of tests. For example, all
t

tests/tcg: target/mips: Include isa/ase and group name in test output

For better appearance and usefullnes, include ISA/ASE name and
instruction group name in the output of tests. For example, all
this data will be displayed for FMAX_A.W test:

| MSA | Float Max Min | FMAX_A.W |
| PASS: 80 | FAIL: 0 | elapsed time: 0.16 ms |

(the data will be displayed in one row; they are presented here in two
rows not to exceed the width of the commit message)

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1561031359-6727-2-git-send-email-aleksandar.markovic@rt-rk.com>

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Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-jun-7-2019' into staging

MIPS Queue for June 7th, 2019

# gpg: Signature made Fri 07 Jun 2019 10:59:15 BST
# gpg: using

Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-jun-7-2019' into staging

MIPS Queue for June 7th, 2019

# gpg: Signature made Fri 07 Jun 2019 10:59:15 BST
# gpg: using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65

* remotes/amarkovic/tags/mips-queue-jun-7-2019:
tests/tcg: target/mips: Add README for MSA tests
tests/tcg: target/mips: Add tests for MSA FP max/min instructions
tests/tcg: target/mips: Add utility function reset_msa_registers()
tests/tcg: target/mips: Move four tests to a better location
tests/tcg: target/mips: Add tests for MSA shift instructions
tests/tcg: target/mips: Amend and rearrange MSA wrappers
target/mips: Unroll loops in helpers for MSA logic instructions
target/mips: Outline places for future MSA helpers
target/mips: Fix block-comment-related issues in msa_helper.c
target/mips: Fix space-related format issues in msa_helper.c

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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tests/tcg: target/mips: Add utility function reset_msa_registers()

Add function reset_msa_registers() and utilize it in each MSA test.
This is needed to ensure independency of test results on the st

tests/tcg: target/mips: Add utility function reset_msa_registers()

Add function reset_msa_registers() and utilize it in each MSA test.
This is needed to ensure independency of test results on the state of
MSA registers before test execution. This also allows for correction
of tests for VSHF* instructions, that are now independent on the
previous state of MSA registers.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1559838440-9866-9-git-send-email-aleksandar.markovic@rt-rk.com>

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Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-jun-1-2019' into staging

MIPS queue for June 1st, 2019

# gpg: Signature made Sat 01 Jun 2019 19:20:47 BST
# gpg: using

Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-jun-1-2019' into staging

MIPS queue for June 1st, 2019

# gpg: Signature made Sat 01 Jun 2019 19:20:47 BST
# gpg: using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65

* remotes/amarkovic/tags/mips-queue-jun-1-2019:
target/mips: Improve performance of certain MSA instructions
target/mips: Clean up lmi_helper.c
target/mips: Clean up dsp_helper.c
tests/tcg: target/mips: Add tests for MSA bit set instructions
target/mips: Amend and cleanup MSA TCG tests
target/mips: Add emulation of MMI instruction PCPYUD
target/mips: Add emulation of MMI instruction PCPYLD
target/mips: Add emulation of MMI instruction PCPYH

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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tests/tcg: target/mips: Add tests for MSA bit set instructions

Add tests for MSA bit set instructions. This includes following
instructions:

* BCLR.B - clear bit (bytes)
* BCLR.H - clear bit (h

tests/tcg: target/mips: Add tests for MSA bit set instructions

Add tests for MSA bit set instructions. This includes following
instructions:

* BCLR.B - clear bit (bytes)
* BCLR.H - clear bit (halfwords)
* BCLR.W - clear bit (words)
* BCLR.D - clear bit (doublewords)
* BNEG.B - negate bit (bytes)
* BNEG.H - negate bit (halfwords)
* BNEG.W - negate bit (words)
* BNEG.D - negate bit (doublewords)
* BSET.B - set bit (bytes)
* BSET.H - set bit (halfwords)
* BSET.W - set bit (words)
* BSET.D - set bit (doublewords)

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1555699081-24577-5-git-send-email-aleksandar.markovic@rt-rk.com>

show more ...