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f0984d40 |
| 17-Feb-2023 |
Fabiano Rosas <farosas@suse.de> |
target/arm: move translate modules to tcg/
Introduce the target/arm/tcg directory. Its purpose is to hold the TCG code that is selected by CONFIG_TCG.
Signed-off-by: Claudio Fontana <cfontana@suse.
target/arm: move translate modules to tcg/
Introduce the target/arm/tcg directory. Its purpose is to hold the TCG code that is selected by CONFIG_TCG.
Signed-off-by: Claudio Fontana <cfontana@suse.de> Signed-off-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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23a5e385 |
| 08-Jul-2022 |
Richard Henderson <richard.henderson@linaro.org> |
target/arm: Implement SME integer outer product
This is SMOPA, SUMOPA, USMOPA_s, UMOPA, for both Int8 and Int16.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henders
target/arm: Implement SME integer outer product
This is SMOPA, SUMOPA, USMOPA_s, UMOPA, for both Int8 and Int16.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220708151540.18136-28-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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3916841a |
| 08-Jul-2022 |
Richard Henderson <richard.henderson@linaro.org> |
target/arm: Implement FMOPA, FMOPS (widening)
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220708151540.18136-27-richard.henderson@linaro.org Signed-off-by: Peter Ma
target/arm: Implement FMOPA, FMOPS (widening)
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220708151540.18136-27-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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920f640d |
| 08-Jul-2022 |
Richard Henderson <richard.henderson@linaro.org> |
target/arm: Implement BFMOPA, BFMOPS
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220708151540.18136-26-richard.henderson@linaro.org Signed-off-by: Peter Maydell <pe
target/arm: Implement BFMOPA, BFMOPS
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220708151540.18136-26-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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558e956c |
| 08-Jul-2022 |
Richard Henderson <richard.henderson@linaro.org> |
target/arm: Implement FMOPA, FMOPS (non-widening)
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220708151540.18136-25-richard.henderson@linaro.org Signed-off-by: Pete
target/arm: Implement FMOPA, FMOPS (non-widening)
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220708151540.18136-25-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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bc4420d9 |
| 08-Jul-2022 |
Richard Henderson <richard.henderson@linaro.org> |
target/arm: Implement SME ADDHA, ADDVA
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220708151540.18136-24-richa
target/arm: Implement SME ADDHA, ADDVA
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220708151540.18136-24-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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4c46a5f1 |
| 08-Jul-2022 |
Richard Henderson <richard.henderson@linaro.org> |
target/arm: Implement SME LDR, STR
We can reuse the SVE functions for LDR and STR, passing in the base of the ZA vector and a zero offset.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Sign
target/arm: Implement SME LDR, STR
We can reuse the SVE functions for LDR and STR, passing in the base of the ZA vector and a zero offset.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220708151540.18136-23-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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7390e0e9 |
| 08-Jul-2022 |
Richard Henderson <richard.henderson@linaro.org> |
target/arm: Implement SME LD1, ST1
We cannot reuse the SVE functions for LD[1-4] and ST[1-4], because those functions accept only a Zreg register number. For SME, we want to pass a pointer into ZA s
target/arm: Implement SME LD1, ST1
We cannot reuse the SVE functions for LD[1-4] and ST[1-4], because those functions accept only a Zreg register number. For SME, we want to pass a pointer into ZA storage.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220708151540.18136-21-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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e9ad3ef1 |
| 08-Jul-2022 |
Richard Henderson <richard.henderson@linaro.org> |
target/arm: Implement SME MOVA
We can reuse the SVE functions for implementing moves to/from horizontal tile slices, but we need new ones for moves to/from vertical tile slices.
Reviewed-by: Peter
target/arm: Implement SME MOVA
We can reuse the SVE functions for implementing moves to/from horizontal tile slices, but we need new ones for moves to/from vertical tile slices.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220708151540.18136-20-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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ad939afb |
| 08-Jul-2022 |
Richard Henderson <richard.henderson@linaro.org> |
target/arm: Implement SME ZERO
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220708151540.18136-19-richard.hende
target/arm: Implement SME ZERO
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220708151540.18136-19-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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e67cd1ca |
| 08-Jul-2022 |
Richard Henderson <richard.henderson@linaro.org> |
target/arm: Add infrastructure for disas_sme
This includes the build rules for the decoder, and the new file for translation, but excludes any instructions.
Reviewed-by: Peter Maydell <peter.maydel
target/arm: Add infrastructure for disas_sme
This includes the build rules for the decoder, and the new file for translation, but excludes any instructions.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220708151540.18136-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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