#
fc524567 |
| 24-Apr-2025 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'pull-tcg-20250423' of https://gitlab.com/rth7680/qemu into staging
meson: Introduce top-level libuser_ss and libsystem_ss meson: Add hw_common_arch dictionary accel/tcg: Lots of cleanups
Merge tag 'pull-tcg-20250423' of https://gitlab.com/rth7680/qemu into staging
meson: Introduce top-level libuser_ss and libsystem_ss meson: Add hw_common_arch dictionary accel/tcg: Lots of cleanups to enable build once for: user-exec-stub.c, plugin-gen.c, translator.c page-vary: Restrict scope of TARGET_PAGE_BITS_MIN tcg: Always define TARGET_INSN_START_EXTRA_WORDS tcg: Convert TARGET_GUEST_DEFAULT_MO to TCGCPUOps::guest_default_memory_order tcg: Convert TARGET_SUPPORTS_MTTCG to TCGCPUOps::mttcg_supported field target/riscv: Do not expose rv128 CPU on user mode emulation
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmgJikUdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+t0gf9E9OWD3oQ7NIl+azS # imEFCKwuDxR0g07fH0aM9DW6e01mPQjxe3bmfxuYZbGUu0aJ/WzTbzfkX4qAiPeV # S32e5wwuYOknzDgoI9r8QTFUdelvBgxtVbxyZWJcWZFbLu4oPUhVUvpLJTWaxefo # VUL0g1LgJEYcWnzKFerb9kuiMXeDLsMd4eEX9g4XMAclHEDihND0hPKc3X7sYsmX # N/MtZUY1Zth0c53aq7bP5MBwNIH3tH3o+xAFcBhxiBQ/HxfX7qeNgOTIKo92ApfL # xcQul1AA/q9uQhCKsgfCxZDU4BhcR6sfmCOiDiTTEs+4zlWVDWjWwYtoednhf7ok # v3l9+A== # =qyvX # -----END PGP SIGNATURE----- # gpg: Signature made Wed 23 Apr 2025 20:48:05 EDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-tcg-20250423' of https://gitlab.com/rth7680/qemu: (148 commits) tcg: Convert TARGET_SUPPORTS_MTTCG to TCGCPUOps::mttcg_supported field target/i386: Remove AccelCPUClass::cpu_class_init need target/riscv: Remove AccelCPUClass::cpu_class_init need accel/tcg: Move mttcg warning to tcg_init_machine tcg: Convert TCGState::mttcg_enabled to TriState accel/tcg: Remove mttcg_enabled tcg: Move qemu_tcg_mttcg_enabled() to 'system/tcg.h' tcg: Pass max_threads not max_cpus to tcg_init tcg: Move cpu_req_mo() macro to target-agnostic 'backend-ldst.h' tcg: Remove the TCG_GUEST_DEFAULT_MO definition globally tcg: Have tcg_req_mo() use TCGCPUOps::guest_default_memory_order tcg: Propagate CPUState argument to cpu_req_mo() tcg: Remove use of TCG_GUEST_DEFAULT_MO in tb_gen_code() tcg: Define guest_default_memory_order in TCGCPUOps tcg: Simplify tcg_req_mo() macro tcg: Always define TCG_GUEST_DEFAULT_MO exec: Do not include 'accel/tcg/cpu-ldst.h' in 'exec-all.h' exec: Restrict 'cpu_ldst.h' to accel/tcg/ exec: Restrict 'cpu-ldst-common.h' to accel/tcg/ tcg: Always define TARGET_INSN_START_EXTRA_WORDS ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
8be545ba |
| 12-Mar-2025 |
Richard Henderson <richard.henderson@linaro.org> |
include/system: Move exec/memory.h to system/memory.h
Convert the existing includes with
sed -i ,exec/memory.h,system/memory.h,g
Move the include within cpu-all.h into a !CONFIG_USER_ONLY block.
include/system: Move exec/memory.h to system/memory.h
Convert the existing includes with
sed -i ,exec/memory.h,system/memory.h,g
Move the include within cpu-all.h into a !CONFIG_USER_ONLY block.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
b1b15855 |
| 12-Jan-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-request-2024-01-11' of https://gitlab.com/thuth/qemu into staging
* Fix non-deterministic failures of the 'netdev-socket' qtest * Fix device presence checking in the virtio-ccw qtest
Merge tag 'pull-request-2024-01-11' of https://gitlab.com/thuth/qemu into staging
* Fix non-deterministic failures of the 'netdev-socket' qtest * Fix device presence checking in the virtio-ccw qtest * Support codespell checking in checkpatch.pl * Fix emulation of LAE s390x instruction * Work around htags bug when environment is large * Some other small clean-ups here and there
# -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmWgHlgRHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbXAnBAAjQve/Jmfp9p8eQmswG7cl/a2TuJ59b9X # SFRja2PprV/Wp4kxxEJX4er9F2+rlMusNL62LBp/QjZi9u4lCvCmuB7sMa0wEkjr # BPPBrkxkAT+/8vhGpYg2GrxZv/UOLkycp3sjEp4v5yXWQw+OEBnkZZ+AuHddpnEr # NKMKss71uQmccvuzD5FMDfbJQcSBD/yGPyFfDrv1RKreYRlbkEDVlcVoZpfoMwQY # Pl167iDdmjVtsT+4wf8vHo5W/AYKDOjlV6AoujCnJVZnGx6BtDLiF/iNJ/VU1Ty5 # cRxySPT64HG+cGrbRqz9IjDvs++WW5EQn1jPY8NO2XFz3sney6Cs/pLKjqJY9S7P # kfOXOBZG3zOI1kgd/CSR5b4szg4XvtTZaupczKiGOpYC9klf0oQNXGU5jXi3Csop # Q332oUgiPeNdOx/4tXobFX6RwVCqLRYZbHx9RRYSxWlqJJPAB74/n+RZsmOtsxuJ # RaiPKDmbVlslkUm78gIa5e6DMwDk2wmlkqa64W7VZxyqfQTRDPiPvfMGePkj6tmZ # h9vUsELwwORlHpZyL08n0fzs3aeIYwzPwhfr+5iQZIawIp4Zqo8i8Lic/WfIlok9 # rmPIA0mjs1VtrUsroItw4NcY04xcVa7hkhz4EbkZROrfGamdkLuvbk2OKuOeoL0U # lpgtQL6jA7E= # =F/j2 # -----END PGP SIGNATURE----- # gpg: Signature made Thu 11 Jan 2024 16:59:04 GMT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5
* tag 'pull-request-2024-01-11' of https://gitlab.com/thuth/qemu: .gitlab-ci.d/buildtest.yml: Work around htags bug when environment is large tests/tcg/s390x: Test LOAD ADDRESS EXTENDED target/s390x: Fix LAE setting a wrong access register scripts/checkpatch: Support codespell checking hw/s390x/ccw: Replace dirname() with g_path_get_dirname() hw/s390x/ccw: Replace basename() with g_path_get_basename() target/s390x/kvm/pv: Provide some more useful information if decryption fails gitlab: fix s390x tag for avocado-system-centos tests/qtest/virtio-ccw: Fix device presence checking qtest: ensure netdev-socket tests have non-overlapping names net: handle QIOTask completion to report useful error message net: add explicit info about connecting/listening state Revert "tests/qtest/netdev-socket: Raise connection timeout to 120 seconds" Revert "osdep: add getloadavg" Revert "netdev: set timeout depending on loadavg" qtest: use correct boolean type for failover property q800: move dp8393x_prom memory region to Q800MachineState
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
eea9f763 |
| 27-Dec-2023 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
q800: move dp8393x_prom memory region to Q800MachineState
There is no need to dynamically allocate the memory region from the heap.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> M
q800: move dp8393x_prom memory region to Q800MachineState
There is no need to dynamically allocate the memory region from the heap.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-ID: <20231227210212.245106-1-mark.cave-ayland@ilande.co.uk> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Thomas Huth <thuth@redhat.com>
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#
f7294103 |
| 09-Oct-2023 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'q800-for-8.2-pull-request' of https://github.com/vivier/qemu-m68k into staging
Pull request q800 20231008
add support for booting: - MacOS 7.1 - 8.1, with or without virtual memory ena
Merge tag 'q800-for-8.2-pull-request' of https://github.com/vivier/qemu-m68k into staging
Pull request q800 20231008
add support for booting: - MacOS 7.1 - 8.1, with or without virtual memory enabled - A/UX 3.0.1 - NetBSD 9.3 - Linux (via EMILE)
# -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAmUiSrISHGxhdXJlbnRA # dml2aWVyLmV1AAoJEPMMOL0/L748oSUQAKAm3TPYQUDDVFTi2uhzv6IgNSgOVUhK # 3I3xoNb0UR9AT3Wfg1fah5La3p0kL9Y25gvhCl6veUg39WVicv3fbqUevbJ1Nwgl # ovwS3MRRcvYhU+omcXImFfoIPyOxfSf3vZ6SedIkB24hQyXN9eFBZMfgCODU6lfo # rAd/Hm50N2jRI8aKjvN+uHFRz75wqq6rNk/4QLWihRqhtWrjUDPHOTMI9sQxWy9z # LcXxVKbWCY8/WOAandsGL94l2jfu94HM6CfwHaumdxvPBZT6WUyCv3T1rJsVJU29 # b8oTLcwKAmZ7lGLbjl6GdB8q5KAJFCAGLWuEbNIMj0orB37OpUd0Wx2SD9+aA53H # yoKGbk6N1UappTtcnZCfwzWRzNaXrRno+w+/xYjlKsXBdHV9ZXHMGD5ERxoC6MY7 # ISsCa4bafeUDes6SCetgq87ho69E8l+gAlNYPgidHaTP226BjrYWQRJIa0leczfO # aE6dAG7MQFOnOjeOHEJMDB2XpKHiVe1lyVGQH485cLW1J6LHJFWUfUUH2Zjs1v1z # eXZHBTclPO2wbuQzXG6pAz2jdF/9w4ft/aA0PQhQcFxa9RB6AoNFG/juHJN5eUiw # NXJetR2g1juNPqmMFWDNMJ7Zzce5Chjoj69XJBFYSXhgbOtwpUpoEPZUeIMcW1eJ # Va2HvyDQPp1B # =RUHg # -----END PGP SIGNATURE----- # gpg: Signature made Sun 08 Oct 2023 02:22:42 EDT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C
* tag 'q800-for-8.2-pull-request' of https://github.com/vivier/qemu-m68k: mac_via: extend timer calibration hack to work with A/UX q800: add alias for MacOS toolbox ROM at 0x40000000 q800: add ESCC alias at 0xc000 mac_via: always clear ADB interrupt when switching to A/UX mode mac_via: implement ADB_STATE_IDLE state if shift register in input mode mac_via: workaround NetBSD ADB bus enumeration issue mac_via: work around underflow in TimeDBRA timing loop in SETUPTIMEK swim: update IWM/ISM register block decoding swim: split into separate IWM and ISM register blocks swim: add trace events for IWM and ISM registers q800: add easc bool machine class property to switch between ASC and EASC q800: add Apple Sound Chip (ASC) audio to machine asc: generate silence if FIFO empty but engine still running audio: add Apple Sound Chip (ASC) emulation q800: allow accesses to RAM area even if less memory is available q800: add IOSB subsystem q800: implement additional machine id bits on VIA1 port A q800: add machine id register q800: add djMEMC memory controller q800-glue.c: convert to Resettable interface
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
9d35c6ad |
| 04-Oct-2023 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
q800: add alias for MacOS toolbox ROM at 0x40000000
According to the Apple Quadra 800 Developer Note document, the Quadra 800 ROM consists of 2 ROM code sections based at offsets 0x0 and 0x800000. A
q800: add alias for MacOS toolbox ROM at 0x40000000
According to the Apple Quadra 800 Developer Note document, the Quadra 800 ROM consists of 2 ROM code sections based at offsets 0x0 and 0x800000. A/UX attempts to access the toolbox ROM at the lower offset during startup, so provide a memory alias to allow the access to succeed.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-ID: <20231004083806.757242-20-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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#
7685fc2a |
| 04-Oct-2023 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
q800: add ESCC alias at 0xc000
Tests on real Q800 hardware show that the ESCC is addressable at multiple locations within the ESCC memory region - at least 0xc000, 0xc020 (as expected by the MacOS t
q800: add ESCC alias at 0xc000
Tests on real Q800 hardware show that the ESCC is addressable at multiple locations within the ESCC memory region - at least 0xc000, 0xc020 (as expected by the MacOS toolbox ROM) and 0xc040.
All released NetBSD kernels before 10 use the 0xc000 address which causes a fatal error when running the MacOS booter. Add a single memory region alias at 0xc000 to enable NetBSD kernels to start booting under QEMU.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-ID: <20231004083806.757242-19-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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#
7afc4356 |
| 04-Oct-2023 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
q800: add easc bool machine class property to switch between ASC and EASC
This determines whether the Apple Sound Chip (ASC) is set to enhanced mode (default) or to original mode. The real Q800 hard
q800: add easc bool machine class property to switch between ASC and EASC
This determines whether the Apple Sound Chip (ASC) is set to enhanced mode (default) or to original mode. The real Q800 hardware used an EASC chip however a lot of older software only works with the older ASC chip.
Adding this as a machine parameter allows QEMU to be used as an developer aid for testing and migrating code from ASC to EASC.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-ID: <20231004083806.757242-11-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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#
9983f6e1 |
| 04-Oct-2023 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
q800: add Apple Sound Chip (ASC) audio to machine
The Quadra 800 has the enhanced ASC (EASC) audio chip which supports both the legacy IRQ routing through VIA2 and also "A/UX" mode routing direct to
q800: add Apple Sound Chip (ASC) audio to machine
The Quadra 800 has the enhanced ASC (EASC) audio chip which supports both the legacy IRQ routing through VIA2 and also "A/UX" mode routing direct to the CPU.
Co-developed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-ID: <20231004083806.757242-10-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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#
6997f26d |
| 04-Oct-2023 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
q800: allow accesses to RAM area even if less memory is available
MacOS attempts a series of writes and reads over the entire RAM area in order to determine the amount of RAM within the machine. All
q800: allow accesses to RAM area even if less memory is available
MacOS attempts a series of writes and reads over the entire RAM area in order to determine the amount of RAM within the machine. Allow accesses to the entire RAM area ignoring writes and always reading zero for areas where there is no physical RAM installed to allow MacOS to detect the memory size without faulting.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-ID: <20231004083806.757242-7-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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#
bdc2c77d |
| 04-Oct-2023 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
q800: add IOSB subsystem
It is needed because it defines the BIOSConfig area.
Co-developed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Rev
q800: add IOSB subsystem
It is needed because it defines the BIOSConfig area.
Co-developed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Message-ID: <20231004083806.757242-6-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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#
e993af36 |
| 04-Oct-2023 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
q800: add machine id register
MacOS reads this address to identify the hardware.
This is a basic implementation returning the ID of Quadra 800.
Details:
http://mess.redump.net/mess/driver_info/
q800: add machine id register
MacOS reads this address to identify the hardware.
This is a basic implementation returning the ID of Quadra 800.
Details:
http://mess.redump.net/mess/driver_info/mac_technical_notes
"There are 3 ID schemes [...] The third and most scalable is a machine ID register at 0x5ffffffc. The top word must be 0xa55a to be valid. Then bits 15-11 are 0 for consumer Macs, 1 for portables, 2 for high-end 68k, and 3 for high-end PowerPC. Bit 10 is 1 if additional ID bits appear elsewhere (e.g. in VIA1). The rest of the bits are a per-model identifier.
Model Lower 16 bits of ID ... Quadra/Centris 610/650/800 0x2BAD"
Co-developed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231004083806.757242-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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#
e2fd695e |
| 04-Oct-2023 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
q800: add djMEMC memory controller
The djMEMC controller is used to store information related to the physical memory configuration.
Co-developed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by
q800: add djMEMC memory controller
The djMEMC controller is used to store information related to the physical memory configuration.
Co-developed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231004083806.757242-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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#
b455ce4c |
| 22-Jun-2023 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'q800-for-8.1-pull-request' of https://github.com/vivier/qemu-m68k into staging
Q800 branch pull request 20230622
Cleanup to introduce support of MacOS Classic
# -----BEGIN PGP SIGNATURE
Merge tag 'q800-for-8.1-pull-request' of https://github.com/vivier/qemu-m68k into staging
Q800 branch pull request 20230622
Cleanup to introduce support of MacOS Classic
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* tag 'q800-for-8.1-pull-request' of https://github.com/vivier/qemu-m68k: (24 commits) mac_via: fix rtc command decoding for the PRAM seconds registers mac_via: fix rtc command decoding from PRAM addresses 0x0 to 0xf q800: move macfb device to Q800MachineState q800: don't access Nubus bus directly from the mac-nubus-bridge device q800: move mac-nubus-bridge device to Q800MachineState q800: move SWIM device to Q800MachineState q800: move ESP device to Q800MachineState q800: move escc_orgate device to Q800MachineState q800: move ESCC device to Q800MachineState q800: move dp8393x device to Q800MachineState hw/net/dp8393x.c: move TYPE_DP8393X and dp8393xState into dp8393x.h q800: move VIA2 device to Q800MachineState q800: move VIA1 device to Q800MachineState q800: reimplement mac-io region aliasing using IO memory region q800: introduce mac-io container memory region q800: move GLUE device to Q800MachineState q800-glue.c: switch TypeInfo registration to use DEFINE_TYPES() macro q800: move GLUE device into separate q800-glue.c file q800: move ROM memory region to Q800MachineState q800: move CPU object into Q800MachineState ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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7a1f3acb |
| 21-Jun-2023 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
q800: move macfb device to Q800MachineState
Also change the instantiation of the macfb device to use object_initialize_child().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Revie
q800: move macfb device to Q800MachineState
Also change the instantiation of the macfb device to use object_initialize_child().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20230621085353.113233-23-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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36df1c5a |
| 21-Jun-2023 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
q800: move mac-nubus-bridge device to Q800MachineState
Also change the instantiation of the mac-nubus-bridge device to use object_initialize_child() and map the Nubus address space using memory_regi
q800: move mac-nubus-bridge device to Q800MachineState
Also change the instantiation of the mac-nubus-bridge device to use object_initialize_child() and map the Nubus address space using memory_region_add_subregion() instead of sysbus_mmio_map().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230621085353.113233-21-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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01f35a4f |
| 21-Jun-2023 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
q800: move SWIM device to Q800MachineState
Also change the instantiation of the SWIM device to use object_initialize_child().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewe
q800: move SWIM device to Q800MachineState
Also change the instantiation of the SWIM device to use object_initialize_child().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20230621085353.113233-20-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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e78d17ca |
| 21-Jun-2023 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
q800: move ESP device to Q800MachineState
Also change the instantiation of the ESP device to use object_initialize_child().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-
q800: move ESP device to Q800MachineState
Also change the instantiation of the ESP device to use object_initialize_child().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20230621085353.113233-19-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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1a7a3f00 |
| 21-Jun-2023 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
q800: move escc_orgate device to Q800MachineState
Also change the instantiation of the escc_orgate device to use object_initialize_child().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.
q800: move escc_orgate device to Q800MachineState
Also change the instantiation of the escc_orgate device to use object_initialize_child().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20230621085353.113233-18-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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836126c7 |
| 21-Jun-2023 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
q800: move ESCC device to Q800MachineState
Also change the instantiation of the ESCC device to use object_initialize_child().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewe
q800: move ESCC device to Q800MachineState
Also change the instantiation of the ESCC device to use object_initialize_child().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20230621085353.113233-17-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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804ae67e |
| 21-Jun-2023 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
q800: move dp8393x device to Q800MachineState
Also change the instantiation of the dp8393x device to use object_initialize_child().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> C
q800: move dp8393x device to Q800MachineState
Also change the instantiation of the dp8393x device to use object_initialize_child().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> CC: Jason Wang <jasowang@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20230621085353.113233-16-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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d7942e16 |
| 21-Jun-2023 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
q800: move VIA2 device to Q800MachineState
Also change the instantiation of the VIA2 device to use object_initialize_child().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewe
q800: move VIA2 device to Q800MachineState
Also change the instantiation of the VIA2 device to use object_initialize_child().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20230621085353.113233-14-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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6d32c064 |
| 21-Jun-2023 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
q800: move VIA1 device to Q800MachineState
Also change the instantiation of the VIA1 device to use object_initialize_child().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewe
q800: move VIA1 device to Q800MachineState
Also change the instantiation of the VIA1 device to use object_initialize_child().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20230621085353.113233-13-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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f18a2886 |
| 21-Jun-2023 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
q800: reimplement mac-io region aliasing using IO memory region
The current use of aliased memory regions causes us 2 problems: firstly the output of "info qom-tree" is absolutely huge and difficult
q800: reimplement mac-io region aliasing using IO memory region
The current use of aliased memory regions causes us 2 problems: firstly the output of "info qom-tree" is absolutely huge and difficult to read, and secondly we have already reached the internal limit for memory regions as adding any new memory region into the mac-io region causes QEMU to assert with "phys_section_add: Assertion `map->sections_nb < TARGET_PAGE_SIZE' failed".
Implement the mac-io region aliasing using a single IO memory region that applies IO_SLICE_MASK representing the maximum size of the aliased region and then forwarding the access to the existing mac-io memory region using the address space API.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20230621085353.113233-12-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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7527c52f |
| 21-Jun-2023 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
q800: introduce mac-io container memory region
Move all devices from the IO region to within the container in preparation for updating the IO aliasing mechanism.
Signed-off-by: Mark Cave-Ayland <ma
q800: introduce mac-io container memory region
Move all devices from the IO region to within the container in preparation for updating the IO aliasing mechanism.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230621085353.113233-11-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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