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ae2b5d83 |
| 08-Feb-2023 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-include-2023-02-06-v2' of https://repo.or.cz/qemu/armbru into staging
Header cleanup patches for 2023-02-06
# -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEENUvIs9frKmtoZ05fOHC0A
Merge tag 'pull-include-2023-02-06-v2' of https://repo.or.cz/qemu/armbru into staging
Header cleanup patches for 2023-02-06
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* tag 'pull-include-2023-02-06-v2' of https://repo.or.cz/qemu/armbru: Drop duplicate #include Don't include headers already included by qemu/osdep.h Fix non-first inclusions of qemu/osdep.h accel: Clean up includes block: Clean up includes riscv: Clean up includes target/hexagon: Clean up includes net: Clean up includes migration: Clean up includes qga: Clean up includes hw/tricore: Clean up includes hw/input: Clean up includes hw/cxl: Clean up includes crypto: Clean up includes bsd-user: Clean up includes scripts/clean-includes: Improve --git commit message scripts/clean-includes: Skip symbolic links scripts/clean-includes: Don't claim duplicate headers found when not scripts/clean-includes: Fully skip / ignore files
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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d90b1e42 |
| 02-Feb-2023 |
Markus Armbruster <armbru@redhat.com> |
hw/cxl: Clean up includes
This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three related cleanups:
* Ensure .c files include qemu
hw/cxl: Clean up includes
This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three related cleanups:
* Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise, including headers qemu/osdep.h includes is redundant. Drop these, too.
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20230202133830.2152150-8-armbru@redhat.com> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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#
30796f55 |
| 11-Jun-2022 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'for_upstream' of git://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
virtio,pc,pci: fixes,cleanups,features
more CXL patches VIOT Igor's huge AML rework fixes, cleanups all over
Merge tag 'for_upstream' of git://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
virtio,pc,pci: fixes,cleanups,features
more CXL patches VIOT Igor's huge AML rework fixes, cleanups all over the place
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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* tag 'for_upstream' of git://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (53 commits) hw/vhost-user-scsi|blk: set `supports_config` flag correctly hw/virtio/vhost-user: don't use uninitialized variable tests/acpi: virt: update golden masters for VIOT hw/acpi/viot: sort VIOT ACPI table entries by PCI host bridge min_bus tests/acpi: virt: allow VIOT acpi table changes hw/acpi/viot: build array of PCI host bridges before generating VIOT ACPI table hw/acpi/viot: move the individual PCI host bridge entry generation to a new function hw/acpi/viot: rename build_pci_range_node() to enumerate_pci_host_bridges() hw/cxl: Fix missing write mask for HDM decoder target list registers pci: fix overflow in snprintf string formatting hw/machine: Drop cxl_supported flag as no longer useful hw/cxl: Move the CXLState from MachineState to machine type specific state. tests/acpi: Update q35/CEDT.cxl for new memory addresses. pci/pci_expander_bridge: For CXL HB delay the HB register memory region setup. tests/acpi: Allow modification of q35 CXL CEDT table. hw/cxl: Push linking of CXL targets into i386/pc rather than in machine.c hw/acpi/cxl: Pass in the CXLState directly rather than MachineState hw/cxl: Make the CXL fixed memory window setup a machine parameter. x86: acpi-build: do not include hw/isa/isa.h directly tests: acpi: update expected DSDT.tis.tpm2/DSDT.tis.tpm12 blobs ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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7bd1900b |
| 08-Jun-2022 |
Jonathan Cameron <Jonathan.Cameron@huawei.com> |
pci/pci_expander_bridge: For CXL HB delay the HB register memory region setup.
As the CXLState will no long be accessible via MachineState at time of PXB_CXL realization, come back later from the ma
pci/pci_expander_bridge: For CXL HB delay the HB register memory region setup.
As the CXLState will no long be accessible via MachineState at time of PXB_CXL realization, come back later from the machine specific code to fill in the missing memory region setup. Only at this stage is it possible to check if cxl=on, so that check is moved to this later point.
Note that for multiple host bridges, the allocation order of the register spaces is changed. This will be reflected in ACPI CEDT.
Stubs are added to handle case of CONFIG_PXB=n for machines that call these functions.
The bus walking logic is common to all machines so add a utility function + stub to cxl-host*.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Message-Id: <20220608145440.26106-6-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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#
dab390ff |
| 08-Jun-2022 |
Jonathan Cameron <Jonathan.Cameron@huawei.com> |
hw/cxl: Push linking of CXL targets into i386/pc rather than in machine.c
Whilst here take the oportunity to shorten the function name.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
hw/cxl: Push linking of CXL targets into i386/pc rather than in machine.c
Whilst here take the oportunity to shorten the function name.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Message-Id: <20220608145440.26106-4-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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03b39fcf |
| 08-Jun-2022 |
Jonathan Cameron <Jonathan.Cameron@huawei.com> |
hw/cxl: Make the CXL fixed memory window setup a machine parameter.
Paolo Bonzini requested this change to simplify the ongoing effort to allow machine setup entirely via RPC.
Includes shortening t
hw/cxl: Make the CXL fixed memory window setup a machine parameter.
Paolo Bonzini requested this change to simplify the ongoing effort to allow machine setup entirely via RPC.
Includes shortening the command line form cxl-fixed-memory-window to cxl-fmw as the command lines are extremely long even with this change.
The json change is needed to ensure that there is a CXLFixedMemoryWindowOptionsList even though the actual element in the json is never used. Similar to existing SgxEpcProperties.
Update qemu-options.hx to reflect that this is now a -machine parameter. The bulk of -M / -machine parameters are documented under machine, so use that in preference to M.
Update cxl-test and bios-tables-test to reflect new parameters.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Davidlohr Bueso <dave@stgolabs.net> Message-Id: <20220608145440.26106-2-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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