#
d762bf97 |
| 03-Nov-2023 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'pull-target-arm-20231102' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * linux-user/elfload: Add missing arm64 hwcap values * stellaris-gamepad: Con
Merge tag 'pull-target-arm-20231102' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * linux-user/elfload: Add missing arm64 hwcap values * stellaris-gamepad: Convert to qdev * docs/specs: Convert various txt docs to rST * MAINTAINERS: Make sure that gicv3_internal.h is covered, too * hw/arm/pxa2xx_gpio: Pass CPU using QOM link property * hw/watchdog/wdt_imx2: Trace MMIO access and timer activity * hw/misc/imx7_snvs: Trace MMIO access * hw/misc/imx6_ccm: Convert DPRINTF to trace events * hw/i2c/pm_smbus: Convert DPRINTF to trace events * target/arm: Enable FEAT_MOPS insns in user-mode emulation * linux-user: Report AArch64 hwcap2 fields above bit 31 * target/arm: Make FEAT_MOPS SET* insns handle Xs == XZR correctly * target/arm: Fix SVE STR increment * hw/char/stm32f2xx_usart: implement TX interrupts * target/arm: Correctly propagate stage 1 BTI guarded bit in a two-stage walk * xlnx-versal-virt: Add AMD/Xilinx TRNG device
* tag 'pull-target-arm-20231102' of https://git.linaro.org/people/pmaydell/qemu-arm: (33 commits) tests/qtest: Introduce tests for AMD/Xilinx Versal TRNG device hw/arm: xlnx-versal-virt: Add AMD/Xilinx TRNG device hw/misc: Introduce AMD/Xilix Versal TRNG device target/arm: Correctly propagate stage 1 BTI guarded bit in a two-stage walk hw/char/stm32f2xx_usart: Add more definitions for CR1 register hw/char/stm32f2xx_usart: Update IRQ when DR is written hw/char/stm32f2xx_usart: Extract common IRQ update code to update_irq() target/arm: Fix SVE STR increment target/arm: Make FEAT_MOPS SET* insns handle Xs == XZR correctly linux-user: Report AArch64 hwcap2 fields above bit 31 target/arm: Enable FEAT_MOPS insns in user-mode emulation hw/i2c/pm_smbus: Convert DPRINTF to trace events hw/misc/imx6_ccm: Convert DPRINTF to trace events hw/misc/imx7_snvs: Trace MMIO access hw/watchdog/wdt_imx2: Trace timer activity hw/watchdog/wdt_imx2: Trace MMIO access hw/arm/pxa2xx_gpio: Pass CPU using QOM link property MAINTAINERS: Make sure that gicv3_internal.h is covered, too docs/specs/vmgenid: Convert to rST docs/specs/vmcoreinfo: Convert to rST ...
Conflicts: hw/input/stellaris_input.c The qdev conversion in this pull request ("stellaris-gamepad: Convert to qdev") eliminates the vmstate_register() call that was converted to vmstate_register_any() in the conflicting migration pull request. vmstate_register_any() is no longer necessary now that this device has been converted to qdev, so take this pull request's version of stellaris_gamepad.c over the previous pull request's stellaris_input.c (the file was renamed).
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
e9f30b1e |
| 30-Oct-2023 |
Hans-Erik Floryd <hans-erik.floryd@rt-labs.com> |
hw/char/stm32f2xx_usart: Add more definitions for CR1 register
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Alist
hw/char/stm32f2xx_usart: Add more definitions for CR1 register
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Hans-Erik Floryd <hans-erik.floryd@rt-labs.com> Message-id: 20231030151528.1138131-4-hans-erik.floryd@rt-labs.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
4dad0a9a |
| 21-Sep-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging
QOM queue, 2020-09-18
Fixes: * Error value corrections (Markus Armbruster) * Correct object_class_dynamic
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging
QOM queue, 2020-09-18
Fixes: * Error value corrections (Markus Armbruster) * Correct object_class_dynamic_cast_assert() documentation (Eduardo Habkost) * Ensure objects using QEMU_ALIGNED are properly aligned (Richard Henderson)
QOM cleanups (Eduardo Habkost): * Rename some constants * Simplify parameters of OBJECT_DECLARE* macros * Additional DECLARE_*CHECKER* usage * Additional OBJECT_DECLARE_TYPE usage * Additional OBJECT_DECLARE_SIMPLE_TYPE usage
# gpg: Signature made Fri 18 Sep 2020 21:45:29 BST # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6
* remotes/ehabkost/tags/machine-next-pull-request: Use OBJECT_DECLARE_SIMPLE_TYPE when possible Use OBJECT_DECLARE_TYPE when possible qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros qom: Remove ParentClassType argument from OBJECT_DECLARE_SIMPLE_TYPE scripts/codeconverter: Update to latest version target/s390x: Set instance_align on S390CPU TypeInfo target/riscv: Set instance_align on RISCVCPU TypeInfo target/ppc: Set instance_align on PowerPCCPU TypeInfo target/arm: Set instance_align on CPUARM TypeInfo qom: Allow objects to be allocated with increased alignment qom: Correct error values in two contracts qom: Clean up object_property_get_enum()'s error value qom: Correct object_class_dynamic_cast_assert() documentation sifive: Use DECLARE_*CHECKER* macros sifive: Move QOM typedefs and add missing includes sifive_u: Rename memmap enum constants sifive_e: Rename memmap enum constants
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
8063396b |
| 16-Sep-2020 |
Eduardo Habkost <ehabkost@redhat.com> |
Use OBJECT_DECLARE_SIMPLE_TYPE when possible
This converts existing DECLARE_INSTANCE_CHECKER usage to OBJECT_DECLARE_SIMPLE_TYPE when possible.
$ ./scripts/codeconverter/converter.py -i \ --patte
Use OBJECT_DECLARE_SIMPLE_TYPE when possible
This converts existing DECLARE_INSTANCE_CHECKER usage to OBJECT_DECLARE_SIMPLE_TYPE when possible.
$ ./scripts/codeconverter/converter.py -i \ --pattern=AddObjectDeclareSimpleType $(git grep -l '' -- '*.[ch]')
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Acked-by: Paul Durrant <paul@xen.org> Message-Id: <20200916182519.415636-6-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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#
f4ef8c9c |
| 11-Sep-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging
QOM boilerplate cleanup
Documentation build fix: * memory: Remove kernel-doc comment marker (Eduardo Habk
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging
QOM boilerplate cleanup
Documentation build fix: * memory: Remove kernel-doc comment marker (Eduardo Habkost)
QOM cleanups: * Rename QOM macros for consistency between TYPE_* and type checking constants (Eduardo Habkost)
QOM new macros: * OBJECT_DECLARE_* and OBJECT_DEFINE_* macros (Daniel P. Berrangé) * DECLARE_*_CHECKER macros (Eduardo Habkost)
Automated QOM boilerplate changes: * Automated changes to use DECLARE_*_CHECKER (Eduardo Habkost * Automated changes to use OBJECT_DECLARE* (Eduardo Habkost)
# gpg: Signature made Thu 10 Sep 2020 19:17:49 BST # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6
* remotes/ehabkost/tags/machine-next-pull-request: (33 commits) virtio-vga: Use typedef name for instance_size vhost-user-vga: Use typedef name for instance_size xilinx_axienet: Use typedef name for instance_size lpc_ich9: Use typedef name for instance_size omap_intc: Use typedef name for instance_size xilinx_axidma: Use typedef name for instance_size tusb6010: Rename TUSB to TUSB6010 pc87312: Rename TYPE_PC87312_SUPERIO to TYPE_PC87312 vfio: Rename PCI_VFIO to VFIO_PCI usb: Rename USB_SERIAL_DEV to USB_SERIAL sabre: Rename SABRE_DEVICE to SABRE rs6000_mc: Rename RS6000MC_DEVICE to RS6000MC filter-rewriter: Rename FILTER_COLO_REWRITER to FILTER_REWRITER esp: Rename ESP_STATE to ESP ahci: Rename ICH_AHCI to ICH9_AHCI vmgenid: Rename VMGENID_DEVICE to TYPE_VMGENID vfio: Rename VFIO_AP_DEVICE_TYPE to TYPE_VFIO_AP_DEVICE dev-smartcard-reader: Rename CCID_DEV_NAME to TYPE_USB_CCID_DEV ap-device: Rename AP_DEVICE_TYPE to TYPE_AP_DEVICE gpex: Fix type checking function name ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
8110fa1d |
| 31-Aug-2020 |
Eduardo Habkost <ehabkost@redhat.com> |
Use DECLARE_*CHECKER* macros
Generated using:
$ ./scripts/codeconverter/converter.py -i \ --pattern=TypeCheckMacro $(git grep -l '' -- '*.[ch]')
Reviewed-by: Daniel P. Berrangé <berrange@redha
Use DECLARE_*CHECKER* macros
Generated using:
$ ./scripts/codeconverter/converter.py -i \ --pattern=TypeCheckMacro $(git grep -l '' -- '*.[ch]')
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-12-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-13-ehabkost@redhat.com> Message-Id: <20200831210740.126168-14-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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#
db1015e9 |
| 03-Sep-2020 |
Eduardo Habkost <ehabkost@redhat.com> |
Move QOM typedefs and add missing includes
Some typedefs and macros are defined after the type check macros. This makes it difficult to automatically replace their definitions with OBJECT_DECLARE_TY
Move QOM typedefs and add missing includes
Some typedefs and macros are defined after the type check macros. This makes it difficult to automatically replace their definitions with OBJECT_DECLARE_TYPE.
Patch generated using:
$ ./scripts/codeconverter/converter.py -i \ --pattern=QOMStructTypedefSplit $(git grep -l '' -- '*.[ch]')
which will split "typdef struct { ... } TypedefName" declarations.
Followed by:
$ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \ $(git grep -l '' -- '*.[ch]')
which will: - move the typedefs and #defines above the type check macros - add missing #include "qom/object.h" lines if necessary
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-9-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-10-ehabkost@redhat.com> Message-Id: <20200831210740.126168-11-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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#
95a9457f |
| 16-Aug-2019 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/armbru/tags/pull-include-2019-08-13-v2' into staging
Header cleanup patches for 2019-08-13
# gpg: Signature made Fri 16 Aug 2019 12:39:12 BST # gpg:
Merge remote-tracking branch 'remotes/armbru/tags/pull-include-2019-08-13-v2' into staging
Header cleanup patches for 2019-08-13
# gpg: Signature made Fri 16 Aug 2019 12:39:12 BST # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653
* remotes/armbru/tags/pull-include-2019-08-13-v2: (29 commits) sysemu: Split sysemu/runstate.h off sysemu/sysemu.h sysemu: Move the VMChangeStateEntry typedef to qemu/typedefs.h Include sysemu/sysemu.h a lot less Clean up inclusion of sysemu/sysemu.h numa: Move remaining NUMA declarations from sysemu.h to numa.h Include sysemu/hostmem.h less numa: Don't include hw/boards.h into sysemu/numa.h Include hw/boards.h a bit less Include hw/qdev-properties.h less Include qemu/main-loop.h less Include qemu/queue.h slightly less Include hw/hw.h exactly where needed Include qom/object.h slightly less Include exec/memory.h slightly less Include migration/vmstate.h less migration: Move the VMStateDescription typedef to typedefs.h Clean up inclusion of exec/cpu-common.h Include hw/irq.h a lot less typedefs: Separate incomplete types and function types ide: Include hw/ide/internal a bit less outside hw/ide/ ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
650d103d |
| 12-Aug-2019 |
Markus Armbruster <armbru@redhat.com> |
Include hw/hw.h exactly where needed
In my "build everything" tree, changing hw/hw.h triggers a recompile of some 2600 out of 6600 objects (not counting tests and objects that don't depend on qemu/o
Include hw/hw.h exactly where needed
In my "build everything" tree, changing hw/hw.h triggers a recompile of some 2600 out of 6600 objects (not counting tests and objects that don't depend on qemu/osdep.h).
The previous commits have left only the declaration of hw_error() in hw/hw.h. This permits dropping most of its inclusions. Touching it now recompiles less than 200 objects.
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20190812052359.30071-19-armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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#
205e3e78 |
| 22-Feb-2018 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180222' into staging
* New "raspi3" machine emulating RaspberryPi 3 * Fix bad register definitions for VMIDR and VMPIDR (which
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180222' into staging
* New "raspi3" machine emulating RaspberryPi 3 * Fix bad register definitions for VMIDR and VMPIDR (which caused assertions for 64-bit guest CPUs with EL2 on big-endian hosts) * hw/char/stm32f2xx_usart: fix TXE/TC bit handling * Fix ast2500 protection register emulation * Lots of SD card emulation cleanups and bugfixes
# gpg: Signature made Thu 22 Feb 2018 15:18:53 GMT # gpg: using RSA key 3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20180222: (32 commits) sdcard: simplify SD_SEND_OP_COND (ACMD41) sdcard: simplify SEND_IF_COND (CMD8) sdcard: warn if host uses an incorrect address for APP CMD (CMD55) sdcard: check the card is in correct state for APP CMD (CMD55) sdcard: handles more commands in SPI mode sdcard: use a more descriptive label 'unimplemented_spi_cmd' sdcard: handle the Security Specification commands sdcard: handle CMD54 (SDIO) sdcard: use the registerfields API for the CARD_STATUS register masks sdcard: use the correct masked OCR in the R3 reply sdcard: simplify using the ldst API sdcard: remove commands from unsupported old MMC specification sdcard: clean the SCR register and add few comments sdcard: fix the 'maximum data transfer rate' to 25MHz sdcard: update the CSD CRC register regardless the CSD structure version sdcard: Don't always set the high capacity bit sdcard: use the registerfields API to access the OCR register sdcard: use G_BYTE from cutils sdcard: define SDMMC_CMD_MAX instead of using the magic '64' sdcard: add more trace events ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
f6bfe45a |
| 22-Feb-2018 |
Richard Braun <rbraun@sceen.net> |
hw/char/stm32f2xx_usart: fix TXE/TC bit handling
I/O currently being synchronous, there is no reason to ever clear the SR_TXE bit. However the SR_TC bit may be cleared by software writing to the SR
hw/char/stm32f2xx_usart: fix TXE/TC bit handling
I/O currently being synchronous, there is no reason to ever clear the SR_TXE bit. However the SR_TC bit may be cleared by software writing to the SR register, so set it on each write.
In addition, fix the reset value of the USART status register.
Signed-off-by: Richard Braun <rbraun@sceen.net> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> [PMM: removed XXX tag from comment, since it isn't something we need to come back and fix in QEMU] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
cb8b8ef4 |
| 05-Jun-2017 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/elmarco/tags/chrfe-pull-request' into staging
# gpg: Signature made Fri 02 Jun 2017 20:12:48 BST # gpg: using RSA key 0xDAE8E10975969CE5 # gpg: G
Merge remote-tracking branch 'remotes/elmarco/tags/chrfe-pull-request' into staging
# gpg: Signature made Fri 02 Jun 2017 20:12:48 BST # gpg: using RSA key 0xDAE8E10975969CE5 # gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" # gpg: aka "Marc-André Lureau <marcandre.lureau@gmail.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 87A9 BD93 3F87 C606 D276 F62D DAE8 E109 7596 9CE5
* remotes/elmarco/tags/chrfe-pull-request: char: move char devices to chardev/ char: make chr_fe_deinit() optionaly delete backend char: rename functions that are not part of fe char: move CharBackend handling in char-fe unit char: generalize qemu_chr_write_all() be-hci: use backend functions chardev: serial & parallel declaration to own headers chardev: move headers to include/chardev Remove/replace sysemu/char.h inclusion char-win: close file handle except with console char-win: rename hcom->file char-win: rename win_chr_init/poll win_chr_serial_init/poll char-win: remove WinChardev.len char-win: simplify win_chr_read() char: cast ARRAY_SIZE() as signed to silent warning on empty array
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
4d43a603 |
| 26-Jan-2017 |
Marc-André Lureau <marcandre.lureau@redhat.com> |
char: move CharBackend handling in char-fe unit
Move all the frontend struct and methods to a seperate unit. This avoids accidentally mixing backend and frontend calls, and helps with readabilty.
M
char: move CharBackend handling in char-fe unit
Move all the frontend struct and methods to a seperate unit. This avoids accidentally mixing backend and frontend calls, and helps with readabilty.
Make qemu_chr_replay() a macro shared by both char and char-fe.
Export qemu_chr_write(), and use a macro for qemu_chr_write_all()
(nb: yes, CharBackend is for char frontend :)
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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#
8228e353 |
| 26-Jan-2017 |
Marc-André Lureau <marcandre.lureau@redhat.com> |
chardev: move headers to include/chardev
So they are all in one place. The following patch will move serial & parallel declarations to the respective headers.
Signed-off-by: Marc-André Lureau <marc
chardev: move headers to include/chardev
So they are all in one place. The following patch will move serial & parallel declarations to the respective headers.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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#
a3ae21ec |
| 24-Oct-2016 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
* KVM run_on_cpu fix (Alex) * atomic usage fixes (Emilio, me) * hugetlbfs alignment fix (Haozhong) * CharBackend refacto
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
* KVM run_on_cpu fix (Alex) * atomic usage fixes (Emilio, me) * hugetlbfs alignment fix (Haozhong) * CharBackend refactoring (Marc-André) * test-i386 fixes (me) * MemoryListener optimizations (me) * Miscellaneous bugfixes (me) * iSER support (Roy) * --version formatting (Thomas)
# gpg: Signature made Mon 24 Oct 2016 14:46:19 BST # gpg: using RSA key 0xBFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* remotes/bonzini/tags/for-upstream: (50 commits) exec.c: workaround regression caused by alignment change in d2f39ad char: remove explicit_be_open from CharDriverState char: use common error path in qmp_chardev_add char: replace avail_connections char: remove unused qemu_chr_fe_event char: use an enum for CHR_EVENT char: remove unused CHR_EVENT_FOCUS char: move fe_open in CharBackend char: remove explicit_fe_open, use a set_handlers argument char: rename chr_close/chr_free char: move front end handlers in CharBackend tests: start chardev unit tests char: make some qemu_chr_fe skip if no driver char: replace qemu_chr_claim/release with qemu_chr_fe_init/deinit vhost-user: only initialize queue 0 CharBackend char: fold qemu_chr_set_handlers in qemu_chr_fe_set_handlers char: use qemu_chr_fe* functions with CharBackend argument colo: claim in find_and_check_chardev char: rename some frontend functions char: remaining switch to CharBackend in frontend ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
becdfa00 |
| 22-Oct-2016 |
Marc-André Lureau <marcandre.lureau@redhat.com> |
char: replace PROP_CHR with CharBackend
Store the property in a CharBackend instead of CharDriverState*. This also replace systematically chr by chr.chr to access the CharDriverState*. The followin
char: replace PROP_CHR with CharBackend
Store the property in a CharBackend instead of CharDriverState*. This also replace systematically chr by chr.chr to access the CharDriverState*. The following patches will replace it with calls to qemu_chr_fe CharBackend functions.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20161022095318.17775-12-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
d598911b |
| 11-Mar-2015 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20150311' into staging
target-arm queue: * fix a bug in bitops.h * implement SD card support on integratorcp * add a missing 'c
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20150311' into staging
target-arm queue: * fix a bug in bitops.h * implement SD card support on integratorcp * add a missing 'compatible' property for Cortex-A57 * add Netduino 2 machine model * fix command line parsing bug for CPU options with multiple CPUs
# gpg: Signature made Wed Mar 11 14:14:22 2015 GMT using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
* remotes/pmaydell/tags/pull-target-arm-20150311: bitops.h: sextract64() return type should be int64_t, not uint64_t integrator/cp: Implement CARDIN and WPROT signals integrator/cp: Model CP control registers as sysbus device target-arm: Add missing compatible property to A57 netduino2: Add the Netduino 2 Machine stm32f205: Add the stm32f205 SoC stm32f2xx_SYSCFG: Add the stm32f2xx SYSCFG stm32f2xx_USART: Add the stm32f2xx USART Controller stm32f2xx_timer: Add the stm32f2xx Timer hw/arm/virt: fix cmdline parsing bug with CPU options and smp > 1
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
73af5d11 |
| 11-Mar-2015 |
Alistair Francis <alistair23@gmail.com> |
stm32f2xx_USART: Add the stm32f2xx USART Controller
This patch adds the stm32f2xx USART controller (UART also uses the same controller).
Signed-off-by: Alistair Francis <alistair@alistair23.me> Rev
stm32f2xx_USART: Add the stm32f2xx USART Controller
This patch adds the stm32f2xx USART controller (UART also uses the same controller).
Signed-off-by: Alistair Francis <alistair@alistair23.me> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 762c6c0d2a41d574932bc4445ec9bfffe6da8798.1424175342.git.alistair@alistair23.me Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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