#
06b40d25 |
| 27-Apr-2025 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'single-binary-20250425' of https://github.com/philmd/qemu into staging
Various patches loosely related to single binary work:
- Replace cpu_list() definition by CPUClass::list_cpus() cal
Merge tag 'single-binary-20250425' of https://github.com/philmd/qemu into staging
Various patches loosely related to single binary work:
- Replace cpu_list() definition by CPUClass::list_cpus() callback - Remove few MO_TE definitions on Hexagon / X86 targets - Remove target_ulong uses in ARMMMUFaultInfo and ARM CPUWatchpoint - Remove DEVICE_HOST_ENDIAN definition - Evaluate TARGET_BIG_ENDIAN at compile time and use target_needs_bswap() more - Rename target_words_bigendian() as target_big_endian() - Convert target_name() and target_cpu_type() to TargetInfo API - Constify QOM TypeInfo class_data/interfaces fields - Get default_cpu_type calling machine_class_default_cpu_type() - Correct various uses of GLibCompareDataFunc prototype - Simplify ARM/Aarch64 gdb_get_core_xml_file() handling a bit - Move device tree files in their own pc-bios/dtb/ subdir - Correctly check strchrnul() symbol availability on macOS SDK - Move target-agnostic methods out of cpu-target.c and accel-target.c - Unmap canceled USB XHCI packet - Use deposit/extract API in designware model - Fix MIPS16e translation - Few missing header fixes
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmgLqb8ACgkQ4+MsLN6t # wN6nCQ//cmv1M+NsndhO5TAK8T1eUSXKlTZh932uro6ZgxKwN4p+j1Qo7bq3O9gu # qUMHNbcfQl8sHSytiXBoxCjLMCXC3u38iyz75WGXuPay06rs4wqmahqxL4tyno3l # 1RviFts9xlLn+tJqqrAR6+pRdALld0TY+yXUjXgr4aK5pIRpLz9U/sIEoh7qbA5U # x0MTaceDG3A91OYo0TgrNbcMe1b9GqQZ+a4tbaP+oE37wbiKdyQ68LjrEbV08Y1O # qrFF4oxquV31QJcUiuII1W7hC6psGrMsUA1f1qDu7QvmybAZWNZNsR9T66X9jH5J # wXMShJmmXwxugohmuPPFnDshzJy90aFL6Jy2shrfqcG2v0W66ARY1ZnbJLCcfczt # 073bnE2dnOVhd/ny37RrIJNJLLmYM0yFDeKuYtNNAzpK9fpA7Q2PI8QiqNacQ3Pa # TdEYrGlMk7OeNck8xJmJMY5rATthi1D4dIBv3rjQbUolQvPJe2Y9or0R2WL1jK5v # hhr6DY01iSPES3CravmUs/aB1HRMPi/nX45OmFR6frAB7xqWMreh81heBVuoTTK8 # PuXtRQgRMRKwDeTxlc6p+zba4mIEYG8rqJtPFRgViNCJ1KsgSIowup3BNU05YuFn # NoPoRayMDVMgejVgJin3Mg2DCYvt/+MBmO4IoggWlFsXj59uUgA= # =DXnZ # -----END PGP SIGNATURE----- # gpg: Signature made Fri 25 Apr 2025 11:26:55 EDT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'single-binary-20250425' of https://github.com/philmd/qemu: (58 commits) qemu: Convert target_name() to TargetInfo API accel: Move target-agnostic code from accel-target.c -> accel-common.c accel: Make AccelCPUClass structure target-agnostic accel: Include missing 'qemu/accel.h' header in accel-internal.h accel: Implement accel_init_ops_interfaces() for both system/user mode cpus: Move target-agnostic methods out of cpu-target.c cpus: Replace CPU_RESOLVING_TYPE -> target_cpu_type() qemu: Introduce target_cpu_type() qapi: Rename TargetInfo structure as QemuTargetInfo hw/microblaze: Evaluate TARGET_BIG_ENDIAN at compile time hw/mips: Evaluate TARGET_BIG_ENDIAN at compile time target/xtensa: Evaluate TARGET_BIG_ENDIAN at compile time target/mips: Check CPU endianness at runtime using env_is_bigendian() accel/kvm: Use target_needs_bswap() linux-user/elfload: Use target_needs_bswap() target/hexagon: Include missing 'accel/tcg/getpc.h' accel/tcg: Correct list of included headers in tcg-stub.c system/kvm: make functions accessible from common code meson: Use osdep_prefix for strchrnul() meson: Share common C source prefixes ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
12d1a768 |
| 09-Feb-2025 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
qom: Have class_init() take a const data argument
Mechanical change using gsed, then style manually adapted to pass checkpatch.pl script.
Suggested-by: Richard Henderson <richard.henderson@linaro.o
qom: Have class_init() take a const data argument
Mechanical change using gsed, then style manually adapted to pass checkpatch.pl script.
Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250424194905.82506-4-philmd@linaro.org>
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#
db7aa99e |
| 17-Feb-2025 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'hw-misc-20250216' of https://github.com/philmd/qemu into staging
Misc HW patches
- Use qemu_hexdump_line() in TPM backend (Philippe) - Remove magic number in APIC (Phil) - Disable thread
Merge tag 'hw-misc-20250216' of https://github.com/philmd/qemu into staging
Misc HW patches
- Use qemu_hexdump_line() in TPM backend (Philippe) - Remove magic number in APIC (Phil) - Disable thread-level cache topology (Zhao) - Xen QOM style cleanups (Bernhard) - Introduce TYPE_DYNAMIC_SYS_BUS_DEVICE (Philippe) - Invert logic of machine no_sdcard flag (Philippe) - Housekeeping in MicroBlaze functional tests (Philippe) - Prevent out-of-bound access in SMC91C111 RX path (Peter) - Declare more fields / arguments as const (Philippe) - Introduce EndianMode QAPI enum (Philippe) - Make various Xilinx devices endianness configurable (Philippe) - Mark some devices memory regions as little-endian (Philippe) - Allow execution RX gdbsim machine without BIOS/kernel (Keith)
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmeyUY8ACgkQ4+MsLN6t # wN7OQQ/+PwMfwJUjmkUYgS2E4RMEQFq3LVeY7hRcsga/F0EAQV5ksn9f8nqkWu7b # vkXIxcatWb1dgpkqIYRPG/PuAELIub9ZFpc57TNVvFZiGzqtOg1rXSAinDEtb8oL # fMB/HnLGLScOaIeWa7d7t58oOnpO6yAYZi/BYiByKnToHO4nkfu3yNIB290Tjia0 # npbundH3Gmk8B+LmcFpqXqj0KyDZNxHw8WMh8nba+mhp0gp0z5hlOKoaGgSzNW4f # Az1sjeKCVVcMf+C01tfO5V8NHQdqFQovqcua+wMoWd9we3JuIHFkhTpZHxWUvW/l # e8ovqXBfFv++TqjNb1tZJMwYqM2mBH7txqOoZmWXcnihISURIa4GkwtNOLMx0HGk # omxZYLnsVbrHivdelzNB1ipVehhqD37/lW1Tq8b+bMfCGFF2coXWyx10pyXZTB+P # 6Xyd9QWcCTQPXMgIHJ28DU8s+bIHERdPHQVtaaBSahggFm/suR+gBanCxCiGfbA/ # 8/AFolptCaxRh4OoXOFft+SOcjsURCWHSDAVK64rp7yRc4D/nEnXb79d4sthDRuG # DKvaO4D03QYIo79Bas+u687lEwQ7fiecFtt6iI0fHe5MiJG0ZymAkwmWe7UnnUZF # VvqkjRjapjphASxPKVnXAzLXBL3rCL27VeTlaXO5Qk34Jf9d1J4= # =URn3 # -----END PGP SIGNATURE----- # gpg: Signature made Sun 16 Feb 2025 15:58:55 EST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'hw-misc-20250216' of https://github.com/philmd/qemu: (39 commits) hw/rx: Allow execution without either bios or kernel hw/pci-host: Mark versatile regions as little-endian hw/mips: Mark Loonson3 Virt machine devices as little-endian hw/mips: Mark Boston machine devices as little-endian hw/arm: Mark Allwinner Technology devices as little-endian hw/ssi/xilinx_spi: Make device endianness configurable hw/char/xilinx_uartlite: Make device endianness configurable hw/timer/xilinx_timer: Make device endianness configurable hw/net/xilinx_ethlite: Make device endianness configurable hw/intc/xilinx_intc: Make device endianness configurable hw/qdev-properties-system: Introduce EndianMode QAPI enum hw: Make class data 'const' hw: Declare various const data as 'const' tests/functional: Remove sleep() kludges from microblaze tests tests/functional: Allow microblaze tests to take a machine name argument tests/functional: Explicit endianness of microblaze assets hw/net/smc91c111: Ignore attempt to pop from empty RX fifo hw/riscv/opentitan: Include missing 'exec/address-spaces.h' header hw/boards: Ensure machine setting auto_create_sdcard expose a SD Bus hw/riscv: Remove all invalid uses of auto_create_sdcard=true ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
ba26f147 |
| 12-Feb-2025 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
hw/arm: Mark Allwinner Technology devices as little-endian
These devices are only used by the ARM targets, which are only built as little-endian. Therefore the DEVICE_NATIVE_ENDIAN definition expand
hw/arm: Mark Allwinner Technology devices as little-endian
These devices are only used by the ARM targets, which are only built as little-endian. Therefore the DEVICE_NATIVE_ENDIAN definition expand to DEVICE_LITTLE_ENDIAN (besides, the DEVICE_BIG_ENDIAN case isn't tested). Simplify directly using DEVICE_LITTLE_ENDIAN.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250212113938.38692-2-philmd@linaro.org>
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#
65cb7129 |
| 21-Dec-2024 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'exec-20241220' of https://github.com/philmd/qemu into staging
Accel & Exec patch queue
- Ignore writes to CNTP_CTL_EL0 on HVF ARM (Alexander) - Add '-d invalid_mem' logging option (Zolta
Merge tag 'exec-20241220' of https://github.com/philmd/qemu into staging
Accel & Exec patch queue
- Ignore writes to CNTP_CTL_EL0 on HVF ARM (Alexander) - Add '-d invalid_mem' logging option (Zoltan) - Create QOM containers explicitly (Peter) - Rename sysemu/ -> system/ (Philippe) - Re-orderning of include/exec/ headers (Philippe) Move a lot of declarations from these legacy mixed bag headers: . "exec/cpu-all.h" . "exec/cpu-common.h" . "exec/cpu-defs.h" . "exec/exec-all.h" . "exec/translate-all" to these more specific ones: . "exec/page-protection.h" . "exec/translation-block.h" . "user/cpu_loop.h" . "user/guest-host.h" . "user/page-protection.h"
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmdlnyAACgkQ4+MsLN6t # wN6mBw//QFWi7CrU+bb8KMM53kOU9C507tjn99LLGFb5or73/umDsw6eo/b8DHBt # KIwGLgATel42oojKfNKavtAzLK5rOrywpboPDpa3SNeF1onW+99NGJ52LQUqIX6K # A6bS0fPdGG9ZzEuPpbjDXlp++0yhDcdSgZsS42fEsT7Dyj5gzJYlqpqhiXGqpsn8 # 4Y0UMxSL21K3HEexlzw2hsoOBFA3tUm2ujNDhNkt8QASr85yQVLCypABJnuoe/// # 5Ojl5wTBeDwhANET0rhwHK8eIYaNboiM9fHopJYhvyw1bz6yAu9jQwzF/MrL3s/r # xa4OBHBy5mq2hQV9Shcl3UfCQdk/vDaYaWpgzJGX8stgMGYfnfej1SIl8haJIfcl # VMX8/jEFdYbjhO4AeGRYcBzWjEJymkDJZoiSWp2NuEDi6jqIW+7yW1q0Rnlg9lay # ShAqLK5Pv4zUw3t0Jy3qv9KSW8sbs6PQxtzXjk8p97rTf76BJ2pF8sv1tVzmsidP # 9L92Hv5O34IqzBu2oATOUZYJk89YGmTIUSLkpT7asJZpBLwNM2qLp5jO00WVU0Sd # +kAn324guYPkko/TVnjC/AY7CMu55EOtD9NU35k3mUAnxXT9oDUeL4NlYtfgrJx6 # x1Nzr2FkS68+wlPAFKNSSU5lTjsjNaFM0bIJ4LCNtenJVP+SnRo= # =cjz8 # -----END PGP SIGNATURE----- # gpg: Signature made Fri 20 Dec 2024 11:45:20 EST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'exec-20241220' of https://github.com/philmd/qemu: (59 commits) util/qemu-timer: fix indentation meson: Do not define CONFIG_DEVICES on user emulation system/accel-ops: Remove unnecessary 'exec/cpu-common.h' header system/numa: Remove unnecessary 'exec/cpu-common.h' header hw/xen: Remove unnecessary 'exec/cpu-common.h' header target/mips: Drop left-over comment about Jazz machine target/mips: Remove tswap() calls in semihosting uhi_fstat_cb() target/xtensa: Remove tswap() calls in semihosting simcall() helper accel/tcg: Un-inline translator_is_same_page() accel/tcg: Include missing 'exec/translation-block.h' header accel/tcg: Move tcg_cflags_has/set() to 'exec/translation-block.h' accel/tcg: Restrict curr_cflags() declaration to 'internal-common.h' qemu/coroutine: Include missing 'qemu/atomic.h' header exec/translation-block: Include missing 'qemu/atomic.h' header accel/tcg: Declare cpu_loop_exit_requested() in 'exec/cpu-common.h' exec/cpu-all: Include 'cpu.h' earlier so MMU_USER_IDX is always defined target/sparc: Move sparc_restore_state_to_opc() to cpu.c target/sparc: Uninline cpu_get_tb_cpu_state() target/loongarch: Declare loongarch_cpu_dump_state() locally user: Move various declarations out of 'exec/exec-all.h' ...
Conflicts: hw/char/riscv_htif.c hw/intc/riscv_aplic.c target/s390x/cpu.c
Apply sysemu header path changes to not in the pull request.
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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32cad1ff |
| 03-Dec-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
include: Rename sysemu/ -> system/
Headers in include/sysemu/ are not only related to system *emulation*, they are also used by virtualization. Rename as system/ which is clearer.
Files renamed man
include: Rename sysemu/ -> system/
Headers in include/sysemu/ are not only related to system *emulation*, they are also used by virtualization. Rename as system/ which is clearer.
Files renamed manually then mechanical change using sed tool.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Lei Yang <leiyang@redhat.com> Message-Id: <20241203172445.28576-1-philmd@linaro.org>
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#
d328fef9 |
| 04-Jan-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-20231230' of https://gitlab.com/rth7680/qemu into staging
Mark VMStateField and VMStateDescription arrays const.
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXA
Merge tag 'pull-20231230' of https://gitlab.com/rth7680/qemu into staging
Mark VMStateField and VMStateDescription arrays const.
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmWPOFsdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8cCQgAnQjy3Ic1i225AElh # 0Ph3Aiw6WT9pECLoKmyroxHbTGuaEJoIXeaOhMAnowCTBLoKRR3/Ooq0DGOW+l/Z # f5PwWSkjkb+OcS+dj/kgQBu58/Gk5G8ogksqKQvci8k2okhjHmITSQDu0dtwzDZr # jVGh3gmGoat73jQyD/nAwgWFawlLkklOMR/yvnFX7EJIBepRVbkMPayoKlB+6W07 # 1kqhSwoI0vQCjhJ3Q7Q0GC4rrHK3KUq7o/25yvICf4EgPKfsaym1wAjDhdKToixl # 9T+ALZG8SiZZkBlb6l3QZ7pqtqavxYtPdZ2Gx/nMu0RRu4G33d5AVGHRrXj9qttW # 5mL7ZQ== # =uQ4C # -----END PGP SIGNATURE----- # gpg: Signature made Fri 29 Dec 2023 21:21:31 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-20231230' of https://gitlab.com/rth7680/qemu: (71 commits) docs: Constify VMstate in examples tests/unit/test-vmstate: Constify VMState util/fifo8: Constify VMState replay: Constify VMState system: Constify VMState migration: Constify VMState cpu-target: Constify VMState backends: Constify VMState audio: Constify VMState hw/misc/macio: Constify VMState hw/watchdog: Constify VMState hw/virtio: Constify VMState hw/vfio: Constify VMState hw/usb: Constify VMState hw/tpm: Constify VMState hw/timer: Constify VMState hw/ssi: Constify VMState hw/sparc: Constify VMState hw/sensor: Constify VMState hw/sd: Constify VMState ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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45bc669e |
| 21-Dec-2023 |
Richard Henderson <richard.henderson@linaro.org> |
hw/watchdog: Constify VMState
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231221031652.119827-62-richard.henderson@linaro.org>
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29c343a4 |
| 21-Apr-2023 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-target-arm-20230420' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * hw/arm: Fix some typos in comments (most found by codespell) * exynos: Fix
Merge tag 'pull-target-arm-20230420' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * hw/arm: Fix some typos in comments (most found by codespell) * exynos: Fix out-of-bounds access in exynos4210_gcomp_find debug printf * Orangepi-PC, Cubieboard: add Allwinner WDT watchdog emulation * tests/avocado: Add reboot tests to Cubieboard * hw/timer/imx_epit: Fix bugs in timer limit checking * target/arm: Remove KVM AArch32 CPU definitions * hw/arm/virt: Restrict Cortex-A7 check to TCG * target/arm: Initialize debug capabilities only once * target/arm: Implement FEAT_PAN3 * docs/devel/kconfig.rst: Fix incorrect markup * target/arm: Report pauth information to gdb as 'pauth_v2' * mcimxd7-sabre, mcimx6ul-evk: Correctly model the way the PHY on the second ethernet device must be configured via the first one
# -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmRBDfkZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3rtLD/93hJ+CEUnATXx7Ic7g0EvN # eXIMsgd80pd1gn4PKzP9lol6I40VDuozs9mb9jP6+Hc0tEoOua4KlIvyMlYy4wSx # eJBqt/gx/N/V+jwVG8seY+ifLIzECMLMOQIRQqQoVk+scENuiJIXcJRH5A1eUWNb # iV0QfJa1gQrKyyIG9vNfZ+cS+xy0bl0E9FlZ0ty3zeh0xBaMhUqnpraTVLISWelP # OEovcIBEzvD/ngj+7F/xKBGgtSTZ1FuN5p/oOFDCH2Fihe2+wuw7B3Rc1SbHLG7n # Wr4JZozdPbnudhrZgn+1A9SCFhH+B8k/QlKY2Qc+w+GrnC0JpJAmqtaF2aIaepPo # kfbTUshDstIZ7MnCeAa+SWn2Exgrsn0Gv9nWdOrPgrvo0bqK6ceAhchi5nFmkkaJ # MOy+Xx5GIAE91418wR8C2TlrTl58A81s15AYY1D7nZ0GeuZV5io7wPIAOWa14rOQ # RdvQ/0rcZ+IkOFXz5Zj/L/Y/W4BpDyfuUVzLAah56zYkuV4im2cLt3YAOMFYZjjO # 6W1sdbAcuA5QFmO4v5VmcTU8t/B423QzcnssE6sbM0nazMh/i6kjzvJUhdJTQmi+ # lKjIe+MHutTgrbjrwemjiafk3dOpFpKtso/4C/dhP2UfDIcKuGXNpSYxCvoknO2j # TWvxRvir/PC7gzUzA4CrwQ== # =YUUL # -----END PGP SIGNATURE----- # gpg: Signature made Thu 20 Apr 2023 11:03:37 AM BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
* tag 'pull-target-arm-20230420' of https://git.linaro.org/people/pmaydell/qemu-arm: (21 commits) arm/mcimx7d-sabre: Set fec2-phy-connected property to false fsl-imx7: Add fec[12]-phy-connected properties arm/mcimx6ul-evk: Set fec1-phy-connected property to false fsl-imx6ul: Add fec[12]-phy-connected properties hw/net/imx_fec: Support two Ethernet interfaces connected to single MDIO bus target/arm: Report pauth information to gdb as 'pauth_v2' docs/devel/kconfig.rst: Fix incorrect markup target/arm: Implement FEAT_PAN3 target/arm: Don't set ISV when reporting stage 1 faults in ESR_EL2 target/arm: Pass ARMMMUFaultInfo to merge_syn_data_abort() target/arm: Initialize debug capabilities only once hw/arm/virt: Restrict Cortex-A7 check to TCG target/arm: Remove KVM AArch32 CPU definitions hw/timer/imx_epit: fix limit check hw/timer/imx_epit: don't shadow variable tests/avocado: Add reboot tests to Cubieboard hw/arm: Add WDT to Allwinner-H3 and Orangepi-PC hw/arm: Add WDT to Allwinner-A10 and Cubieboard hw/watchdog: Allwinner WDT emulation for system reset exynos: Fix out-of-bounds access in exynos4210_gcomp_find debug printf ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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17b9730f |
| 20-Apr-2023 |
Strahinja Jankovic <strahinjapjankovic@gmail.com> |
hw/watchdog: Allwinner WDT emulation for system reset
This patch adds basic support for Allwinner WDT. Both sun4i and sun6i variants are supported. However, interrupt generation is not supported, so
hw/watchdog: Allwinner WDT emulation for system reset
This patch adds basic support for Allwinner WDT. Both sun4i and sun6i variants are supported. However, interrupt generation is not supported, so WDT can be used only to trigger system reset.
Signed-off-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Tested-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20230326202256.22980-2-strahinja.p.jankovic@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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