hw/misc: Add a PWM module for NPCM7XX

The PWM module is part of NPCM7XX module. Each NPCM7XX module has two
identical PWM modules. Each module contains 4 PWM entries. Each PWM has
two outputs: frequ

hw/misc: Add a PWM module for NPCM7XX

The PWM module is part of NPCM7XX module. Each NPCM7XX module has two
identical PWM modules. Each module contains 4 PWM entries. Each PWM has
two outputs: frequency and duty_cycle. Both are computed using inputs
from software side.

This module does not model detail pulse signals since it is expensive.
It also does not model interrupts and watchdogs that are dependant on
the detail models. The interfaces for these are left in the module so
that anyone in need for these functionalities can implement on their
own.

The user can read the duty cycle and frequency using qom-get command.

Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com>
Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Message-id: 20210108190945.949196-5-wuhaotsh@google.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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hw/adc: Add an ADC module for NPCM7XX

The ADC is part of NPCM7XX Module. Its behavior is controled by the
ADC_CON register. It converts one of the eight analog inputs into a
digital input and stores

hw/adc: Add an ADC module for NPCM7XX

The ADC is part of NPCM7XX Module. Its behavior is controled by the
ADC_CON register. It converts one of the eight analog inputs into a
digital input and stores it in the ADC_DATA register when enabled.

Users can alter input value by using qom-set QMP command.

Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com>
Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Message-id: 20210108190945.949196-4-wuhaotsh@google.com
[PMM: Added missing hw/adc/trace.h file]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201027-1' into staging

target-arm queue:
* raspi: add model of cprman clock manager
* sbsa-ref: add an SBSA generic watchdog d

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201027-1' into staging

target-arm queue:
* raspi: add model of cprman clock manager
* sbsa-ref: add an SBSA generic watchdog device
* arm/trace: Fix hex printing
* raspi: Add models of Pi 3 model A+, Pi Zero and Pi A+
* hw/arm/smmuv3: Set the restoration priority of the vSMMUv3 explicitly
* Nuvoton NPCM7xx: Add USB, RNG, GPIO and watchdog support
* hw/arm: fix min_cpus for xlnx-versal-virt platform
* hw/arm/highbank: Silence warnings about missing fallthrough statements
* linux-user: Support Aarch64 BTI
* Armv7M systick: fix corner case bugs by rewriting to use ptimer

# gpg: Signature made Tue 27 Oct 2020 11:27:10 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20201027-1: (48 commits)
hw/timer/armv7m_systick: Rewrite to use ptimers
hw/core/ptimer: Support ptimer being disabled by timer callback
hw/arm/sbsa-ref: add SBSA watchdog device
hw/watchdog: Implement SBSA watchdog device
hw/arm/bcm2835_peripherals: connect the UART clock
hw/char/pl011: add a clock input
hw/misc/bcm2835_cprman: add sane reset values to the registers
hw/misc/bcm2835_cprman: add the DSI0HSCK multiplexer
hw/misc/bcm2835_cprman: implement clock mux behaviour
hw/misc/bcm2835_cprman: add a clock mux skeleton implementation
hw/misc/bcm2835_cprman: implement PLL channels behaviour
hw/misc/bcm2835_cprman: add a PLL channel skeleton implementation
hw/misc/bcm2835_cprman: implement PLLs behaviour
hw/misc/bcm2835_cprman: add a PLL skeleton implementation
hw/arm/raspi: add a skeleton implementation of the CPRMAN
hw/arm/raspi: fix CPRMAN base address
hw/core/clock: trace clock values in Hz instead of ns
hw/core/clock: provide the VMSTATE_ARRAY_CLOCK macro
arm/trace: Fix hex printing
hw/arm/raspi: Add the Raspberry Pi 3 model A+
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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hw/gpio: Add GPIO model for Nuvoton NPCM7xx

The NPCM7xx chips have multiple GPIO controllers that are mostly
identical except for some minor differences like the reset values of
some registers. Each

hw/gpio: Add GPIO model for Nuvoton NPCM7xx

The NPCM7xx chips have multiple GPIO controllers that are mostly
identical except for some minor differences like the reset values of
some registers. Each controller controls up to 32 pins.

Each individual pin is modeled as a pair of unnamed GPIOs -- one for
emitting the actual pin state, and one for driving the pin externally.
Like the nRF51 GPIO controller, a gpio level may be negative, which
means the pin is not driven, or floating.

Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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hw/arm/npcm7xx: Add EHCI and OHCI controllers

The NPCM730 and NPCM750 chips have a single USB host port shared between
a USB 2.0 EHCI host controller and a USB 1.1 OHCI host controller. This
adds su

hw/arm/npcm7xx: Add EHCI and OHCI controllers

The NPCM730 and NPCM750 chips have a single USB host port shared between
a USB 2.0 EHCI host controller and a USB 1.1 OHCI host controller. This
adds support for both of them.

Testing notes:
* With -device usb-kbd, qemu will automatically insert a full-speed
hub, and the keyboard becomes controlled by the OHCI controller.
* With -device usb-kbd,bus=usb-bus.0,port=1, the keyboard is directly
attached to the port without any hubs, and the device becomes
controlled by the EHCI controller since it's high speed capable.
* With -device usb-kbd,bus=usb-bus.0,port=1,usb_version=1, the
keyboard is directly attached to the port, but it only advertises
itself as full-speed capable, so it becomes controlled by the OHCI
controller.

In all cases, the keyboard device enumerates correctly.

Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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hw/misc: Add npcm7xx random number generator

The RNG module returns a byte of randomness when the Data Valid bit is
set.

This implementation ignores the prescaler setting, and loads a new value
int

hw/misc: Add npcm7xx random number generator

The RNG module returns a byte of randomness when the Data Valid bit is
set.

This implementation ignores the prescaler setting, and loads a new value
into RNGD every time RNGCS is read while the RNG is enabled and random
data is available.

A qtest featuring some simple randomness tests is included.

Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200914-1' into staging

* hw/misc/a9scu: Do not allow invalid CPU count
* hw/misc/a9scu: Minor cleanups
* hw/timer/armv7m_syst

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200914-1' into staging

* hw/misc/a9scu: Do not allow invalid CPU count
* hw/misc/a9scu: Minor cleanups
* hw/timer/armv7m_systick: assert that board code set system_clock_scale
* decodetree: Improve identifier matching
* target/arm: Clean up neon fp insn size field decode
* target/arm: Remove KVM support for 32-bit Arm hosts
* hw/arm/mps2: New board models mps2-an386, mps2-an500
* Deprecate Unicore32 port
* Deprecate lm32 port
* target/arm: Count PMU events when MDCR.SPME is set
* hw/arm: versal-virt: Correct the tx/rx GEM clocks
* New Nuvoton iBMC board models npcm750-evb, quanta-gsj

# gpg: Signature made Mon 14 Sep 2020 16:02:06 BST
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20200914-1: (32 commits)
tests/acceptance: console boot tests for quanta-gsj
docs/system: Add Nuvoton machine documentation
hw/arm/npcm7xx: add board setup stub for CPU and UART clocks
hw/arm: Wire up BMC boot flash for npcm750-evb and quanta-gsj
hw/ssi: NPCM7xx Flash Interface Unit device model
hw/mem: Stubbed out NPCM7xx Memory Controller model
hw/nvram: NPCM7xx OTP device model
hw/arm: Load -bios image as a boot ROM for npcm7xx
roms: Add virtual Boot ROM for NPCM7xx SoCs
hw/arm: Add two NPCM7xx-based machines
hw/arm: Add NPCM730 and NPCM750 SoC models
hw/timer: Add NPCM7xx Timer device model
hw/misc: Add NPCM7xx Clock Controller device model
hw/misc: Add NPCM7xx System Global Control Registers device model
hw/arm: versal-virt: Correct the tx/rx GEM clocks
target/arm: Count PMU events when MDCR.SPME is set
Deprecate lm32 port
Deprecate Unicore32 port
docs/system/arm/mps2.rst: Make board list consistent
hw/arm/mps2: New board model mps2-an500
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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docs/system: Add Nuvoton machine documentation

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Havard Skinnemoen <hskinnemoen@google

docs/system: Add Nuvoton machine documentation

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com>
Message-id: 20200911052101.2602693-14-hskinnemoen@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...