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fc524567 |
| 24-Apr-2025 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'pull-tcg-20250423' of https://gitlab.com/rth7680/qemu into staging
meson: Introduce top-level libuser_ss and libsystem_ss meson: Add hw_common_arch dictionary accel/tcg: Lots of cleanups
Merge tag 'pull-tcg-20250423' of https://gitlab.com/rth7680/qemu into staging
meson: Introduce top-level libuser_ss and libsystem_ss meson: Add hw_common_arch dictionary accel/tcg: Lots of cleanups to enable build once for: user-exec-stub.c, plugin-gen.c, translator.c page-vary: Restrict scope of TARGET_PAGE_BITS_MIN tcg: Always define TARGET_INSN_START_EXTRA_WORDS tcg: Convert TARGET_GUEST_DEFAULT_MO to TCGCPUOps::guest_default_memory_order tcg: Convert TARGET_SUPPORTS_MTTCG to TCGCPUOps::mttcg_supported field target/riscv: Do not expose rv128 CPU on user mode emulation
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmgJikUdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+t0gf9E9OWD3oQ7NIl+azS # imEFCKwuDxR0g07fH0aM9DW6e01mPQjxe3bmfxuYZbGUu0aJ/WzTbzfkX4qAiPeV # S32e5wwuYOknzDgoI9r8QTFUdelvBgxtVbxyZWJcWZFbLu4oPUhVUvpLJTWaxefo # VUL0g1LgJEYcWnzKFerb9kuiMXeDLsMd4eEX9g4XMAclHEDihND0hPKc3X7sYsmX # N/MtZUY1Zth0c53aq7bP5MBwNIH3tH3o+xAFcBhxiBQ/HxfX7qeNgOTIKo92ApfL # xcQul1AA/q9uQhCKsgfCxZDU4BhcR6sfmCOiDiTTEs+4zlWVDWjWwYtoednhf7ok # v3l9+A== # =qyvX # -----END PGP SIGNATURE----- # gpg: Signature made Wed 23 Apr 2025 20:48:05 EDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-tcg-20250423' of https://gitlab.com/rth7680/qemu: (148 commits) tcg: Convert TARGET_SUPPORTS_MTTCG to TCGCPUOps::mttcg_supported field target/i386: Remove AccelCPUClass::cpu_class_init need target/riscv: Remove AccelCPUClass::cpu_class_init need accel/tcg: Move mttcg warning to tcg_init_machine tcg: Convert TCGState::mttcg_enabled to TriState accel/tcg: Remove mttcg_enabled tcg: Move qemu_tcg_mttcg_enabled() to 'system/tcg.h' tcg: Pass max_threads not max_cpus to tcg_init tcg: Move cpu_req_mo() macro to target-agnostic 'backend-ldst.h' tcg: Remove the TCG_GUEST_DEFAULT_MO definition globally tcg: Have tcg_req_mo() use TCGCPUOps::guest_default_memory_order tcg: Propagate CPUState argument to cpu_req_mo() tcg: Remove use of TCG_GUEST_DEFAULT_MO in tb_gen_code() tcg: Define guest_default_memory_order in TCGCPUOps tcg: Simplify tcg_req_mo() macro tcg: Always define TCG_GUEST_DEFAULT_MO exec: Do not include 'accel/tcg/cpu-ldst.h' in 'exec-all.h' exec: Restrict 'cpu_ldst.h' to accel/tcg/ exec: Restrict 'cpu-ldst-common.h' to accel/tcg/ tcg: Always define TARGET_INSN_START_EXTRA_WORDS ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
8be545ba |
| 12-Mar-2025 |
Richard Henderson <richard.henderson@linaro.org> |
include/system: Move exec/memory.h to system/memory.h
Convert the existing includes with
sed -i ,exec/memory.h,system/memory.h,g
Move the include within cpu-all.h into a !CONFIG_USER_ONLY block.
include/system: Move exec/memory.h to system/memory.h
Convert the existing includes with
sed -i ,exec/memory.h,system/memory.h,g
Move the include within cpu-all.h into a !CONFIG_USER_ONLY block.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2b016883 |
| 15-May-2024 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-tcg-20240515' of https://gitlab.com/rth7680/qemu into staging
tcg/loongarch64: Fill out tcg_out_{ld,st} for vector regs accel/tcg: Improve disassembly for target and plugin
# -----B
Merge tag 'pull-tcg-20240515' of https://gitlab.com/rth7680/qemu into staging
tcg/loongarch64: Fill out tcg_out_{ld,st} for vector regs accel/tcg: Improve disassembly for target and plugin
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmZEXT0dHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/FbQf+P3ppcAA+5smxaQyi # dsfCJaGOMqRTWYuSmNsJ7AlxQobxLKVsJrAHraNU1AnDfwKrX3XXJcU4Gwt0eQyN # lGiF/24KLElvb+w6fkjuLdK+DbGWTrNabXJAnBw1h21x+go0mvVCVSuQQw7a/RDS # btPnGkmoi0H340JC1MVSDRgFkB3RV0kOMXGGm70S+mw0WhjVgdInhLv0jjnj2QFM # tYzJ5g+00v0HPo8Lun5kRSaI7EGG7J/XfGa71WHIHrB0o7FAzslap4fGTcfOB+7a # f2jTGErezJQj1pvJLvFTNX4YQ02ORnDKsz4EC0G9QU8rk+S1bD2vTVoi5IY5ayfJ # oqxyRw== # =Q16M # -----END PGP SIGNATURE----- # gpg: Signature made Wed 15 May 2024 08:59:09 AM CEST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]
* tag 'pull-tcg-20240515' of https://gitlab.com/rth7680/qemu: (34 commits) tcg/loongarch64: Fill out tcg_out_{ld,st} for vector regs accel/tcg: Remove cpu_ldsb_code / cpu_ldsw_code target/s390x: Use translator_lduw in get_next_pc target/xtensa: Use translator_ldub in xtensa_insn_len target/rx: Use translator_ld* target/riscv: Use translator_ld* for everything target/cris: Use cris_fetch in translate_v10.c.inc target/cris: Use translator_ld* in cris_fetch target/avr: Use translator_lduw target/i386: Use translator_ldub for everything target/microblaze: Use translator_ldl target/hexagon: Use translator_ldl in pkt_crosses_page target/s390x: Disassemble EXECUTEd instructions target/s390x: Fix translator_fake_ld length accel/tcg: Introduce translator_fake_ld disas: Use translator_st to get disassembly data disas: Split disas.c accel/tcg: Return bool from TranslatorOps.disas_log accel/tcg: Provide default implementation of disas_log plugins: Merge alloc_tcg_plugin_context into plugin_gen_tb_start ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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4c833c60 |
| 03-Apr-2024 |
Richard Henderson <richard.henderson@linaro.org> |
disas: Use translator_st to get disassembly data
Read from already translated pages, or saved mmio data.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <ri
disas: Use translator_st to get disassembly data
Read from already translated pages, or saved mmio data.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
b9dbf6f9 |
| 30-Mar-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-tcg-20240329' of https://gitlab.com/rth7680/qemu into staging
linux-user: Fix shmat(NULL) for host != guest page size tcg/optimize: Fix sign_mask for logical right-shift accel/tcg: U
Merge tag 'pull-tcg-20240329' of https://gitlab.com/rth7680/qemu into staging
linux-user: Fix shmat(NULL) for host != guest page size tcg/optimize: Fix sign_mask for logical right-shift accel/tcg: Use CPUState.get_pc in cpu_io_recompile disas: Show opcodes for target_disas and monitor_disas
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmYHPmwdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV86VAf6AlcoLrvyN4u4bV4V # REIXe8y+IsqvNdNE6z1KRLdqbBzHHzlDD9TesX8QNmg1w8WxvBNg9Iv0cWeBgIyN # C/dpXVpNWbsfqtMLKIrBUkKiIyrQtxJC73HyoF0eqGftX5WxqYF/NCfXRHQFUdDP # wvGGq784IL4kLVMHX4fXB7Vmosei51cobnENo0b4A2fzDOGAFfQd38MSnPlL1+xb # BB+vV1hRFsf0Uihmvgk5AIdWlHxfqMWHq5rGV7ND26OTjZkOaPk3AeaX/eBCZd+8 # /gBd8Ok56WrVckz1hBMndRXwRjOQaowrNi1+vN3v6fqgNU227MaZ+hvvMCo7GSM7 # NhyQ9g== # =Y35A # -----END PGP SIGNATURE----- # gpg: Signature made Fri 29 Mar 2024 22:19:24 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-tcg-20240329' of https://gitlab.com/rth7680/qemu: accel/tcg: Use CPUState.get_pc in cpu_io_recompile disas: Show opcodes for target_disas and monitor_disas tcg/optimize: Fix sign_mask for logical right-shift tests/tcg: Test shmat(NULL) linux-user: Fix shmat(NULL) for h != g linux-user: Fix shmat() strace linux-user: Fix semctl() strace
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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13af3af1 |
| 28-Mar-2024 |
Richard Henderson <richard.henderson@linaro.org> |
disas: Show opcodes for target_disas and monitor_disas
Fixes: 83b4613ba83 ("disas: introduce show_opcodes") Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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27823850 |
| 11-May-2023 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-tcg-20230511-2' of https://gitlab.com/rth7680/qemu into staging
target/m68k: Fix gen_load_fp regression accel/tcg: Ensure fairness with icount disas: Move disas.c into the target-ind
Merge tag 'pull-tcg-20230511-2' of https://gitlab.com/rth7680/qemu into staging
target/m68k: Fix gen_load_fp regression accel/tcg: Ensure fairness with icount disas: Move disas.c into the target-independent source sets tcg: Use common routines for calling slow path helpers tcg/*: Cleanups to qemu_ld/st constraints tcg: Remove TARGET_ALIGNED_ONLY accel/tcg: Reorg system mode load/store helpers
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmRcxtYdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9arQf8Di7CnMQE/jW+8w6v # 5af0dX8/St2JnCXzG+qiW6mJm50Cy4GunCN66JcCAswpENvQLLsJP13c+4KTeB1T # rGBbedFXTw1LsaoOcBvwhq7RTIROz4GESTS4EZoJMlMhMv0VotekUPPz4NFMZRKX # LMvShM2C+f2p4HmDnnbki7M3+tMqpgoGCeBFX8Jy7/5sbpS/7ceXRio3ZRAhasPu # vjA0zqUtoTs7ijKpXf3uRl/c7xql+f0d7SDdCRt4OKasfLCCDwkjtMf6plZ2jzuS # OgwKc5N1jaMF6erHYZJIbfLLdUl20/JJEcbpU3Eh1XuHnzn1msS9JDOm2tvzwsto # OpOKUg== # =Lhy3 # -----END PGP SIGNATURE----- # gpg: Signature made Thu 11 May 2023 11:43:34 AM BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]
* tag 'pull-tcg-20230511-2' of https://gitlab.com/rth7680/qemu: (53 commits) target/loongarch: Do not include tcg-ldst.h accel/tcg: Reorg system mode store helpers accel/tcg: Reorg system mode load helpers accel/tcg: Introduce tlb_read_idx accel/tcg: Add cpu_in_serial_context tcg: Remove TARGET_ALIGNED_ONLY target/sh4: Remove TARGET_ALIGNED_ONLY target/sh4: Use MO_ALIGN where required target/nios2: Remove TARGET_ALIGNED_ONLY target/mips: Remove TARGET_ALIGNED_ONLY target/mips: Use MO_ALIGN instead of 0 target/mips: Add missing default_tcg_memop_mask target/mips: Add MO_ALIGN to gen_llwp, gen_scwp tcg/s390x: Simplify constraints on qemu_ld/st tcg/s390x: Use ALGFR in constructing softmmu host address tcg/riscv: Simplify constraints on qemu_ld/st tcg/ppc: Remove unused constraint J tcg/ppc: Remove unused constraints A, B, C, D tcg/ppc: Adjust constraints on qemu_ld/st tcg/ppc: Reorg tcg_out_tlb_read ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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e22d3c48 |
| 09-May-2023 |
Thomas Huth <thuth@redhat.com> |
disas: Move softmmu specific code to separate file
We'd like to move disas.c into the common code source set, where CONFIG_USER_ONLY is not available anymore. So we have to move the related code int
disas: Move softmmu specific code to separate file
We'd like to move disas.c into the common code source set, where CONFIG_USER_ONLY is not available anymore. So we have to move the related code into a separate file instead.
Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20230508133745.109463-2-thuth@redhat.com> [rth: Type change done in a separate patch] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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