#
06b40d25 |
| 27-Apr-2025 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'single-binary-20250425' of https://github.com/philmd/qemu into staging
Various patches loosely related to single binary work:
- Replace cpu_list() definition by CPUClass::list_cpus() cal
Merge tag 'single-binary-20250425' of https://github.com/philmd/qemu into staging
Various patches loosely related to single binary work:
- Replace cpu_list() definition by CPUClass::list_cpus() callback - Remove few MO_TE definitions on Hexagon / X86 targets - Remove target_ulong uses in ARMMMUFaultInfo and ARM CPUWatchpoint - Remove DEVICE_HOST_ENDIAN definition - Evaluate TARGET_BIG_ENDIAN at compile time and use target_needs_bswap() more - Rename target_words_bigendian() as target_big_endian() - Convert target_name() and target_cpu_type() to TargetInfo API - Constify QOM TypeInfo class_data/interfaces fields - Get default_cpu_type calling machine_class_default_cpu_type() - Correct various uses of GLibCompareDataFunc prototype - Simplify ARM/Aarch64 gdb_get_core_xml_file() handling a bit - Move device tree files in their own pc-bios/dtb/ subdir - Correctly check strchrnul() symbol availability on macOS SDK - Move target-agnostic methods out of cpu-target.c and accel-target.c - Unmap canceled USB XHCI packet - Use deposit/extract API in designware model - Fix MIPS16e translation - Few missing header fixes
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmgLqb8ACgkQ4+MsLN6t # wN6nCQ//cmv1M+NsndhO5TAK8T1eUSXKlTZh932uro6ZgxKwN4p+j1Qo7bq3O9gu # qUMHNbcfQl8sHSytiXBoxCjLMCXC3u38iyz75WGXuPay06rs4wqmahqxL4tyno3l # 1RviFts9xlLn+tJqqrAR6+pRdALld0TY+yXUjXgr4aK5pIRpLz9U/sIEoh7qbA5U # x0MTaceDG3A91OYo0TgrNbcMe1b9GqQZ+a4tbaP+oE37wbiKdyQ68LjrEbV08Y1O # qrFF4oxquV31QJcUiuII1W7hC6psGrMsUA1f1qDu7QvmybAZWNZNsR9T66X9jH5J # wXMShJmmXwxugohmuPPFnDshzJy90aFL6Jy2shrfqcG2v0W66ARY1ZnbJLCcfczt # 073bnE2dnOVhd/ny37RrIJNJLLmYM0yFDeKuYtNNAzpK9fpA7Q2PI8QiqNacQ3Pa # TdEYrGlMk7OeNck8xJmJMY5rATthi1D4dIBv3rjQbUolQvPJe2Y9or0R2WL1jK5v # hhr6DY01iSPES3CravmUs/aB1HRMPi/nX45OmFR6frAB7xqWMreh81heBVuoTTK8 # PuXtRQgRMRKwDeTxlc6p+zba4mIEYG8rqJtPFRgViNCJ1KsgSIowup3BNU05YuFn # NoPoRayMDVMgejVgJin3Mg2DCYvt/+MBmO4IoggWlFsXj59uUgA= # =DXnZ # -----END PGP SIGNATURE----- # gpg: Signature made Fri 25 Apr 2025 11:26:55 EDT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'single-binary-20250425' of https://github.com/philmd/qemu: (58 commits) qemu: Convert target_name() to TargetInfo API accel: Move target-agnostic code from accel-target.c -> accel-common.c accel: Make AccelCPUClass structure target-agnostic accel: Include missing 'qemu/accel.h' header in accel-internal.h accel: Implement accel_init_ops_interfaces() for both system/user mode cpus: Move target-agnostic methods out of cpu-target.c cpus: Replace CPU_RESOLVING_TYPE -> target_cpu_type() qemu: Introduce target_cpu_type() qapi: Rename TargetInfo structure as QemuTargetInfo hw/microblaze: Evaluate TARGET_BIG_ENDIAN at compile time hw/mips: Evaluate TARGET_BIG_ENDIAN at compile time target/xtensa: Evaluate TARGET_BIG_ENDIAN at compile time target/mips: Check CPU endianness at runtime using env_is_bigendian() accel/kvm: Use target_needs_bswap() linux-user/elfload: Use target_needs_bswap() target/hexagon: Include missing 'accel/tcg/getpc.h' accel/tcg: Correct list of included headers in tcg-stub.c system/kvm: make functions accessible from common code meson: Use osdep_prefix for strchrnul() meson: Share common C source prefixes ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
12d1a768 |
| 09-Feb-2025 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
qom: Have class_init() take a const data argument
Mechanical change using gsed, then style manually adapted to pass checkpatch.pl script.
Suggested-by: Richard Henderson <richard.henderson@linaro.o
qom: Have class_init() take a const data argument
Mechanical change using gsed, then style manually adapted to pass checkpatch.pl script.
Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250424194905.82506-4-philmd@linaro.org>
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#
7433709a |
| 14-Jan-2025 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'hw-misc-20250113' of https://github.com/philmd/qemu into staging
Misc HW patches queue
- Silent unuseful DTC warnings (Philippe) - Unify QDev hotplug decision logic (Akihiko) - Rework Xi
Merge tag 'hw-misc-20250113' of https://github.com/philmd/qemu into staging
Misc HW patches queue
- Silent unuseful DTC warnings (Philippe) - Unify QDev hotplug decision logic (Akihiko) - Rework XilinX EthLite RAM buffers (Philippe) - Convert vmcoreinfo to 3-phase reset (Philippe) - Convert HPPA CPUs to 3-phase reset (Helge) - Fix UFS endianness issue (Keoseong) - Introduce pci_set_enabled (Akihiko) - Clarify Enclave and Firecracker relationship (Alexander) - Set SDHCI DMA interrupt status bit in correct place (Bernhard) - Fix leak in cryptodev-vhost-user backend (Gabriel) - Fixes on PCI USB XHCI (Phil) - Convert DPRINTF to trace events (Nikita, Bernhard) - Remove &first_cpu in TriCore machine (Philippe) - Checkpatch style cleanups (Bibo) - MAINTAINERS updates (Marcin, Gustavo, Akihiko) - Add default configuration for b4 tool (Jiaxun)
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmeFTq0ACgkQ4+MsLN6t # wN6F2RAA0hhgXYf1BAn0DQI5O/oOzt6WzkwL/yQhKff1piWMcCZbHCOn8JHETE4R # QTqg+OMGuw4Q55YSwqwHW98JIQI/lRbSUX9Vc3km4QxED5owHiqu9wk//KSLv3TY # y86CRbibb0Uy6vEM4J1WK6ATiLePWZ6qzePQX59f9YEagTLM2XO2DasRu+wGDbt+ # 96fPnT7Tx2Bu5jU8+sZ36mw3wWSJo/pLQBE9siH4N33v2I5ntmMs1Lbe7QscDDsw # 1+OOti3lB4q5chNMYNQyPxvz75QIi9et7wREJM9Vt03OpEpj+vWMGzwZFNLfOmeu # eApgcQP/k6z1+pAGjEo5mwNOZcZtR9I/3Uf/sONvO0N5FlJq9CSOTs7L2EddcFzM # lVDZjwEHIoU1xCohqNy2A0Q1s20dNfBEjPEUCuh+tIvFk9cy1L8uZtBVFNUCb33J # Jq8KAkqXAaVj2tHGa27DwFjSTo4olU/G0WO4AQZNwdxvMQwX88gHOGMJkRmJPRVi # ErKD0/bBfVa6orEAorWYwQSnTP1H/2fGfF6rLtI5GvQtPc/jBG3+KpEOS+vc2nzG # 1fq+Kty8kWsU4Fpw3EUHvflnzG4Ujhuc/nJ+FyQhn89Erb49jxBlu25lQOLVRVa4 # gP+jsgi46+4goYzj1vrpTpBgFPFWKGCl1gGz17ij5WyvVXroRzA= # =+uup # -----END PGP SIGNATURE----- # gpg: Signature made Mon 13 Jan 2025 12:34:37 EST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'hw-misc-20250113' of https://github.com/philmd/qemu: (55 commits) Add a b4 configuration file MAINTAINERS: Update path to coreaudio.m MAINTAINERS: Add me as the maintainer for ivshmem-flat MAINTAINERS: remove myself from sbsa-ref hw/tricore/triboard: Remove unnecessary use of &first_cpu hw/usb/hcd-xhci-pci: Use event ring 0 if mapping unsupported hw/usb/hcd-xhci-pci: Use modulo to select MSI vector as per spec backends/cryptodev-vhost-user: Fix local_error leaks hw/loongarch/virt: Checkpatch cleanup target/hppa: Speed up hppa_is_pa20() target/hppa: Set PC on vCPU reset target/hppa: Only set PSW 'M' bit on reset hw/hppa: Reset vCPUs calling resettable_reset() target/hppa: Convert hppa_cpu_init() to ResetHold handler tests: Add functional tests for HPPA machines tests/qtest/boot-serial-test: Correct HPPA machine name hw/gpio/imx_gpio: Turn DPRINTF() into trace events hw/i2c/imx_i2c: Convert DPRINTF() to trace events hw/char/imx_serial: Turn some DPRINTF() statements into trace events hw/misc/imx6_src: Convert DPRINTF() to trace events ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
78b0c15a |
| 28-Dec-2024 |
Gabriel Barrantes <gabriel.barrantes.dev@outlook.com> |
backends/cryptodev-vhost-user: Fix local_error leaks
Do not propagate error to the upper, directly output the error to avoid leaks.
Fixes: 2fda101de07 ("virtio-crypto: Support asynchronous mode") R
backends/cryptodev-vhost-user: Fix local_error leaks
Do not propagate error to the upper, directly output the error to avoid leaks.
Fixes: 2fda101de07 ("virtio-crypto: Support asynchronous mode") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2714 Signed-off-by: Gabriel Barrantes <gabriel.barrantes.dev@outlook.com> Reviewed-by: zhenwei pi <pizhenwei@bytedance.com> Message-Id: <DM8PR13MB50781054A4FDACE6F4FB6469B30F2@DM8PR13MB5078.namprd13.prod.outlook.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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#
65cb7129 |
| 21-Dec-2024 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'exec-20241220' of https://github.com/philmd/qemu into staging
Accel & Exec patch queue
- Ignore writes to CNTP_CTL_EL0 on HVF ARM (Alexander) - Add '-d invalid_mem' logging option (Zolta
Merge tag 'exec-20241220' of https://github.com/philmd/qemu into staging
Accel & Exec patch queue
- Ignore writes to CNTP_CTL_EL0 on HVF ARM (Alexander) - Add '-d invalid_mem' logging option (Zoltan) - Create QOM containers explicitly (Peter) - Rename sysemu/ -> system/ (Philippe) - Re-orderning of include/exec/ headers (Philippe) Move a lot of declarations from these legacy mixed bag headers: . "exec/cpu-all.h" . "exec/cpu-common.h" . "exec/cpu-defs.h" . "exec/exec-all.h" . "exec/translate-all" to these more specific ones: . "exec/page-protection.h" . "exec/translation-block.h" . "user/cpu_loop.h" . "user/guest-host.h" . "user/page-protection.h"
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmdlnyAACgkQ4+MsLN6t # wN6mBw//QFWi7CrU+bb8KMM53kOU9C507tjn99LLGFb5or73/umDsw6eo/b8DHBt # KIwGLgATel42oojKfNKavtAzLK5rOrywpboPDpa3SNeF1onW+99NGJ52LQUqIX6K # A6bS0fPdGG9ZzEuPpbjDXlp++0yhDcdSgZsS42fEsT7Dyj5gzJYlqpqhiXGqpsn8 # 4Y0UMxSL21K3HEexlzw2hsoOBFA3tUm2ujNDhNkt8QASr85yQVLCypABJnuoe/// # 5Ojl5wTBeDwhANET0rhwHK8eIYaNboiM9fHopJYhvyw1bz6yAu9jQwzF/MrL3s/r # xa4OBHBy5mq2hQV9Shcl3UfCQdk/vDaYaWpgzJGX8stgMGYfnfej1SIl8haJIfcl # VMX8/jEFdYbjhO4AeGRYcBzWjEJymkDJZoiSWp2NuEDi6jqIW+7yW1q0Rnlg9lay # ShAqLK5Pv4zUw3t0Jy3qv9KSW8sbs6PQxtzXjk8p97rTf76BJ2pF8sv1tVzmsidP # 9L92Hv5O34IqzBu2oATOUZYJk89YGmTIUSLkpT7asJZpBLwNM2qLp5jO00WVU0Sd # +kAn324guYPkko/TVnjC/AY7CMu55EOtD9NU35k3mUAnxXT9oDUeL4NlYtfgrJx6 # x1Nzr2FkS68+wlPAFKNSSU5lTjsjNaFM0bIJ4LCNtenJVP+SnRo= # =cjz8 # -----END PGP SIGNATURE----- # gpg: Signature made Fri 20 Dec 2024 11:45:20 EST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'exec-20241220' of https://github.com/philmd/qemu: (59 commits) util/qemu-timer: fix indentation meson: Do not define CONFIG_DEVICES on user emulation system/accel-ops: Remove unnecessary 'exec/cpu-common.h' header system/numa: Remove unnecessary 'exec/cpu-common.h' header hw/xen: Remove unnecessary 'exec/cpu-common.h' header target/mips: Drop left-over comment about Jazz machine target/mips: Remove tswap() calls in semihosting uhi_fstat_cb() target/xtensa: Remove tswap() calls in semihosting simcall() helper accel/tcg: Un-inline translator_is_same_page() accel/tcg: Include missing 'exec/translation-block.h' header accel/tcg: Move tcg_cflags_has/set() to 'exec/translation-block.h' accel/tcg: Restrict curr_cflags() declaration to 'internal-common.h' qemu/coroutine: Include missing 'qemu/atomic.h' header exec/translation-block: Include missing 'qemu/atomic.h' header accel/tcg: Declare cpu_loop_exit_requested() in 'exec/cpu-common.h' exec/cpu-all: Include 'cpu.h' earlier so MMU_USER_IDX is always defined target/sparc: Move sparc_restore_state_to_opc() to cpu.c target/sparc: Uninline cpu_get_tb_cpu_state() target/loongarch: Declare loongarch_cpu_dump_state() locally user: Move various declarations out of 'exec/exec-all.h' ...
Conflicts: hw/char/riscv_htif.c hw/intc/riscv_aplic.c target/s390x/cpu.c
Apply sysemu header path changes to not in the pull request.
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
32cad1ff |
| 03-Dec-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
include: Rename sysemu/ -> system/
Headers in include/sysemu/ are not only related to system *emulation*, they are also used by virtualization. Rename as system/ which is clearer.
Files renamed man
include: Rename sysemu/ -> system/
Headers in include/sysemu/ are not only related to system *emulation*, they are also used by virtualization. Rename as system/ which is clearer.
Files renamed manually then mechanical change using sed tool.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Lei Yang <leiyang@redhat.com> Message-Id: <20241203172445.28576-1-philmd@linaro.org>
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#
b8eada54 |
| 10-Sep-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-qapi-2024-09-10' of https://repo.or.cz/qemu/armbru into staging
QAPI patches patches for 2024-09-10
# -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEENUvIs9frKmtoZ05fOHC0AOuRhlMFA
Merge tag 'pull-qapi-2024-09-10' of https://repo.or.cz/qemu/armbru into staging
QAPI patches patches for 2024-09-10
# -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEENUvIs9frKmtoZ05fOHC0AOuRhlMFAmbgS0ASHGFybWJydUBy # ZWRoYXQuY29tAAoJEDhwtADrkYZTm+sP/1kEuGdbjjVLQC7U+gCClhALpYUtIMHQ # qNZWmnxFyW9Jx6Lk8+FZBRJegNlmA9AJ2ZzD/2I/WoNtcrNiE53rIRG71Lcy8I6U # CRjekLPn0jhFuYhmRfwz6ilcLkyMJ15Yi7iG6ssFsO1joBtU5Q1qpzQmFUl9UbV9 # 9iBe7mE99VzNwi3hMELEM9YuSgAs8st4Itnn8SiHkJ3s6hlmF8N4HwNKfQrseGfb # FuJNN4p8Gcu0aF/dkGE8ADJBvtgzkFnavXt0GQPC7SjGOF7rUXxnUQlszNZM0OcK # UAfWU06sIyiOholQQt8H8jawT+rGCLomfgPUBVq5K8WByd21IeQeS0upSPeTjxS+ # d/C8wzpcbhdNOECwC/wDtgZHvCC95cHNrxuC4+4/Q1KIVVr+1cWqe8hQzFvm3TIg # dduEFTQDIxhpE0GO1ZWNf90upzBYBWwIsh4bqsMZS7SpaYIZ6QV45yViZ1w2WfbH # m3/F34Z3yqgFuZQrZv4OPo7xHK0+y7uZ60RrhSJtE0X080syRJKBbGmNBRidoVyu # JOONWH44I/XN5enZV8StJnqJr9MCV0DBZUCi9ZhP/kAhBjLc5cQ6NByEa9/rebYX # 1bLTiA1JDLzDVIan+A8dz0riWmHBvTyBwhLnEXvXb9lcB3ozgHTb7axE5RnZSYLI # YQgBOBMFuQKM # =YO/Q # -----END PGP SIGNATURE----- # gpg: Signature made Tue 10 Sep 2024 14:36:00 BST # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653
* tag 'pull-qapi-2024-09-10' of https://repo.or.cz/qemu/armbru: qapi/vfio: Rename VfioMigrationState to Qapi*, and drop prefix qapi/cryptodev: Rename QCryptodevBackendAlgType to *Algo, and drop prefix qapi/cryptodev: Drop unwanted 'prefix' qapi/crypto: Rename QCryptoAFAlg to QCryptoAFAlgo qapi/crypto: Rename QCryptoRSAPaddingAlgorithm to *Algo, and drop prefix qapi/crypto: Rename QCryptoAkCipherAlgorithm to *Algo, and drop prefix qapi/crypto: Rename QCryptoIVGenAlgorithm to *Algo, and drop prefix qapi/crypto: Rename QCryptoCipherAlgorithm to *Algo, and drop prefix qapi/crypto: Rename QCryptoHashAlgorithm to *Algo, and drop prefix qapi/crypto: Drop unwanted 'prefix' qapi/machine: Rename CpuS390* to S390Cpu*, and drop 'prefix' qapi/ui: Drop temporary 'prefix' qapi/machine: Drop temporary 'prefix' qapi/ebpf: Drop temporary 'prefix' qapi/crypto: Drop temporary 'prefix' qapi/common: Drop temporary 'prefix' qapi/block-core: Drop temporary 'prefix' tests/qapi-schema: Drop temporary 'prefix' qapi: Smarter camel_to_upper() to reduce need for 'prefix'
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
d0917d79 |
| 04-Sep-2024 |
Markus Armbruster <armbru@redhat.com> |
qapi/cryptodev: Drop unwanted 'prefix'
QAPI's 'prefix' feature can make the connection between enumeration type and its constants less than obvious. It's best used with restraint.
QCryptodevBacken
qapi/cryptodev: Drop unwanted 'prefix'
QAPI's 'prefix' feature can make the connection between enumeration type and its constants less than obvious. It's best used with restraint.
QCryptodevBackendServiceType has a 'prefix' that overrides the generated enumeration constants' prefix to QCRYPTODEV_BACKEND_SERVICE.
Drop it. The prefix becomes QCRYPTODEV_BACKEND_SERVICE_TYPE.
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20240904111836.3273842-18-armbru@redhat.com>
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#
390e8fc6 |
| 26-Jun-2023 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
virtio,pc,pci: fixes, features, cleanups
asymmetric crypto support for cryptodev-vhost-user rom migration w
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
virtio,pc,pci: fixes, features, cleanups
asymmetric crypto support for cryptodev-vhost-user rom migration when rom size changes poison get, inject, clear; mock cxl events and irq support for cxl shadow virtqueue offload support for vhost-vdpa vdpa now maps shadow vrings with MAP_SHARED max_cpus went up to 1024 and we default to smbios 3.0 for pc
Fixes, cleanups all over the place. In particular hw/acpi: Fix PM control register access works around a very long standing bug in memory core.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
# -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmSZl5EPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRph+8H/RZodqCadmQ1evpeWs7RBSvJeZgbJTVl/9/h # +ObvEmVz2+X4D+O1Kxh54vDV0SNVq3XjyrFy3Ur57MAR6r2ZWwB6HySaeFdi4zIm # N0SMkfUylDnf7ulyjzJoXDzHOoFnqAM6fU/jcoQXBIdUeeqwPrzLOZHrGrwevPWK # iH5JP66suOVlBuKLJjlUKI3/4vK3oTod5Xa3Oz2Cw1oODtbIa97N8ZAdBgZd3ah9 # 7mjZjcH54kFRwfidz/rkpY5NMru8BlD54MyEOWofvTL2w7aoWmVO99qHEK+SjLkG # x4Mx3aYlnOEvkJ+5yBHvtXS4Gc5T9ltY84AvcwPNuz4RKCORi1s= # =Do8p # -----END PGP SIGNATURE----- # gpg: Signature made Mon 26 Jun 2023 03:50:09 PM CEST # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [undefined] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469
* tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (53 commits) vhost-vdpa: do not cleanup the vdpa/vhost-net structures if peer nic is present vhost_net: add an assertion for TAP client backends intel_iommu: Fix address space unmap intel_iommu: Fix flag check in replay intel_iommu: Fix a potential issue in VFIO dirty page sync vhost-user: fully use new backend/frontend naming virtio-scsi: avoid dangling host notifier in ->ioeventfd_stop() hw/i386/pc: Clean up pc_machine_initfn vdpa: fix not using CVQ buffer in case of error vdpa: mask _F_CTRL_GUEST_OFFLOADS for vhost vdpa devices vhost: fix vhost_dev_enable_notifiers() error case vdpa: Allow VIRTIO_NET_F_CTRL_GUEST_OFFLOADS in SVQ vdpa: Add vhost_vdpa_net_load_offloads() virtio-net: expose virtio_net_supported_guest_offloads() hw/net/virtio-net: make some VirtIONet const vdpa: reuse virtio_vdev_has_feature() include/hw/virtio: make some VirtIODevice const vdpa: map shadow vrings with MAP_SHARED vdpa: reorder vhost_vdpa_net_cvq_cmd_page_len function vdpa: do not block migration if device has cvq and x-svq=on ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
5c33f978 |
| 16-May-2023 |
Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com> |
cryptodev-vhost-user: add asymmetric crypto support
Add asymmetric crypto support in vhost_user backend.
Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com> Message-Id: <2023051608
cryptodev-vhost-user: add asymmetric crypto support
Add asymmetric crypto support in vhost_user backend.
Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com> Message-Id: <20230516083139.2349744-1-gmuthukrishn@marvell.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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#
674acdd1 |
| 10-Mar-2023 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
virtio,pc,pci: features, fixes
Several features that landed at the last possible moment:
Passthrough HDM d
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
virtio,pc,pci: features, fixes
Several features that landed at the last possible moment:
Passthrough HDM decoder emulation Refactor cryptodev RAS error emulation and injection acpi-index support on non-hotpluggable slots Dynamically switch to vhost shadow virtqueues at vdpa net migration
Plus a couple of bugfixes that look important to have in the release.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
# -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmQJ8TYPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRp37YIAMpQA5/ddmKKz/ABtBMHB5JX/SVYcG+1xkBR # j9IFYusOfmmDfmgAhv0Qxi9+Wik95lszVZUnphvocSGd0PXH47pK7yv9RZ1ttaYX # oAbXrGqXo8rUhl1ksQsJ8Iasj2di1BLP0byPuozbRkg1Kkz5TqRd9+hBqSBGEx21 # tsP5708UVCDAriwYYO78Cx0ZasmB9bqqeom5FdEsg9sYJ5aElOOvitp9YO1p2xhU # gRvhD+k/aqNi+mfOUF7qGDBanxKgx75VV/KU1cjjS9R1vNtwRhfc/26PBrROY00a # wkZWnAxmzDFKRS6cEfeb+eDGEVjC3IqLAjcFeuAIT/78CwdvIiY= # =e1yv # -----END PGP SIGNATURE----- # gpg: Signature made Thu 09 Mar 2023 14:46:14 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469
* tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (72 commits) virtio: fix reachable assertion due to stale value of cached region size hw/virtio/vhost-user: avoid using unitialized errp hw/pxb-cxl: Support passthrough HDM Decoders unless overridden hw/pci: Add pcie_count_ds_port() and pcie_find_port_first() helpers hw/mem/cxl_type3: Add CXL RAS Error Injection Support. hw/pci/aer: Make PCIE AER error injection facility available for other emulation to use. hw/cxl: Fix endian issues in CXL RAS capability defaults / masks hw/mem/cxl-type3: Add AER extended capability hw/pci-bridge/cxl_root_port: Wire up MSI hw/pci-bridge/cxl_root_port: Wire up AER hw/pci/aer: Add missing routing for AER errors hw/pci/aer: Implement PCI_ERR_UNCOR_MASK register pcihp: add ACPI PCI hotplug specific is_hotpluggable_bus() callback pcihp: move fields enabling hotplug into AcpiPciHpState acpi: pci: move out ACPI PCI hotplug generator from generic slot generator build_append_pci_bus_devices() acpi: pci: move BSEL into build_append_pcihp_slots() acpi: pci: drop BSEL usage when deciding that device isn't hotpluggable pci: move acpi-index uniqueness check to generic PCI device code tests: acpi: update expected blobs tests: acpi: add non zero function device with acpi-index on non-hotpluggble bus ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
bc304a64 |
| 01-Mar-2023 |
zhenwei pi <pizhenwei@bytedance.com> |
cryptodev: Introduce server type in QAPI
Introduce cryptodev service type in cryptodev.json, then apply this to related codes. Now we can remove VIRTIO_CRYPTO_SERVICE_xxx dependence from QEMU crypto
cryptodev: Introduce server type in QAPI
Introduce cryptodev service type in cryptodev.json, then apply this to related codes. Now we can remove VIRTIO_CRYPTO_SERVICE_xxx dependence from QEMU cryptodev.
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: zhenwei pi <pizhenwei@bytedance.com> Message-Id: <20230301105847.253084-5-pizhenwei@bytedance.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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#
3f478371 |
| 01-Mar-2023 |
zhenwei pi <pizhenwei@bytedance.com> |
cryptodev: Remove 'name' & 'model' fields
We have already used qapi to generate crypto device types, this allows to convert type to a string 'model', so the 'model' field is not needed.
And the 'na
cryptodev: Remove 'name' & 'model' fields
We have already used qapi to generate crypto device types, this allows to convert type to a string 'model', so the 'model' field is not needed.
And the 'name' field is not used by any backend driver, drop it.
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: zhenwei pi <pizhenwei@bytedance.com> Message-Id: <20230301105847.253084-3-pizhenwei@bytedance.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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#
14c9fd16 |
| 01-Mar-2023 |
zhenwei pi <pizhenwei@bytedance.com> |
cryptodev: Introduce cryptodev.json
Introduce QCryptodevBackendType in cryptodev.json, also apply this to related codes. Then we can drop 'enum CryptoDevBackendOptionsType'.
Note that `CRYPTODEV_BA
cryptodev: Introduce cryptodev.json
Introduce QCryptodevBackendType in cryptodev.json, also apply this to related codes. Then we can drop 'enum CryptoDevBackendOptionsType'.
Note that `CRYPTODEV_BACKEND_TYPE_NONE` is *NOT* used by anywhere, so drop it(no 'none' enum in QCryptodevBackendType).
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: zhenwei pi <pizhenwei@bytedance.com> Message-Id: <20230301105847.253084-2-pizhenwei@bytedance.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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#
f21f1cfe |
| 07-Nov-2022 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
pci,pc,virtio: features, tests, fixes, cleanups
lots of acpi rework first version of biosbits infrastructur
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
pci,pc,virtio: features, tests, fixes, cleanups
lots of acpi rework first version of biosbits infrastructure ASID support in vhost-vdpa core_count2 support in smbios PCIe DOE emulation virtio vq reset HMAT support part of infrastructure for viommu support in vhost-vdpa VTD PASID support fixes, tests all over the place
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
# -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmNpXDkPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRpD0AH/2G8ZPrgrxJC9y3uD5/5J6QRzO+TsDYbg5ut # uBf4rKSHHzcu6zdyAfsrhbAKKzyD4HrEGNXZrBjnKM1xCiB/SGBcDIWntwrca2+s # 5Dpbi4xvd4tg6tVD4b47XNDCcn2uUbeI0e2M5QIbtCmzdi/xKbFAfl5G8DQp431X # Kmz79G4CdKWyjVlM0HoYmdCw/4FxkdjD02tE/Uc5YMrePNaEg5Bw4hjCHbx1b6ur # 6gjeXAtncm9s4sO0l+sIdyiqlxiTry9FSr35WaQ0qPU+Og5zaf1EiWfdl8TRo4qU # EAATw5A4hyw11GfOGp7oOVkTGvcNB/H7aIxD7emdWZV8+BMRPKo= # =zTCn # -----END PGP SIGNATURE----- # gpg: Signature made Mon 07 Nov 2022 14:27:53 EST # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469
* tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (83 commits) checkpatch: better pattern for inline comments hw/virtio: introduce virtio_device_should_start tests/acpi: update tables for new core count test bios-tables-test: add test for number of cores > 255 tests/acpi: allow changes for core_count2 test bios-tables-test: teach test to use smbios 3.0 tables hw/smbios: add core_count2 to smbios table type 4 vhost-user: Support vhost_dev_start vhost: Change the sequence of device start intel-iommu: PASID support intel-iommu: convert VTD_PE_GET_FPD_ERR() to be a function intel-iommu: drop VTDBus intel-iommu: don't warn guest errors when getting rid2pasid entry vfio: move implement of vfio_get_xlat_addr() to memory.c tests: virt: Update expected *.acpihmatvirt tables tests: acpi: aarch64/virt: add a test for hmat nodes with no initiators hw/arm/virt: Enable HMAT on arm virt machine tests: Add HMAT AArch64/virt empty table files tests: acpi: q35: update expected blobs *.hmat-noinitiators expected HMAT: tests: acpi: q35: add test for hmat nodes without initiators ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
2fda101d |
| 08-Oct-2022 |
Lei He <helei.sig11@bytedance.com> |
virtio-crypto: Support asynchronous mode
virtio-crypto: Modify the current interface of virtio-crypto device to support asynchronous mode.
Signed-off-by: lei he <helei.sig11@bytedance.com> Message-
virtio-crypto: Support asynchronous mode
virtio-crypto: Modify the current interface of virtio-crypto device to support asynchronous mode.
Signed-off-by: lei he <helei.sig11@bytedance.com> Message-Id: <20221008085030.70212-2-helei.sig11@bytedance.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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#
5eff7bad |
| 30-Oct-2022 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'pull-error-2022-10-28' of https://repo.or.cz/qemu/armbru into staging
Error reporting patches for 2022-10-28
# -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEENUvIs9frKmtoZ05fOHC0AOuRh
Merge tag 'pull-error-2022-10-28' of https://repo.or.cz/qemu/armbru into staging
Error reporting patches for 2022-10-28
# -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEENUvIs9frKmtoZ05fOHC0AOuRhlMFAmNbcVMSHGFybWJydUBy # ZWRoYXQuY29tAAoJEDhwtADrkYZTpWwQAKkM9rulU/ulNEI8nLzyUoabVi9ZIUY0 # UsU0jGzve7v6HKHeWnCryjECeMOa/lS5sc6MUegRXvu6PJLyThXWCoQuluz2oyz2 # tPs9g4lo3TKjZuxAHFVnHpu8cpXInRejuc0/0p9mMYmpKYiJYbQE4o52C1srzjLK # +1h0oTaFh5LtapCbqDQqKvuNfwU9TqJQW6CzNQTdYWXNK1MS0ALLSGJA6lzDkqmT # H0E+Y33LRfz2kllsSRRJdghzBhGfGEp80FABNUBECnwkaL27vZev5nTn3/DRQOs+ # 2V8lTrOm+QqOueKE9AkZTOT5OF6vXXNCvtcYeFpSGhqjbOyMU1X0I/hzQu/GraCm # 59SDOcuQMUErM5sgoOPh1+0VAwjZ9tWUS1NioyGzdPBeF/DiOqx7e1HwKdvYIOQb # 6cndxg1ctAwhuNyG5bKvnQJkV2AHl9xWNrdypnVISXhR7pMmrtXan8LZCVHMuA2z # e5dmuDu/L7LpNy61zK5/oeU8PKgSxliea09Foh0QXSDo2WqoXKUmBPfr5Jbddjbu # 8IuL3ZtUs4zP8jODm38iiFANnsjxGt9AByFSwe/byuY/3dqxoWzVxNbnWcVxOH8e # 8CvXSvX2HQhwgq7C2TwZ5XQaK+7gBRHSBOeD9GYuPQLMPPAthHaRQzIRuoPaFAn6 # aPamW/RKYBPP # =lhw3 # -----END PGP SIGNATURE----- # gpg: Signature made Fri 28 Oct 2022 02:06:11 EDT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653
* tag 'pull-error-2022-10-28' of https://repo.or.cz/qemu/armbru: qerror: QERR_PERMISSION_DENIED is no longer used, drop qtest: Improve error messages when property can not be set right now backends: Improve error messages when property can no longer be set qom: Improve error messages when property has no getter or setter
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
ff924448 |
| 12-Oct-2022 |
Markus Armbruster <armbru@redhat.com> |
backends: Improve error messages when property can no longer be set
When you try to set virtio-rng property "filename" after the backend has been completed with user_creatable_complete(), the error
backends: Improve error messages when property can no longer be set
When you try to set virtio-rng property "filename" after the backend has been completed with user_creatable_complete(), the error message blames "insufficient permission":
$ qemu-system-x86_64 -S -display none -nodefaults -monitor stdio -object rng-random,id=rng0 -device virtio-rng,id=vrng0,rng=rng0 QEMU 7.1.50 monitor - type 'help' for more information (qemu) qom-set /objects/rng0 filename /dev/random Error: Insufficient permission to perform this operation
This implies it could work with "sufficient permission". It can't. Change the error message to:
Error: Property 'filename' can no longer be set
Same for cryptodev-vhost-user property "chardev", rng-egd property "chardev", and vhost-user-backend property "chardev".
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20221012153801.2604340-3-armbru@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> [Commit message tidied up]
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#
a28498b1 |
| 16-Jun-2022 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'for_upstream' of git://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
virtio,pc,pci: fixes,cleanups,features
more CXL patches RSA support for crypto fixes, cleanups all over the p
Merge tag 'for_upstream' of git://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
virtio,pc,pci: fixes,cleanups,features
more CXL patches RSA support for crypto fixes, cleanups all over the place
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
# -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmKrYLMPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRpwpwH/2IS+V7wS3q/XXPz1HndJLpUP/z+mkeu9W6+ # X1U9CJ+66Ag4eD5T/jzoN0JEjiTeET/3xM+PY5NYZCh6QTAmA7EfFZv99oNWpGd1 # +nyxOdaMDPSscOKjLfDziVTi/QYIZBtU6TeixL9whkipYCqmgbs5gXV8ynltmKyF # bIJVeaXm5yQLcCTGzKzdXf+HmTErpEGDCDHFjzrLVjICRDdekElGVwYTn+ycl7p7 # oLsWWVDgqo0p86BITlrHUXUrxTXF3wyg2B59cT7Ilbb3o+Fa2GsP+o9IXMuVoNNp # A+zrq1QZ49UO3XwkS03xDDioUQ1T/V0L4w9dEfaGvpY4Horv0HI= # =PvmT # -----END PGP SIGNATURE----- # gpg: Signature made Thu 16 Jun 2022 09:56:19 AM PDT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [undefined] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469
* tag 'for_upstream' of git://git.kernel.org/pub/scm/virt/kvm/mst/qemu: acpi/erst: fix fallthrough code upon validation failure vhost: also check queue state in the vhost_dev_set_log error routine crypto: Introduce RSA algorithm virtio-iommu: Add an assert check in translate routine virtio-iommu: Use recursive lock to avoid deadlock virtio-iommu: Add bypass mode support to assigned device virtio/vhost-user: Fix wrong vhost notifier GPtrArray size docs/cxl: Add switch documentation pci-bridge/cxl_downstream: Add a CXL switch downstream port pci-bridge/cxl_upstream: Add a CXL switch upstream port
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
0e660a6f |
| 11-Jun-2022 |
zhenwei pi <pizhenwei@bytedance.com> |
crypto: Introduce RSA algorithm
There are two parts in this patch: 1, support akcipher service by cryptodev-builtin driver 2, virtio-crypto driver supports akcipher service
In principle, we should
crypto: Introduce RSA algorithm
There are two parts in this patch: 1, support akcipher service by cryptodev-builtin driver 2, virtio-crypto driver supports akcipher service
In principle, we should separate this into two patches, to avoid compiling error, merge them into one.
Then virtio-crypto gets request from guest side, and forwards the request to builtin driver to handle it.
Test with a guest linux: 1, The self-test framework of crypto layer works fine in guest kernel 2, Test with Linux guest(with asym support), the following script test(note that pkey_XXX is supported only in a newer version of keyutils): - both public key & private key - create/close session - encrypt/decrypt/sign/verify basic driver operation - also test with kernel crypto layer(pkey add/query)
All the cases work fine.
Run script in guest: rm -rf *.der *.pem *.pfx modprobe pkcs8_key_parser # if CONFIG_PKCS8_PRIVATE_KEY_PARSER=m rm -rf /tmp/data dd if=/dev/random of=/tmp/data count=1 bs=20
openssl req -nodes -x509 -newkey rsa:2048 -keyout key.pem -out cert.pem -subj "/C=CN/ST=BJ/L=HD/O=qemu/OU=dev/CN=qemu/emailAddress=qemu@qemu.org" openssl pkcs8 -in key.pem -topk8 -nocrypt -outform DER -out key.der openssl x509 -in cert.pem -inform PEM -outform DER -out cert.der
PRIV_KEY_ID=`cat key.der | keyctl padd asymmetric test_priv_key @s` echo "priv key id = "$PRIV_KEY_ID PUB_KEY_ID=`cat cert.der | keyctl padd asymmetric test_pub_key @s` echo "pub key id = "$PUB_KEY_ID
keyctl pkey_query $PRIV_KEY_ID 0 keyctl pkey_query $PUB_KEY_ID 0
echo "Enc with priv key..." keyctl pkey_encrypt $PRIV_KEY_ID 0 /tmp/data enc=pkcs1 >/tmp/enc.priv echo "Dec with pub key..." keyctl pkey_decrypt $PRIV_KEY_ID 0 /tmp/enc.priv enc=pkcs1 >/tmp/dec cmp /tmp/data /tmp/dec
echo "Sign with priv key..." keyctl pkey_sign $PRIV_KEY_ID 0 /tmp/data enc=pkcs1 hash=sha1 > /tmp/sig echo "Verify with pub key..." keyctl pkey_verify $PRIV_KEY_ID 0 /tmp/data /tmp/sig enc=pkcs1 hash=sha1
echo "Enc with pub key..." keyctl pkey_encrypt $PUB_KEY_ID 0 /tmp/data enc=pkcs1 >/tmp/enc.pub echo "Dec with priv key..." keyctl pkey_decrypt $PRIV_KEY_ID 0 /tmp/enc.pub enc=pkcs1 >/tmp/dec cmp /tmp/data /tmp/dec
echo "Verify with pub key..." keyctl pkey_verify $PUB_KEY_ID 0 /tmp/data /tmp/sig enc=pkcs1 hash=sha1
Reviewed-by: Gonglei <arei.gonglei@huawei.com> Signed-off-by: lei he <helei.sig11@bytedance.com Signed-off-by: zhenwei pi <pizhenwei@bytedance.com> Message-Id: <20220611064243.24535-2-pizhenwei@bytedance.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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9a2ea4f4 |
| 30-Oct-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-5.2-pull-request' into staging
Pull request trivial branch 20201027
# gpg: Signature made Tue 27 Oct 2020 16:29:47 GMT # gpg:
Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-5.2-pull-request' into staging
Pull request trivial branch 20201027
# gpg: Signature made Tue 27 Oct 2020 16:29:47 GMT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C
* remotes/vivier2/tags/trivial-branch-for-5.2-pull-request: CHANGELOG: remove disused file qdev: Fix two typos scripts/qmp: delete 'qmp' script cryptodev: Fix Lesser GPL version number io: Fix Lesser GPL version number cpus: Drop declaration of cpu_remove() Makefile: Add *.[ch].inc files to cscope/ctags/TAGS elf2dmp: Fix memory leak on main() error paths
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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0dda001b |
| 14-Oct-2020 |
Chetan Pant <chetan4windows@gmail.com> |
cryptodev: Fix Lesser GPL version number
There is no "version 2" of the "Lesser" General Public License. It is either "GPL version 2.0" or "Lesser GPL version 2.1". This patch replaces all occurrenc
cryptodev: Fix Lesser GPL version number
There is no "version 2" of the "Lesser" General Public License. It is either "GPL version 2.0" or "Lesser GPL version 2.1". This patch replaces all occurrences of "Lesser GPL version 2" with "Lesser GPL version 2.1" in comment section.
Signed-off-by: Chetan Pant <chetan4windows@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20201014133722.14041-1-chetan4windows@gmail.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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f7f1d916 |
| 24-Sep-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging
machine + QOM queue, 2020-09-22
QOM cleanups: * Convert instance properties to class properties (Eduard
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging
machine + QOM queue, 2020-09-22
QOM cleanups: * Convert instance properties to class properties (Eduardo Habkost) * simplify object_find_property / object_class_find_property (Daniel P. Berrangé)
Deprecated feature removal: * Drop support for invalid topologies (Igor Mammedov)
# gpg: Signature made Tue 22 Sep 2020 23:25:01 BST # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6
* remotes/ehabkost/tags/machine-next-pull-request: sifive_u: Register "start-in-flash" as class property sifive_e: Register "revb" as class property i440fx: Register i440FX-pcihost properties as class properties machine: Register "memory-backend" as class property xlnx-zcu102: Register properties as class properties cpu/core: Register core-id and nr-threads as class properties s390x: Register all CPU properties as class properties cryptodev-backend: Register "chardev" as class property cryptodev-vhost-user: Register "chardev" as class property smp: drop support for deprecated (invalid topologies) qom: simplify object_find_property / object_class_find_property
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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07b0db0e |
| 21-Sep-2020 |
Eduardo Habkost <ehabkost@redhat.com> |
cryptodev-vhost-user: Register "chardev" as class property
Class properties make QOM introspection simpler and easier, as they don't require an object to be instantiated.
Signed-off-by: Eduardo Hab
cryptodev-vhost-user: Register "chardev" as class property
Class properties make QOM introspection simpler and easier, as they don't require an object to be instantiated.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Gonglei <arei.gonglei@huawei.com> Message-Id: <20200921221045.699690-2-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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4dad0a9a |
| 21-Sep-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging
QOM queue, 2020-09-18
Fixes: * Error value corrections (Markus Armbruster) * Correct object_class_dynamic
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging
QOM queue, 2020-09-18
Fixes: * Error value corrections (Markus Armbruster) * Correct object_class_dynamic_cast_assert() documentation (Eduardo Habkost) * Ensure objects using QEMU_ALIGNED are properly aligned (Richard Henderson)
QOM cleanups (Eduardo Habkost): * Rename some constants * Simplify parameters of OBJECT_DECLARE* macros * Additional DECLARE_*CHECKER* usage * Additional OBJECT_DECLARE_TYPE usage * Additional OBJECT_DECLARE_SIMPLE_TYPE usage
# gpg: Signature made Fri 18 Sep 2020 21:45:29 BST # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6
* remotes/ehabkost/tags/machine-next-pull-request: Use OBJECT_DECLARE_SIMPLE_TYPE when possible Use OBJECT_DECLARE_TYPE when possible qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros qom: Remove ParentClassType argument from OBJECT_DECLARE_SIMPLE_TYPE scripts/codeconverter: Update to latest version target/s390x: Set instance_align on S390CPU TypeInfo target/riscv: Set instance_align on RISCVCPU TypeInfo target/ppc: Set instance_align on PowerPCCPU TypeInfo target/arm: Set instance_align on CPUARM TypeInfo qom: Allow objects to be allocated with increased alignment qom: Correct error values in two contracts qom: Clean up object_property_get_enum()'s error value qom: Correct object_class_dynamic_cast_assert() documentation sifive: Use DECLARE_*CHECKER* macros sifive: Move QOM typedefs and add missing includes sifive_u: Rename memmap enum constants sifive_e: Rename memmap enum constants
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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