#
98c7362b |
| 06-Mar-2025 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'accel-cpus-20250306' of https://github.com/philmd/qemu into staging
Generic CPUs / accelerators patch queue
- Merge "qemu/clang-tsa.h" within "qemu/compiler.h" - Various cleanups around
Merge tag 'accel-cpus-20250306' of https://github.com/philmd/qemu into staging
Generic CPUs / accelerators patch queue
- Merge "qemu/clang-tsa.h" within "qemu/compiler.h" - Various cleanups around accelerators initialization code (better user/system split) - Various trivial cleanups in accel/tcg/, Guard few TCG calls with tcg_enabled() - Explicit disassemble_info endianness - Improve dual-endianness support for MicroBlaze
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmfJw08ACgkQ4+MsLN6t # wN70whAAtfcdWtqseFfb6fvDtjflgxN51Ui0iaOECXUA18USKriGy34eBcMYMiM2 # +eKgU7+jI6JGE4+burcgWUsPpFFF951/A8+lyIbFgO5yToTDmC+qNe4XfmMAIyXq # uf9Obr2c0Xk9luh4odb+jPAQodw/7G1fKgcCVIJNDCl/xEcPhS9eNpTaHwcVnkWI # K6KrxWXOsqG6+evJBPWYoXtOOyt0+JcwAsJoGhprwtGm3P9+jSVXsgeGsJVyZcna # f32JtjWL754O8XeMkOn4x6rt58VrCIMKI9xT7keDyuhTCq0Zki9RO2nMU2dSw5mN # AfL9hxqUy0Nijnyslg3ugujDfTePsNyLdwwH7n0mnoD72ELi6WnhDsmOThuEB3Rd # 4/kdwTJfA/rlWk/GF1tbKW7AvQZokRARtzmL3V0HmGJu57lX+2JuszEdYBkqDEP7 # GH1I10B2yANUm+C9y3X8qWOU7Ws433ebJeJoZuyfnbZ9Me+UfRmql/oS+V8ata2i # fArEItpldUFrWRyYLkTbXrh2dgyV9yJTEir/lzOzeAZZzyabTbjf2z9qnh976GGO # 1QnDy5QA4f54kDBUZe7JK26TZsHPch7cgqXW6f8tRlJF7A9hxGK8d2TUV/lC3/vx # LUOlWNu03PhiruYmZEcWOsY3Jt9jRCF6lIryrnaJsqnVOVmMUMM= # =3TRh # -----END PGP SIGNATURE----- # gpg: Signature made Thu 06 Mar 2025 23:46:23 HKT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'accel-cpus-20250306' of https://github.com/philmd/qemu: (54 commits) include: Poison TARGET_PHYS_ADDR_SPACE_BITS definition system: Open-code qemu_init_arch_modules() using target_name() target/i386: Mark WHPX APIC region as little-endian target/alpha: Do not mix exception flags and FPCR bits target/riscv: Convert misa_mxl_max using GLib macros target/riscv: Declare RISCVCPUClass::misa_mxl_max as RISCVMXL target/xtensa: Finalize config in xtensa_register_core() target/sparc: Constify SPARCCPUClass::cpu_def target/i386: Constify X86CPUModel uses disas: Remove target_words_bigendian() call in initialize_debug_target() target/xtensa: Set disassemble_info::endian value in disas_set_info() target/sh4: Set disassemble_info::endian value in disas_set_info() target/riscv: Set disassemble_info::endian value in disas_set_info() target/ppc: Set disassemble_info::endian value in disas_set_info() target/mips: Set disassemble_info::endian value in disas_set_info() target/microblaze: Set disassemble_info::endian value in disas_set_info target/arm: Set disassemble_info::endian value in disas_set_info() target: Set disassemble_info::endian value for big-endian targets target: Set disassemble_info::endian value for little-endian targets target/mips: Fix possible MSA int overflow ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
0f66536a |
| 23-Jan-2025 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
accel: Forward-declare AccelOpsClass in 'qemu/typedefs.h'
The heavily imported "system/cpus.h" header includes "accel-ops.h" to get AccelOpsClass type declaration. Reduce headers pressure by forward
accel: Forward-declare AccelOpsClass in 'qemu/typedefs.h'
The heavily imported "system/cpus.h" header includes "accel-ops.h" to get AccelOpsClass type declaration. Reduce headers pressure by forward declaring it in "qemu/typedefs.h", where we already declare the AccelCPUState type.
Reduce "system/cpus.h" inclusions by only including "system/accel-ops.h" when necessary.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250123234415.59850-14-philmd@linaro.org>
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#
b2837885 |
| 23-Jan-2025 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
accel/tcg: Build tcg_flags helpers as common code
While cpu-exec.c is build for each target,tcg_flags helpers aren't target specific. Move them to cpu-exec-common.c to build them once.
Signed-off-b
accel/tcg: Build tcg_flags helpers as common code
While cpu-exec.c is build for each target,tcg_flags helpers aren't target specific. Move them to cpu-exec-common.c to build them once.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250123234415.59850-8-philmd@linaro.org>
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#
65cb7129 |
| 21-Dec-2024 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'exec-20241220' of https://github.com/philmd/qemu into staging
Accel & Exec patch queue
- Ignore writes to CNTP_CTL_EL0 on HVF ARM (Alexander) - Add '-d invalid_mem' logging option (Zolta
Merge tag 'exec-20241220' of https://github.com/philmd/qemu into staging
Accel & Exec patch queue
- Ignore writes to CNTP_CTL_EL0 on HVF ARM (Alexander) - Add '-d invalid_mem' logging option (Zoltan) - Create QOM containers explicitly (Peter) - Rename sysemu/ -> system/ (Philippe) - Re-orderning of include/exec/ headers (Philippe) Move a lot of declarations from these legacy mixed bag headers: . "exec/cpu-all.h" . "exec/cpu-common.h" . "exec/cpu-defs.h" . "exec/exec-all.h" . "exec/translate-all" to these more specific ones: . "exec/page-protection.h" . "exec/translation-block.h" . "user/cpu_loop.h" . "user/guest-host.h" . "user/page-protection.h"
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmdlnyAACgkQ4+MsLN6t # wN6mBw//QFWi7CrU+bb8KMM53kOU9C507tjn99LLGFb5or73/umDsw6eo/b8DHBt # KIwGLgATel42oojKfNKavtAzLK5rOrywpboPDpa3SNeF1onW+99NGJ52LQUqIX6K # A6bS0fPdGG9ZzEuPpbjDXlp++0yhDcdSgZsS42fEsT7Dyj5gzJYlqpqhiXGqpsn8 # 4Y0UMxSL21K3HEexlzw2hsoOBFA3tUm2ujNDhNkt8QASr85yQVLCypABJnuoe/// # 5Ojl5wTBeDwhANET0rhwHK8eIYaNboiM9fHopJYhvyw1bz6yAu9jQwzF/MrL3s/r # xa4OBHBy5mq2hQV9Shcl3UfCQdk/vDaYaWpgzJGX8stgMGYfnfej1SIl8haJIfcl # VMX8/jEFdYbjhO4AeGRYcBzWjEJymkDJZoiSWp2NuEDi6jqIW+7yW1q0Rnlg9lay # ShAqLK5Pv4zUw3t0Jy3qv9KSW8sbs6PQxtzXjk8p97rTf76BJ2pF8sv1tVzmsidP # 9L92Hv5O34IqzBu2oATOUZYJk89YGmTIUSLkpT7asJZpBLwNM2qLp5jO00WVU0Sd # +kAn324guYPkko/TVnjC/AY7CMu55EOtD9NU35k3mUAnxXT9oDUeL4NlYtfgrJx6 # x1Nzr2FkS68+wlPAFKNSSU5lTjsjNaFM0bIJ4LCNtenJVP+SnRo= # =cjz8 # -----END PGP SIGNATURE----- # gpg: Signature made Fri 20 Dec 2024 11:45:20 EST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'exec-20241220' of https://github.com/philmd/qemu: (59 commits) util/qemu-timer: fix indentation meson: Do not define CONFIG_DEVICES on user emulation system/accel-ops: Remove unnecessary 'exec/cpu-common.h' header system/numa: Remove unnecessary 'exec/cpu-common.h' header hw/xen: Remove unnecessary 'exec/cpu-common.h' header target/mips: Drop left-over comment about Jazz machine target/mips: Remove tswap() calls in semihosting uhi_fstat_cb() target/xtensa: Remove tswap() calls in semihosting simcall() helper accel/tcg: Un-inline translator_is_same_page() accel/tcg: Include missing 'exec/translation-block.h' header accel/tcg: Move tcg_cflags_has/set() to 'exec/translation-block.h' accel/tcg: Restrict curr_cflags() declaration to 'internal-common.h' qemu/coroutine: Include missing 'qemu/atomic.h' header exec/translation-block: Include missing 'qemu/atomic.h' header accel/tcg: Declare cpu_loop_exit_requested() in 'exec/cpu-common.h' exec/cpu-all: Include 'cpu.h' earlier so MMU_USER_IDX is always defined target/sparc: Move sparc_restore_state_to_opc() to cpu.c target/sparc: Uninline cpu_get_tb_cpu_state() target/loongarch: Declare loongarch_cpu_dump_state() locally user: Move various declarations out of 'exec/exec-all.h' ...
Conflicts: hw/char/riscv_htif.c hw/intc/riscv_aplic.c target/s390x/cpu.c
Apply sysemu header path changes to not in the pull request.
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
32cad1ff |
| 03-Dec-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
include: Rename sysemu/ -> system/
Headers in include/sysemu/ are not only related to system *emulation*, they are also used by virtualization. Rename as system/ which is clearer.
Files renamed man
include: Rename sysemu/ -> system/
Headers in include/sysemu/ are not only related to system *emulation*, they are also used by virtualization. Rename as system/ which is clearer.
Files renamed manually then mechanical change using sed tool.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Lei Yang <leiyang@redhat.com> Message-Id: <20241203172445.28576-1-philmd@linaro.org>
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#
800af0aa |
| 05-Oct-2023 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'pull-tcg-20231004' of https://gitlab.com/rth7680/qemu into staging
accel: Introduce AccelClass::cpu_common_[un]realize accel: Target agnostic code movement accel/tcg: Cleanups to use CPUS
Merge tag 'pull-tcg-20231004' of https://gitlab.com/rth7680/qemu into staging
accel: Introduce AccelClass::cpu_common_[un]realize accel: Target agnostic code movement accel/tcg: Cleanups to use CPUState instead of CPUArchState accel/tcg: Move CPUNegativeOffsetState into CPUState tcg: Split out tcg init functions to tcg/startup.h linux-user/hppa: Fix struct target_sigcontext layout build: Remove --enable-gprof
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmUdsL4dHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/iYggAvDJEyMCAXSSH97BA # wZT/2D/MFIhOMk6xrQRnrXfrG70N0iVKz44jl9j7k1D+9BOHcso//DDJH3c96k9A # MgDb6W2bsWvC15/Qw6BALf5bb/II0MJuCcQvj3CNX5lNkXAWhwIOBhsZx7V9ST1+ # rihN4nowpRWdV5GeCjDGaJW455Y1gc96hICYHy6Eqw1cUgUFt9vm5aYU3FHlat29 # sYRaVYKUL2hRUPPNcPiPq0AaJ8wN6/s8gT+V1UvTzkhHqskoM4ZU89RchuXVoq1h # SvhKElyULMRzM7thWtpW8qYJPj4mxZsKArESvHjsunGD6KEz3Fh1sy6EKRcdmpG/ # II1vkg== # =k2Io # -----END PGP SIGNATURE----- # gpg: Signature made Wed 04 Oct 2023 14:36:46 EDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-tcg-20231004' of https://gitlab.com/rth7680/qemu: (47 commits) tcg/loongarch64: Fix buid error tests/avocado: Re-enable MIPS Malta tests (GitLab issue #1884 fixed) build: Remove --enable-gprof linux-user/hppa: Fix struct target_sigcontext layout tcg: Split out tcg init functions to tcg/startup.h tcg: Remove argument to tcg_prologue_init accel/tcg: Make cpu-exec-common.c a target agnostic unit accel/tcg: Make icount.o a target agnostic unit accel/tcg: Make monitor.c a target-agnostic unit accel/tcg: Rename target-specific 'internal.h' -> 'internal-target.h' exec: Rename target specific page-vary.c -> page-vary-target.c exec: Rename cpu.c -> cpu-target.c accel: Rename accel-common.c -> accel-target.c accel: Make accel-blocker.o target agnostic accel/tcg: Restrict dump_exec_info() declaration exec: Move cpu_loop_foo() target agnostic functions to 'cpu-common.h' exec: Make EXCP_FOO definitions target agnostic accel/tcg: move ld/st helpers to ldst_common.c.inc accel/tcg: Unify user and softmmu do_[st|ld]*_mmu() accel/tcg: Remove env_tlb() ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
43e7a2d3 |
| 14-Sep-2023 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
accel/tcg: Make cpu-exec-common.c a target agnostic unit
cpu_in_serial_context() is not target specific, move it declaration to "internal-common.h" (which we include in the 4 source files modified).
accel/tcg: Make cpu-exec-common.c a target agnostic unit
cpu_in_serial_context() is not target specific, move it declaration to "internal-common.h" (which we include in the 4 source files modified).
Remove the unused "exec/exec-all.h" header from cpu-exec-common.c. There is no more target specific code in this file: make it target agnostic.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230914185718.76241-12-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
4c268d6d |
| 14-Sep-2023 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
accel/tcg: Rename target-specific 'internal.h' -> 'internal-target.h'
accel/tcg/internal.h contains target specific declarations. Unit files including it become "target tainted": they can not be com
accel/tcg: Rename target-specific 'internal.h' -> 'internal-target.h'
accel/tcg/internal.h contains target specific declarations. Unit files including it become "target tainted": they can not be compiled as target agnostic. Rename using the '-target' suffix to make this explicit.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230914185718.76241-9-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
464dacf6 |
| 15-Sep-2023 |
Richard Henderson <richard.henderson@linaro.org> |
accel/tcg: Move can_do_io to CPUNegativeOffsetState
Minimize the displacement to can_do_io, since it may be touched at the start of each TranslationBlock. It fits into other padding within the subst
accel/tcg: Move can_do_io to CPUNegativeOffsetState
Minimize the displacement to can_do_io, since it may be touched at the start of each TranslationBlock. It fits into other padding within the substructure.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
ef9d20c6 |
| 30-Aug-2023 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'pull-tcg-20230829-2' of https://gitlab.com/rth7680/qemu into staging
softmmu: Use async_run_on_cpu in tcg_commit tcg: Remove vecop_list check from tcg_gen_not_vec tcg/sparc64: Disable TCG
Merge tag 'pull-tcg-20230829-2' of https://gitlab.com/rth7680/qemu into staging
softmmu: Use async_run_on_cpu in tcg_commit tcg: Remove vecop_list check from tcg_gen_not_vec tcg/sparc64: Disable TCG_TARGET_HAS_extr_i64_i32 Revert "include/exec: typedef abi_ptr to vaddr in softmmu"
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmTuOcYdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9gGwf/QzbRP8MknlCZXrkZ # ykIZAkE4gRUb64Wzc2Oz1XaueltgBGRCS338oE8umtcLKTngZ8rVFD/LPTIEyAEY # SOzdHEJLPMSUv54rjAV8W4mVku81E9QvzOgz8PIzFM0mDiPJ/lG6JBTee/IZJHr3 # cW9W/2XMEz2rS2ONPj7WXbVbk/1ao29JFlhcWKNauUfqrNWK+VWOpo2w5qfgJruz # mjOSiMErU7SijytrKG9GP3Ri1JGskocfGcYYPofz8j6lmQoZrT6aYUj2tJTL8rvQ # Js+JCP8ZCXFO8/2jJqOivQccBGmLi8wf6Ke777xE0tAqfzXqBOp4tvJbv28e8lja # p+Lqhg== # =KPna # -----END PGP SIGNATURE----- # gpg: Signature made Tue 29 Aug 2023 14:32:38 EDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-tcg-20230829-2' of https://gitlab.com/rth7680/qemu: Revert "include/exec: typedef abi_ptr to vaddr in softmmu" tcg/sparc64: Disable TCG_TARGET_HAS_extr_i64_i32 tcg: Remove vecop_list check from tcg_gen_not_vec softmmu: Use async_run_on_cpu in tcg_commit softmmu: Assert data in bounds in iotlb_to_section
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
0d58c660 |
| 25-Aug-2023 |
Richard Henderson <richard.henderson@linaro.org> |
softmmu: Use async_run_on_cpu in tcg_commit
After system startup, run the update to memory_dispatch and the tlb_flush on the cpu. This eliminates a race, wherein a running cpu sees the memory_dispa
softmmu: Use async_run_on_cpu in tcg_commit
After system startup, run the update to memory_dispatch and the tlb_flush on the cpu. This eliminates a race, wherein a running cpu sees the memory_dispatch change but has not yet seen the tlb_flush.
Since the update now happens on the cpu, we need not use qatomic_rcu_read to protect the read of memory_dispatch.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1826 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1834 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1846 Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
27823850 |
| 11-May-2023 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-tcg-20230511-2' of https://gitlab.com/rth7680/qemu into staging
target/m68k: Fix gen_load_fp regression accel/tcg: Ensure fairness with icount disas: Move disas.c into the target-ind
Merge tag 'pull-tcg-20230511-2' of https://gitlab.com/rth7680/qemu into staging
target/m68k: Fix gen_load_fp regression accel/tcg: Ensure fairness with icount disas: Move disas.c into the target-independent source sets tcg: Use common routines for calling slow path helpers tcg/*: Cleanups to qemu_ld/st constraints tcg: Remove TARGET_ALIGNED_ONLY accel/tcg: Reorg system mode load/store helpers
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmRcxtYdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9arQf8Di7CnMQE/jW+8w6v # 5af0dX8/St2JnCXzG+qiW6mJm50Cy4GunCN66JcCAswpENvQLLsJP13c+4KTeB1T # rGBbedFXTw1LsaoOcBvwhq7RTIROz4GESTS4EZoJMlMhMv0VotekUPPz4NFMZRKX # LMvShM2C+f2p4HmDnnbki7M3+tMqpgoGCeBFX8Jy7/5sbpS/7ceXRio3ZRAhasPu # vjA0zqUtoTs7ijKpXf3uRl/c7xql+f0d7SDdCRt4OKasfLCCDwkjtMf6plZ2jzuS # OgwKc5N1jaMF6erHYZJIbfLLdUl20/JJEcbpU3Eh1XuHnzn1msS9JDOm2tvzwsto # OpOKUg== # =Lhy3 # -----END PGP SIGNATURE----- # gpg: Signature made Thu 11 May 2023 11:43:34 AM BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]
* tag 'pull-tcg-20230511-2' of https://gitlab.com/rth7680/qemu: (53 commits) target/loongarch: Do not include tcg-ldst.h accel/tcg: Reorg system mode store helpers accel/tcg: Reorg system mode load helpers accel/tcg: Introduce tlb_read_idx accel/tcg: Add cpu_in_serial_context tcg: Remove TARGET_ALIGNED_ONLY target/sh4: Remove TARGET_ALIGNED_ONLY target/sh4: Use MO_ALIGN where required target/nios2: Remove TARGET_ALIGNED_ONLY target/mips: Remove TARGET_ALIGNED_ONLY target/mips: Use MO_ALIGN instead of 0 target/mips: Add missing default_tcg_memop_mask target/mips: Add MO_ALIGN to gen_llwp, gen_scwp tcg/s390x: Simplify constraints on qemu_ld/st tcg/s390x: Use ALGFR in constructing softmmu host address tcg/riscv: Simplify constraints on qemu_ld/st tcg/ppc: Remove unused constraint J tcg/ppc: Remove unused constraints A, B, C, D tcg/ppc: Adjust constraints on qemu_ld/st tcg/ppc: Reorg tcg_out_tlb_read ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
9877ea05 |
| 26-Oct-2022 |
Richard Henderson <richard.henderson@linaro.org> |
accel/tcg: Add cpu_in_serial_context
Like cpu_in_exclusive_context, but also true if there is no other cpu against which we could race.
Use it in tb_flush as a direct replacement. Use it in cpu_loo
accel/tcg: Add cpu_in_serial_context
Like cpu_in_exclusive_context, but also true if there is no other cpu against which we could race.
Use it in tb_flush as a direct replacement. Use it in cpu_loop_exit_atomic to ensure that there is no loop against cpu_exec_step_atomic.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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60ca584b |
| 22-Mar-2023 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-for-8.0-220323-1' of https://gitlab.com/stsquad/qemu into staging
Misc fixes for 8.0 (testing, plugins, gitdm)
- update Alpine image used for testing images - include libslirp i
Merge tag 'pull-for-8.0-220323-1' of https://gitlab.com/stsquad/qemu into staging
Misc fixes for 8.0 (testing, plugins, gitdm)
- update Alpine image used for testing images - include libslirp in custom runner build env - update gitlab-runner recipe for CentOS - update docker calls for better caching behaviour - document some plugin callbacks - don't use tags to define drives for lkft baseline tests - fix missing clear of plugin_mem_cbs - fix iotests to report individual results - update the gitdm metadata for contributors - avoid printing comments before g_test_init() - probe for multiprocess support before running avocado test - refactor igb.py into netdev-ethtool.py avocado test - rebuild openbsd to have more space space for iotests
# -----BEGIN PGP SIGNATURE----- # # iQEzBAABCgAdFiEEZoWumedRZ7yvyN81+9DbCVqeKkQFAmQbGkoACgkQ+9DbCVqe # KkT2kQgAif70dGyn2bcv7OYv2LgAcSzDGTIsOfMM6gYc9bm3nU/R/cj9cy8Qgbnu # v6BSVeig5AVBWI1UTuMNeKW1BWoQYfxg2kdduSyAzMZS44r09ch9iabSbxbadC1e # L1RrRWlzs/MwWX8IclAyEj1jr+DB+/DwoG61IP3215XXSy84e/XV4j+JAyBEzXQ9 # LdznGyqyItg3S6rnVpRP/wjR0P3VlrYOLOjFfCw7gB8JrlW7KIr8hWkHXYuS2mF5 # UyXTBwbXwYB5BAx0zXC3SVgl0Gs1qymaRUX77dlotlpVVo0Ql8a06dHPtYrjMNgA # /Nyat3Dbbu7Rai+IzZIJl3tGx850wg== # =XR0M # -----END PGP SIGNATURE----- # gpg: Signature made Wed 22 Mar 2023 15:10:02 GMT # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44
* tag 'pull-for-8.0-220323-1' of https://gitlab.com/stsquad/qemu: (35 commits) qtests: avoid printing comments before g_test_init() contrib/gitdm: add group map for AMD contrib/gitdm: add more individual contributors contrib/gitdm: add revng to domain map contrib/gitdm: add Alibaba to the domain-map contrib/gitdm: add Amazon to the domain map contrib/gitdm: Add SYRMIA to the domain map contrib/gitdm: Add ASPEED Technology to the domain map iotests: remove the check-block.sh script iotests: register each I/O test separately with meson iotests: always use a unique sub-directory per test iotests: connect stdin to /dev/null when running tests iotests: print TAP protocol version when reporting tests iotests: strip subdir path when listing tests iotests: allow test discovery before building iotests: explicitly pass source/build dir to 'check' command tests/vm: custom openbsd partitioning to increase /home space tests/vm: skip X11 in openbsd installation include/qemu/plugin: Inline qemu_plugin_disable_mem_helpers include/qemu: Split out plugin-event.h ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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720ace24 |
| 15-Mar-2023 |
Richard Henderson <richard.henderson@linaro.org> |
*: Add missing includes of qemu/plugin.h
This had been pulled in from hw/core/cpu.h, but that will be removed.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe
*: Add missing includes of qemu/plugin.h
This had been pulled in from hw/core/cpu.h, but that will be removed.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230310195252.210956-6-richard.henderson@linaro.org> [AJB: also syscall-trace.h] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20230315174331.2959-16-alex.bennee@linaro.org> Reviewed-by: Emilio Cota <cota@braap.org>
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e04660af |
| 15-Mar-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Clear plugin_mem_cbs on TB exit
Do this in cpu_tb_exec (normal exit) and cpu_loop_exit (exception), adjacent to where we reset can_do_io.
Resolves: https://gitlab.com/qemu-project/qemu/-/issue
tcg: Clear plugin_mem_cbs on TB exit
Do this in cpu_tb_exec (normal exit) and cpu_loop_exit (exception), adjacent to where we reset can_do_io.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1381 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230310195252.210956-2-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20230315174331.2959-12-alex.bennee@linaro.org> Reviewed-by: Emilio Cota <cota@braap.org>
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18cd31ff |
| 01-Nov-2022 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'pull-tcg-20221031-2' of https://gitlab.com/rth7680/qemu into staging
Remove sparc32plus support from tcg/sparc. target/i386: Use cpu_unwind_state_data for tpr access. target/i386: Expand
Merge tag 'pull-tcg-20221031-2' of https://gitlab.com/rth7680/qemu into staging
Remove sparc32plus support from tcg/sparc. target/i386: Use cpu_unwind_state_data for tpr access. target/i386: Expand eflags updates inline Complete cpu initialization before registration
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmNgQvIdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9bxAf/X6904X+2I55LTMP7 # jLCxMAlSgFiwaWW4sQLvfUS2qjjMNw7dtljF0HaYVJCawABI4tIY3nEYL8dhLiGU # WpMTmDIY/cBrQ0aMWfUTGRIFZOIpCLsZwiG6zW6w5KxfKUaakeZSgxqhzgFFcM2k # UDb9HYC6jwEDDZJYTRpcTIsnYHjaiu/ofKjbjWoslq9DIrThLr1UZgoOxzZ9w2Rh # xEDBNnD42Kzb0Lbc5B1cX4tla43g9KfHkfG6Ww3fJVYZcFxFhAp40y1chtq5qaia # 64cPOfSdjoHWaZKdXop3hDYvqRTour56S+e1n1VxHVhbsVRh0KKYBvzAZtiN4FEu # w8E8bA== # =fxqA # -----END PGP SIGNATURE----- # gpg: Signature made Mon 31 Oct 2022 17:49:38 EDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-tcg-20221031-2' of https://gitlab.com/rth7680/qemu: tests/tcg/multiarch: Add munmap-pthread.c accel/tcg: Complete cpu initialization before registration target/i386: Expand eflags updates inline accel/tcg: Remove reset_icount argument from cpu_restore_state_from_tb accel/tcg: Remove will_exit argument from cpu_restore_state target/openrisc: Use cpu_unwind_state_data for mfspr target/openrisc: Always exit after mtspr npc target/i386: Use cpu_unwind_state_data for tpr access accel/tcg: Introduce cpu_unwind_state_data tcg/tci: fix logic error when registering helpers via FFI tcg/sparc64: Remove sparc32plus constraints tcg/sparc64: Rename from tcg/sparc tcg/sparc: Remove support for sparc32plus
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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3d419a4d |
| 24-Oct-2022 |
Richard Henderson <richard.henderson@linaro.org> |
accel/tcg: Remove will_exit argument from cpu_restore_state
The value passed is always true, and if the target's synchronize_from_tb hook is non-trivial, not exiting may be erroneous.
Reviewed-by:
accel/tcg: Remove will_exit argument from cpu_restore_state
The value passed is always true, and if the target's synchronize_from_tb hook is non-trivial, not exiting may be erroneous.
Reviewed-by: Claudio Fontana <cfontana@suse.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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d45a5270 |
| 05-May-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.1-pull-request' into staging
Trivial patches pull request 20210503
# gpg: Signature made Mon 03 May 2021 09:34:56 BST # gpg:
Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.1-pull-request' into staging
Trivial patches pull request 20210503
# gpg: Signature made Mon 03 May 2021 09:34:56 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C
* remotes/vivier2/tags/trivial-branch-for-6.1-pull-request: (23 commits) hw/rx/rx-gdbsim: Do not accept invalid memory size docs: More precisely describe memory-backend-*::id's user scripts: fix generation update-binfmts templates docs/system: Document the removal of "compat" property for POWER CPUs mc146818rtc: put it into the 'misc' category Do not include exec/address-spaces.h if it's not really necessary Do not include cpu.h if it's not really necessary Do not include hw/boards.h if it's not really necessary Do not include sysemu/sysemu.h if it's not really necessary hw: Do not include qemu/log.h if it is not necessary hw: Do not include hw/irq.h if it is not necessary hw: Do not include hw/sysbus.h if it is not necessary hw: Remove superfluous includes of hw/hw.h ui: Fix memory leak in qemu_xkeymap_mapping_table() hw/usb: Constify VMStateDescription hw/display/qxl: Constify VMStateDescription hw/arm: Constify VMStateDescription vmstate: Constify some VMStateDescriptions Fix typo in CFI build documentation hw/pcmcia: Do not register PCMCIA type if not required ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2068cabd |
| 16-Apr-2021 |
Thomas Huth <thuth@redhat.com> |
Do not include cpu.h if it's not really necessary
Stop including cpu.h in files that don't need it.
Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210416171314.2074665-4-thuth@redhat.
Do not include cpu.h if it's not really necessary
Stop including cpu.h in files that don't need it.
Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210416171314.2074665-4-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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59c58f96 |
| 12-Jun-2019 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2019-06-11-v3' into staging
Miscellaneous patches for 2019-06-11
# gpg: Signature made Wed 12 Jun 2019 12:20:41 BST # gpg:
Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2019-06-11-v3' into staging
Miscellaneous patches for 2019-06-11
# gpg: Signature made Wed 12 Jun 2019 12:20:41 BST # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653
* remotes/armbru/tags/pull-misc-2019-06-11-v3: MAINTAINERS: Polish headline decorations MAINTAINERS: Improve section headlines MAINTAINERS: Remove duplicate entries of qemu-devel@nongnu.org Clean up a header guard symbols (again) Supply missing header guards Clean up a few header guard symbols scripts/clean-header-guards: Fix handling of trailing comments Normalize position of header guard Include qemu-common.h exactly where needed Include qemu/module.h where needed, drop it from qemu-common.h qemu-common: Move qemu_isalnum() etc. to qemu/ctype.h qemu-common: Move tcg_enabled() etc. to sysemu/tcg.h
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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14a48c1d |
| 23-May-2019 |
Markus Armbruster <armbru@redhat.com> |
qemu-common: Move tcg_enabled() etc. to sysemu/tcg.h
Other accelerators have their own headers: sysemu/hax.h, sysemu/hvf.h, sysemu/kvm.h, sysemu/whpx.h. Only tcg_enabled() & friends sit in qemu-com
qemu-common: Move tcg_enabled() etc. to sysemu/tcg.h
Other accelerators have their own headers: sysemu/hax.h, sysemu/hvf.h, sysemu/kvm.h, sysemu/whpx.h. Only tcg_enabled() & friends sit in qemu-common.h. This necessitates inclusion of qemu-common.h into headers, which is against the rules spelled out in qemu-common.h's file comment.
Move tcg_enabled() & friends into their own header sysemu/tcg.h, and adjust #include directives.
Cc: Richard Henderson <rth@twiddle.net> Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190523143508.25387-2-armbru@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [Rebased with conflicts resolved automatically, except for accel/tcg/tcg-all.c]
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e8977901 |
| 31-Jan-2019 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-pull-request' into staging
- add device category (edu, i8042, sd memory card) - code clean-up - LGPL information clean-up - fix typo
Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-pull-request' into staging
- add device category (edu, i8042, sd memory card) - code clean-up - LGPL information clean-up - fix typo (acpi)
# gpg: Signature made Wed 30 Jan 2019 13:21:50 GMT # gpg: using RSA key F30C38BD3F2FBE3C # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C
* remotes/vivier2/tags/trivial-branch-pull-request: virtio-blk: remove duplicate definition of VirtIOBlock *s pointer hw/block: clean up stale xen_disk trace entries target/m68k: Fix LGPL information in the file headers target/s390x: Fix LGPL version in the file header comments tcg: Fix LGPL version number target/tricore: Fix LGPL version number target/openrisc: Fix LGPL version number COPYING.LIB: Synchronize the LGPL 2.1 with the version from gnu.org Don't talk about the LGPL if the file is licensed under the GPL hw: sd: set category of the sd memory card hw: input: set category of the i8042 device typo: apci->acpi hw: edu: set category of the edu device
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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fb0343d5 |
| 23-Jan-2019 |
Thomas Huth <thuth@redhat.com> |
tcg: Fix LGPL version number
It's either "GNU *Library* General Public version 2" or "GNU Lesser General Public version *2.1*", but there was no "version 2.0" of the "Lesser" library. So assume that
tcg: Fix LGPL version number
It's either "GNU *Library* General Public version 2" or "GNU Lesser General Public version *2.1*", but there was no "version 2.0" of the "Lesser" library. So assume that version 2.1 is meant here.
Cc: Richard Henderson <rth@twiddle.net> Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1548252536-6242-5-git-send-email-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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6523eaca |
| 11-Apr-2018 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20180411' into staging
Handle read-modify-write i/o with icount
# gpg: Signature made Wed 11 Apr 2018 00:07:23 BST # gpg: usin
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20180411' into staging
Handle read-modify-write i/o with icount
# gpg: Signature made Wed 11 Apr 2018 00:07:23 BST # gpg: using RSA key 64DF38E8AF7E215F # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth/tags/pull-tcg-20180411: icount: fix cpu_restore_state_from_tb for non-tb-exit cases
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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