Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"This is the usual collection of primarily clk driver updates.

The big pa

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"This is the usual collection of primarily clk driver updates.

The big part of the diff is all the new Qualcomm clk drivers added for
a few SoCs they're working on. The other two vendors with significant
work this cycle are Renesas and Amlogic. Renesas adds a bunch of clks
to existing drivers and supports some new SoCs while Amlogic is
starting a significant refactoring to simplify their code.

The core framework gained a pair of helpers to get the 'struct device'
or 'struct device_node' associated with a 'struct clk_hw'. Some
associated KUnit tests were added for these simple helpers as well.

Beyond that core change there are lots of little fixes throughout the
clk drivers for the stuff we see every day, wrong clk driver data that
affects tree topology or supported frequencies, etc. They're not found
until the clks are actually used by some consumer device driver.

New Drivers:
- Global, display, gpu, video, camera, tcsr, and rpmh clock
controller for the Qualcomm Milos SoC
- Camera, display, GPU, and video clock controllers for Qualcomm
QCS615
- Video clock controller driver for Qualcomm SM6350
- Camera clock controller driver for Qualcomm SC8180X
- I3C clocks and resets on Renesas RZ/G3E
- Expanded Serial Peripheral Interface (xSPI) clocks and resets on
Renesas RZ/V2H(P) and RZ/V2N
- SPI (RSPI) clocks and resets on Renesas RZ/V2H(P)
- SDHI and I2C clocks on Renesas RZ/T2H and RZ/N2H
- Ethernet clocks and resets on Renesas RZ/G3E
- Initial support for the Renesas RZ/T2H (R9A09G077) and RZ/N2H
(R9A09G087) SoCs
- Ethernet clocks and resets on Renesas RZ/V2H and RZ/V2N
- Timer, I2C, watchdog, GPU, and USB2.0 clocks and resets on Renesas
RZ/V2N

Updates:
- Support atomic PWMs in the PWM clk driver
- clk_hw_get_dev() and clk_hw_get_of_node() helpers
- Replace round_rate() with determine_rate() in various clk drivers
- Convert clk DT bindings to DT schema format for DT validation
- Various clk driver cleanups and refactorings from static analysis
tools and possibly real humans
- A lot of little fixes here and there to things like clk tree
topology, missing frequencies, flagging clks as critical, etc"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (216 commits)
clk: clocking-wizard: Fix the round rate handling for versal
clk: Fix typos
clk: spacemit: ccu_pll: fix error return value in recalc_rate callback
clk: tegra: periph: Make tegra_clk_periph_ops static
clk: tegra: periph: Fix error handling and resolve unsigned compare warning
clk: imx: scu: convert from round_rate() to determine_rate()
clk: imx: pllv4: convert from round_rate() to determine_rate()
clk: imx: pllv3: convert from round_rate() to determine_rate()
clk: imx: pllv2: convert from round_rate() to determine_rate()
clk: imx: pll14xx: convert from round_rate() to determine_rate()
clk: imx: pfd: convert from round_rate() to determine_rate()
clk: imx: frac-pll: convert from round_rate() to determine_rate()
clk: imx: fracn-gppll: convert from round_rate() to determine_rate()
clk: imx: fixup-div: convert from round_rate() to determine_rate()
clk: imx: cpu: convert from round_rate() to determine_rate()
clk: imx: busy: convert from round_rate() to determine_rate()
clk: imx: composite-93: remove round_rate() in favor of determine_rate()
clk: imx: composite-8m: remove round_rate() in favor of determine_rate()
clk: qcom: Remove redundant pm_runtime_mark_last_busy() calls
clk: imx: Remove redundant pm_runtime_mark_last_busy() calls
...

show more ...

Merge branches 'clk-renesas', 'clk-samsung', 'clk-spacemit', 'clk-allwinner' and 'clk-amlogic' into clk-next

* clk-renesas: (42 commits)
clk: renesas: r9a08g045: Add MSTOP for coupled clocks as we

Merge branches 'clk-renesas', 'clk-samsung', 'clk-spacemit', 'clk-allwinner' and 'clk-amlogic' into clk-next

* clk-renesas: (42 commits)
clk: renesas: r9a08g045: Add MSTOP for coupled clocks as well
clk: renesas: r9a09g047: Add clock and reset signals for the GBETH IPs
clk: renesas: r9a09g057: Add XSPI clock/reset
clk: renesas: r9a09g056: Add XSPI clock/reset
clk: renesas: rzv2h: Add fixed-factor module clocks with status reporting
clk: renesas: r9a09g057: Add support for xspi mux and divider
clk: renesas: r9a09g056: Add support for xspi mux and divider
clk: renesas: r9a09g077: Add RIIC module clocks
clk: renesas: r9a09g077: Add PLL2 and SDHI clock support
clk: renesas: rzv2h: Drop redundant base pointer from pll_clk
clk: renesas: r9a09g057: Add entries for the RSPIs
dt-bindings: clock: renesas,r9a09g077/87: Add SDHI_CLKHS clock ID
dt-bindings: clock: renesas,r9a09g056/57-cpg: Add XSPI core clock
clk: renesas: rzv2h: Add missing include file
clk: renesas: rzv2h: Use devm_kmemdup_array()
clk: renesas: Add CPG/MSSR support to RZ/N2H SoC
clk: renesas: r9a09g077: Add PCLKL core clock
dt-bindings: clock: renesas,cpg-mssr: Document RZ/N2H support
dt-bindings: soc: renesas: Document RZ/N2H (R9A09G087) SoC
dt-bindings: clock: renesas,r9a09g077: Add PCLKL core clock ID
...

* clk-samsung:
clk: samsung: exynosautov920: add block hsi2 clock support
dt-bindings: clock: exynosautov920: add hsi2 clock definitions
dt-bindings: clock: exynosautov920: sort clock definitions
clk: samsung: exynos850: fix a comment
clk: samsung: gs101: fix alternate mout_hsi0_usb20_ref parent clock
clk: samsung: gs101: fix CLK_DOUT_CMU_G3D_BUSD

* clk-spacemit:
clk: spacemit: ccu_pll: fix error return value in recalc_rate callback
reset: spacemit: add support for SpacemiT CCU resets
clk: spacemit: mark K1 pll1_d8 as critical
clk: spacemit: define three reset-only CCUs
clk: spacemit: set up reset auxiliary devices
soc: spacemit: create a header for clock/reset registers
dt-bindings: soc: spacemit: define spacemit,k1-ccu resets

* clk-allwinner:
clk: sunxi-ng: ccu_nm: convert from round_rate() to determine_rate()
clk: sunxi-ng: ccu_nkmp: convert from round_rate() to determine_rate()
clk: sunxi-ng: ccu_nk: convert from round_rate() to determine_rate()
clk: sunxi-ng: ccu_gate: convert from round_rate() to determine_rate()
clk: sunxi-ng: v3s: Assign the de and tcon clocks to the video pll
clk: sunxi-ng: v3s: Fix de clock definition
clk: sunxi-ng: sun55i-a523-r-ccu: Add missing PPU0 reset
dt-bindings: reset: sun55i-a523-r-ccu: Add missing PPU0 reset

* clk-amlogic:
clk: amlogic: s4: remove unused data
clk: amlogic: drop clk_regmap tables
clk: amlogic: get regmap with clk_regmap_init
clk: amlogic: remove unnecessary headers
clk: amlogic: axg-audio: use the auxiliary reset driver

show more ...

Merge tag 'renesas-clk-for-v6.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull Renesas clk driver updates from Geert Uytterhoeven:

- Add Expand

Merge tag 'renesas-clk-for-v6.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull Renesas clk driver updates from Geert Uytterhoeven:

- Add Expanded Serial Peripheral Interface (xSPI) clocks and resets on
Renesas RZ/V2H(P) and RZ/V2N
- Add SPI (RSPI) clocks and resets on Renesas RZ/V2H(P)
- Add SDHI and I2C clocks on Renesas RZ/T2H and RZ/N2H
- Add Ethernet clocks and resets on Renesas RZ/G3E
- Initial support for the Renesas RZ/T2H (R9A09G077) and RZ/N2H
(R9A09G087) SoCs
- Add Ethernet clocks and resets on Renesas RZ/V2H and RZ/V2N
- Add timer, I2C, watchdog, GPU, and USB2.0 clocks and resets on
Renesas RZ/V2N
- Rework Module Stop and Power Domain support on the Renesas
RZ/G2L family of SoCs (especially on RZ/G3S)
- Add I3C clocks and resets on Renesas RZ/G3E

* tag 'renesas-clk-for-v6.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: (42 commits)
clk: renesas: r9a08g045: Add MSTOP for coupled clocks as well
clk: renesas: r9a09g047: Add clock and reset signals for the GBETH IPs
clk: renesas: r9a09g057: Add XSPI clock/reset
clk: renesas: r9a09g056: Add XSPI clock/reset
clk: renesas: rzv2h: Add fixed-factor module clocks with status reporting
clk: renesas: r9a09g057: Add support for xspi mux and divider
clk: renesas: r9a09g056: Add support for xspi mux and divider
clk: renesas: r9a09g077: Add RIIC module clocks
clk: renesas: r9a09g077: Add PLL2 and SDHI clock support
clk: renesas: rzv2h: Drop redundant base pointer from pll_clk
clk: renesas: r9a09g057: Add entries for the RSPIs
dt-bindings: clock: renesas,r9a09g077/87: Add SDHI_CLKHS clock ID
dt-bindings: clock: renesas,r9a09g056/57-cpg: Add XSPI core clock
clk: renesas: rzv2h: Add missing include file
clk: renesas: rzv2h: Use devm_kmemdup_array()
clk: renesas: Add CPG/MSSR support to RZ/N2H SoC
clk: renesas: r9a09g077: Add PCLKL core clock
dt-bindings: clock: renesas,cpg-mssr: Document RZ/N2H support
dt-bindings: soc: renesas: Document RZ/N2H (R9A09G087) SoC
dt-bindings: clock: renesas,r9a09g077: Add PCLKL core clock ID
...

show more ...

clk: renesas: rzg2l: Add support for MSTOP in clock enable/disable API

The RZ/{G2L,V2L,G3S} CPG versions support a feature called MSTOP. Each
module has one or more MSTOP bits associated with it, a

clk: renesas: rzg2l: Add support for MSTOP in clock enable/disable API

The RZ/{G2L,V2L,G3S} CPG versions support a feature called MSTOP. Each
module has one or more MSTOP bits associated with it, and these bits
need to be configured along with the module clocks. Setting the MSTOP
bits switches the module between normal and standby states.

Previously, MSTOP support was abstracted through power domains (struct
generic_pm_domain::{power_on, power_off} APIs). With this abstraction,
the order of setting the MSTOP and CLKON bits was as follows:

Previous Order:
A/ Switching to Normal State (e.g., during probe):
1/ Clear module MSTOP bit
2/ Set module CLKON bit

B/ Switching to Standby State (e.g., during remove):
1/ Clear CLKON bit
2/ Set MSTOP bit

However, in some cases (when the clock is disabled through devres), the
order may have been (due to the issue described in link section):

1/ Set MSTOP bit
2/ Clear CLKON bit

Recently, the hardware team has suggested that the correct order to set
the MSTOP and CLKON bits is:

Updated Order:
A/ Switching to Normal State (e.g., during probe):
1/ Set CLKON bit
2/ Clear MSTOP bit

B/ Switching to Standby State (e.g., during remove):
1/ Set MSTOP bit
2/ Clear CLKON bit

To prevent future issues due to incorrect ordering, the MSTOP setup has
now been implemented in rzg2l_mod_clock_endisable(), ensuring compliance
with the sequence suggested in Figure 41.5: Module Standby Mode
Procedure from the RZ/G3S HW manual, Rev1.10.

Additionally, since multiple clocks of a single module may be mapped to
a single MSTOP bit, MSTOP setup is reference-counted.

Furthermore, as all modules start in the normal state after reset, if
the module clocks are disabled, the module state is switched to standby.
This prevents keeping the module in an invalid state, as recommended by
the hardware team.

Link: https://lore.kernel.org/all/20250215130849.227812-1-claudiu.beznea.uj@bp.renesas.com/
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250527112403.1254122-5-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

show more ...

Merge branch 'next' into for-linus

Prepare input updates for 6.16 merge window.

Merge drm/drm-next into drm-intel-gt-next

Need to pull in a67221b5eb8d ("drm/i915/dp: Return min bpc supported by source instead of 0")
in order to fix build breakage on GCC 9.4.0 (from Ubuntu 20.04

Merge drm/drm-next into drm-intel-gt-next

Need to pull in a67221b5eb8d ("drm/i915/dp: Return min bpc supported by source instead of 0")
in order to fix build breakage on GCC 9.4.0 (from Ubuntu 20.04).

Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

show more ...

Merge drm/drm-next into drm-intel-next

Backmerge to sync with v6.15-rc, xe, and specifically async flip changes
in drm-misc.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Merge tag 'v6.15-rc6' into next

Sync up with mainline to bring in xpad controller changes.

Merge remote-tracking branch 'drm-misc/drm-misc-next' into msm-next

Merge drm-misc-next to get commit Fixes: fec450ca15af ("drm/display:
hdmi: provide central data authority for ACR params").

Signe

Merge remote-tracking branch 'drm-misc/drm-misc-next' into msm-next

Merge drm-misc-next to get commit Fixes: fec450ca15af ("drm/display:
hdmi: provide central data authority for ACR params").

Signed-off-by: Rob Clark <robdclark@chromium.org>

show more ...

Merge drm/drm-next into drm-xe-next

Backmerge to bring in linux 6.15-rc.

Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>

Merge tag 'v6.15-rc1' into x86/cpu, to refresh the branch with upstream changes

Signed-off-by: Ingo Molnar <mingo@kernel.org>

Merge tag 'v6.15-rc1' into x86/asm, to refresh the branch

Signed-off-by: Ingo Molnar <mingo@kernel.org>

Merge drm/drm-fixes into drm-misc-fixes

Backmerging to get updates from v6.15-rc1.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

Merge drm/drm-next into drm-misc-next

Backmerging to get v6.15-rc1 into drm-misc-next. Also fixes a
build issue when enabling CONFIG_DRM_SCHED_KUNIT_TEST.

Signed-off-by: Thomas Zimmermann <tzimmerm

Merge drm/drm-next into drm-misc-next

Backmerging to get v6.15-rc1 into drm-misc-next. Also fixes a
build issue when enabling CONFIG_DRM_SCHED_KUNIT_TEST.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

show more ...

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"Here's the pile of clk driver patches. The usual suspects^Wsilicon
vendor

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"Here's the pile of clk driver patches. The usual suspects^Wsilicon
vendors are all here, adding new SoC support and fixing existing code.

There are a few patches to the clk framework here as well. They've
been baking in linux-next for weeks so I'm hoping we don't have to
revert them. The disable OF node patch is probably the scariest one
although it seems unlikely that a system would be relying on a driver
_not_ probing because the clk never appeared, but you never know.

Nothing looks out of the ordinary on the driver side but that's
because it's mostly a bunch of data.

Core:
- Use dev_err_probe() in the clk registration path (Peering into the
crystal ball shows many patches that remove printks)
- Check for disabled OF nodes in of_clk_get_hw_from_clkspec()

New Drivers:
- Allwinner A523/T527 clk driver
- Qualcomm IPQ9574 NSS clk driver
- Qualcomm QCS8300 GPU and video clk drivers
- Qualcomm SDM429 RPM clks
- Qualcomm QCM6490 LPASS (low power audio) resets
- Samsung Exynos2200: driver for several clock controllers (Alive,
CMGP, HSI, PERIC/PERIS, TOP, UFS and VFS)
- Samsung Exynos7870: Driver for several clock controllers (Alive,
MIF, DISP AUD, FSYS, G3D, ISP, MFC and PERI)
- Rockchip rk3528 and rk3562 clk driver

Updates:
- Various fixes to SoC clk drivers for incorrect data, avoid touching
protected registers, etc.
- Additions for some missing clks in existing SoC clk drivers
- DT schema conversions from text to YAML
- Kconfig cleanups to allow drivers to be compiled on moar
architectures"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (125 commits)
clk: qcom: Add NSS clock Controller driver for IPQ9574
clk: qcom: gcc-ipq9574: Add support for gpll0_out_aux clock
dt-bindings: clock: Add ipq9574 NSSCC clock and reset definitions
dt-bindings: clock: gcc-ipq9574: Add definition for GPLL0_OUT_AUX
clk: qcom: gcc-msm8953: fix stuck venus0_core0 clock
clk: qcom: mmcc-sdm660: fix stuck video_subcore0 clock
dt-bindings: clock: qcom,x1e80100-camcc: Fix the list of required-opps
clk: amlogic: a1: fix a typo
clk: amlogic: gxbb: drop non existing 32k clock parent
clk: amlogic: gxbb: drop incorrect flag on 32k clock
clk: amlogic: g12b: fix cluster A parent data
clk: amlogic: g12a: fix mmc A peripheral clock
dt-bindings: clocks: atmel,at91rm9200-pmc: add missing compatibles
dt-bindings: reset: fix double id on rk3562-cru reset ids
drivers: clk: qcom: ipq5424: fix the freq table of sdcc1_apps clock
clk: qcom: lpassaudiocc-sc7280: Add support for LPASS resets for QCM6490
dt-bindings: clock: qcom: Add compatible for QCM6490 boards
clk: qcom: gdsc: Update the status poll timeout for GDSC
clk: qcom: gdsc: Set retain_ff before moving to HW CTRL
clk: davinci: remove support for da830
...

show more ...

Merge branches 'clk-parent', 'clk-renesas', 'clk-mediatek' and 'clk-cleanup' into clk-next

* clk-parent:
clk: check for disabled clock-provider in of_clk_get_hw_from_clkspec()

* clk-renesas: (24

Merge branches 'clk-parent', 'clk-renesas', 'clk-mediatek' and 'clk-cleanup' into clk-next

* clk-parent:
clk: check for disabled clock-provider in of_clk_get_hw_from_clkspec()

* clk-renesas: (24 commits)
clk: renesas: r9a09g047: Add clock and reset signals for the TSU IP
clk: renesas: rzv2h: Adjust for CPG_BUS_m_MSTOP starting from m = 1
clk: renesas: r7s9210: Distinguish clocks by clock type
clk: renesas: rzg2l: Remove unneeded nullify checks
clk: renesas: cpg-mssr: Remove obsolete nullify check
clk: renesas: r9a09g057: Add entries for the DMACs
clk: renesas: r9a09g047: Add CANFD clocks and resets
clk: renesas: r9a09g047: Add CRU0 clocks and resets
clk: renesas: rzv2h: Update error message
clk: renesas: rzg2l: Update error message
clk: renesas: r9a09g047: Add ICU clock/reset
clk: renesas: r9a07g043: Fix HP clock source for RZ/Five
clk: renesas: r9a09g047: Add SDHI clocks/resets
clk: renesas: r8a779h0: Add VSPX clock
clk: renesas: r8a779h0: Add FCPVX clock
clk: renesas: r8a08g045: Check the source of the CPU PLL settings
clk: renesas: r9a09g047: Add WDT clocks and resets
clk: renesas: r8a779h0: Add ISP core clocks
clk: renesas: r8a779g0: Add ISP core clocks
clk: renesas: r8a779a0: Add ISP core clocks
...

* clk-mediatek:
clk: mediatek: Add SMI LARBs reset for MT8188
dt-bindings: clock: mediatek: Add SMI LARBs reset for MT8188
clk: mediatek: mt8188-vdo1: Add VDO1_DPI1_HDMI clock for hdmitx
dt-bindings: clock: mediatek,mt8188: Add VDO1_DPI1_HDMI clock

* clk-cleanup:
dt-bindings: clocks: atmel,at91rm9200-pmc: add missing compatibles
clk: davinci: remove support for da830
dt-bindings: clock: ti: Convert ti-clkctrl.txt to json-schema
clk: mmp: Fix NULL vs IS_ERR() check
clk: Print an error when clk registration fails
clk: Correct the data types of the variables in clk_calc_new_rates
clk: imgtec: use %pe for better readability of errors while printing
clk: stm32f4: fix an uninitialized variable
clk: keystone: syscon-clk: Do not use syscon helper to build regmap

show more ...

Merge tag 'renesas-clk-for-v6.15-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull Renesas clk driver updates from Geert Uytterhoeven:

- Add therma

Merge tag 'renesas-clk-for-v6.15-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull Renesas clk driver updates from Geert Uytterhoeven:

- Add thermal (TSU) clock, reset, and power domain on Renesas RZ/G3S
- Add AI accelerator (DRP-AI) clocks and reset on Renesas RZ/V2L
- Add Image Signal Processor (ISP, FCPVX, VSPX) clocks on Renesas R-Car V3U
V4H, and V4M
- Add Watchdog (WDT), SDHI, Interrupt Controller (ICU), Camera (CRU0)
and CAN-FD clocks and resets on Renesas RZ/G3E

* tag 'renesas-clk-for-v6.15-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: r9a09g047: Add CANFD clocks and resets
clk: renesas: r9a09g047: Add CRU0 clocks and resets
clk: renesas: rzv2h: Update error message
clk: renesas: rzg2l: Update error message
clk: renesas: r9a09g047: Add ICU clock/reset
clk: renesas: r9a07g043: Fix HP clock source for RZ/Five
clk: renesas: r9a09g047: Add SDHI clocks/resets
clk: renesas: r8a779h0: Add VSPX clock
clk: renesas: r8a779h0: Add FCPVX clock
clk: renesas: r8a08g045: Check the source of the CPU PLL settings
clk: renesas: r9a09g047: Add WDT clocks and resets
clk: renesas: r8a779h0: Add ISP core clocks
clk: renesas: r8a779g0: Add ISP core clocks
clk: renesas: r8a779a0: Add ISP core clocks
clk: renesas: r8a779a0: Add FCPVX clocks
clk: renesas: r9a07g044: Add clock and reset entry for DRP-AI
clk: renesas: r9a08g045: Add clocks, resets and power domain support for the TSU IP
clk: renesas: rzg2l-cpg: Refactor Runtime PM clock validation

show more ...

Merge drm/drm-next into drm-intel-gt-next

We need
4ba4f1afb6a9 ("perf: Generic hotplug support for a PMU with a scope")
in order to land a i915 PMU simplification and a fix. That landed in 6.12
and

Merge drm/drm-next into drm-intel-gt-next

We need
4ba4f1afb6a9 ("perf: Generic hotplug support for a PMU with a scope")
in order to land a i915 PMU simplification and a fix. That landed in 6.12
and we are stuck at 6.9 so lets bump things forward.

Signed-off-by: Tvrtko Ursulin <tursulin@ursulin.net>

show more ...

clk: renesas: r9a07g044: Add clock and reset entry for DRP-AI

Add clock and reset entries for the DRP-AI block, which is available only
on the Renesas RZ/V2L SoC.

Signed-off-by: Lad Prabhakar <prab

clk: renesas: r9a07g044: Add clock and reset entry for DRP-AI

Add clock and reset entries for the DRP-AI block, which is available only
on the Renesas RZ/V2L SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250106202853.262787-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

show more ...

Merge branch 'next' into for-linus

Prepare input updates for 6.12 merge window.

Merge tag 'v6.10' into next

Sync up with mainline to bring in device_for_each_child_node_scoped()
and other newer APIs.

Merge branch 'next' into for-linus

Prepare input updates for 6.11 merge window.

Merge branch 'tip/x86/cpu'

The Lunarlake patches rely on the new VFM stuff.

Signed-off-by: Peter Zijlstra <peterz@infradead.org>

Merge drm-misc-next-2024-07-04 into drm-misc-next-fixes

Let's start the drm-misc-next-fixes cycle.

Signed-off-by: Maxime Ripard <mripard@kernel.org>

Merge drm/drm-next into drm-intel-next

Sync to v6.10-rc3.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>