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496fa746 |
| 17-Mar-2025 |
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> |
Merge tag 'v6.14-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into gpio/for-next
Linux 6.14-rc7
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Revision tags: v6.14-rc7 |
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e3a854b5 |
| 14-Mar-2025 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk fixes from Stephen Boyd: "A few clk driver fixes for Samsung and Qualcomm clk drivers:
- Susp
Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk fixes from Stephen Boyd: "A few clk driver fixes for Samsung and Qualcomm clk drivers:
- Suspend on Google GS101 crashes when trying to save some clk registers that we shouldn't be saving so we don't do that anymore
- The PLL lock time was wrong on the Tesla FSD which could lead to the PLL never locking
- Qualcomm's display clk controller on SM8750 was trying to change the frequency of a parent clk for the DSI device when it should have stopped and adjusted the divider. The failure is that the clk frequency was half what was expected, leading to broken display"
* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: clk: samsung: update PLL locktime for PLL142XX used on FSD platform clk: samsung: gs101: fix synchronous external abort in samsung_clk_save() clk: qcom: dispcc-sm8750: Drop incorrect CLK_SET_RATE_PARENT on byte intf parent
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Revision tags: v6.14-rc6, v6.14-rc5 |
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#
1801cee7 |
| 28-Feb-2025 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
clk: qcom: dispcc: Constify 'struct qcom_cc_desc'
'struct qcom_cc_desc' is passed to qcom_cc_map() and qcom_cc_really_probe() only as pointer to const, so make the memory const for safety.
Signed-o
clk: qcom: dispcc: Constify 'struct qcom_cc_desc'
'struct qcom_cc_desc' is passed to qcom_cc_map() and qcom_cc_really_probe() only as pointer to const, so make the memory const for safety.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20250228-clk-qcom-const-v1-2-611ab80d45e4@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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0410c612 |
| 28-Feb-2025 |
Lucas De Marchi <lucas.demarchi@intel.com> |
Merge drm/drm-next into drm-xe-next
Sync to fix conlicts between drm-xe-next and drm-intel-next.
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
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Revision tags: v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1 |
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b8501feb |
| 29-Jan-2025 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
clk: qcom: dispcc-sm8750: Drop incorrect CLK_SET_RATE_PARENT on byte intf parent
The parent of disp_cc_mdss_byte0_intf_clk clock should not propagate up the rates, because this messes up entire cloc
clk: qcom: dispcc-sm8750: Drop incorrect CLK_SET_RATE_PARENT on byte intf parent
The parent of disp_cc_mdss_byte0_intf_clk clock should not propagate up the rates, because this messes up entire clock hierarchy when setting clock rates in MSM DSI driver.
The dsi_link_clk_set_rate_6g() first sets entire clock hierarchy rates via dev_pm_opp_set_rate() on byte clock and then sets individual clock rates, like pixel and byte_intf clocks, to proper frequencies. Having CLK_SET_RATE_PARENT caused that entire tree was re-calced and the byte clock received halved frequency. Drop CLK_SET_RATE_PARENT to fix this and align with SM8550 and SM8650.
Fixes: f1080d8dab0f ("clk: qcom: dispcc-sm8750: Add SM8750 Display clock controller") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250129154519.209791-1-krzysztof.kozlowski@linaro.org Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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0b119045 |
| 26-Feb-2025 |
Dmitry Torokhov <dmitry.torokhov@gmail.com> |
Merge tag 'v6.14-rc4' into next
Sync up with the mainline.
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d81901a5 |
| 12-Feb-2025 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
clk: qcom: dispcc-sm8750: Allow dumping regmap
Reading few registers at the end of the block (e.g. 0x10000, 0x10004) results in synchronous external abort, so limit the regmap to the last readable r
clk: qcom: dispcc-sm8750: Allow dumping regmap
Reading few registers at the end of the block (e.g. 0x10000, 0x10004) results in synchronous external abort, so limit the regmap to the last readable register which allows dumping the regs for debugging.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250212163243.237658-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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93c7dd1b |
| 06-Feb-2025 |
Maxime Ripard <mripard@kernel.org> |
Merge drm/drm-next into drm-misc-next
Bring rc1 to start the new release dev.
Signed-off-by: Maxime Ripard <mripard@kernel.org>
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9e676a02 |
| 05-Feb-2025 |
Namhyung Kim <namhyung@kernel.org> |
Merge tag 'v6.14-rc1' into perf-tools-next
To get the various fixes in the current master.
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
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ea9f8f2b |
| 05-Feb-2025 |
Jani Nikula <jani.nikula@intel.com> |
Merge drm/drm-next into drm-intel-next
Sync with v6.14-rc1.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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c771600c |
| 05-Feb-2025 |
Tvrtko Ursulin <tursulin@ursulin.net> |
Merge drm/drm-next into drm-intel-gt-next
We need 4ba4f1afb6a9 ("perf: Generic hotplug support for a PMU with a scope") in order to land a i915 PMU simplification and a fix. That landed in 6.12 and
Merge drm/drm-next into drm-intel-gt-next
We need 4ba4f1afb6a9 ("perf: Generic hotplug support for a PMU with a scope") in order to land a i915 PMU simplification and a fix. That landed in 6.12 and we are stuck at 6.9 so lets bump things forward.
Signed-off-by: Tvrtko Ursulin <tursulin@ursulin.net>
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#
641b0c64 |
| 22-Jan-2025 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd: "A pretty quiet cycle this time around. We have a bunch of new Qualcomm cl
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd: "A pretty quiet cycle this time around. We have a bunch of new Qualcomm clk drivers, per usual, and then a handful of drivers for other SoCs. Then the usual pile of cleanups is fairly small data fixes or converting DT bindings to YAML so they can be validated.
No changes to the core framework besides an OF node refcount bump that never got decremented.
New Drivers:
- 5L35023 variant of Versa 3 clock generator
- Various Qualcomm clk controllers: IPQ CMN PLL, SM6115 LPASS, SM750 global, tcsr, rpmh, and display. X Plus GPU and global. QCS615 rpmh and MSM8937 and MSM8940 RPM.
- Qualcomm Pongo and Taycan Alpha PLLs
- Qualcomm IPQ5424 NoC-related interconnect clks
- Renesas RZ/G3E (R9A09G047) SoC clk driver
- SAMA7D65 SoC clk driver
- Samsung Exynos990 SoC clk driver"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (159 commits) clk: analogbits: Fix incorrect calculation of vco rate delta clk: bcm: rpi: Add disp clock clk: bcm: rpi: Create helper to retrieve private data clk: bcm: rpi: Enable minimize for all firmware clocks clk: bcm: rpi: Allow cpufreq driver to also adjust gpu clocks clk: bcm: rpi: Add ISP to exported clocks clk: stm32f4: support spread spectrum clock generation clk: stm32f4: use FIELD helpers to access the PLLCFGR fields dt-bindings: clock: st,stm32-rcc: support spread spectrum clocking dt-bindings: clock: convert stm32 rcc bindings to json-schema clk: Use str_enable_disable-like helpers clk: clk-loongson2: Fix the number count of clk provider clk: clk-loongson2: Switch to use devm_clk_hw_register_fixed_rate_parent_data() clk: starfive: Make _clk_get become a common helper function clk: en7523: Add clock for eMMC for EN7581 dt-bindings: clock: add ID for eMMC for EN7581 dt-bindings: clock: drop NUM_CLOCKS define for EN7581 clk: en7523: Rework clock handling for different clock numbers clk: thead: Fix cpu2vp_clk for TH1520 AP_SUBSYS clocks clk: thead: Add CLK_IGNORE_UNUSED to fix TH1520 boot ...
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#
b2fee97e |
| 21-Jan-2025 |
Stephen Boyd <sboyd@kernel.org> |
Merge branches 'clk-microchip', 'clk-xilinx', 'clk-allwinner', 'clk-imx' and 'clk-qcom' into clk-next
* clk-microchip: clk: at91: sama7d65: add sama7d65 pmc driver dt-bindings: clock: Add SAMA7D
Merge branches 'clk-microchip', 'clk-xilinx', 'clk-allwinner', 'clk-imx' and 'clk-qcom' into clk-next
* clk-microchip: clk: at91: sama7d65: add sama7d65 pmc driver dt-bindings: clock: Add SAMA7D65 PMC compatible string dt-bindings: clocks: atmel,at91sam9x5-sckc: add sama7d65 clk: at91: sckc: Use SCKC_{TD, MD}_SLCK IDs for clk32k clocks dt-bindings: clk: at91: Add clock IDs for the slow clock controller
* clk-xilinx: clk: clocking-wizard: calculate dividers fractional parts dt-bindings: clock: xilinx: Add reset GPIO for VCU dt-bindings: clock: xilinx: Convert VCU bindings to dtschema
* clk-allwinner: clk: sunxi-ng: h616: Reparent CPU clock during frequency changes clk: sunxi-ng: a64: stop force-selecting PLL-MIPI as TCON0 parent clk: sunxi-ng: a64: drop redundant CLK_PLL_VIDEO0_2X and CLK_PLL_MIPI dt-bindings: clock: sunxi: Export PLL_VIDEO_2X and PLL_MIPI
* clk-imx: clk: imx: Apply some clks only for i.MX93 arm64: dts: imx93: Use IMX93_CLK_SPDIF_IPG as SPDIF IPG clock clk: imx93: Add IMX93_CLK_SPDIF_IPG clock dt-bindings: clock: imx93: Add SPDIF IPG clk clk: imx: pll14xx: Add 208 MHz and 416 MHz entries for PLL1416x clk: imx8mp: Fix clkout1/2 support
* clk-qcom: (63 commits) clk: qcom: Select CLK_X1E80100_GCC in config CLK_X1P42100_GPUCC dt-bindings: clock: move qcom,x1e80100-camcc to its own file clk: qcom: smd-rpm: Add clocks for MSM8940 dt-bindings: clock: qcom,rpmcc: Add MSM8940 compatible clk: qcom: smd-rpm: Add clocks for MSM8937 dt-bindings: clock: qcom,rpmcc: Add MSM8937 compatible clk: qcom: ipq5424: Use icc-clk for enabling NoC related clocks dt-bindings: interconnect: Add Qualcomm IPQ5424 support clk: qcom: Add SM6115 LPASSCC dt-bindings: clock: Add Qualcomm SM6115 LPASS clock controller clk: qcom: gcc-sdm845: Do not use shared clk_ops for QUPs clk: qcom: gcc-sdm845: Add general purpose clock ops clk: qcom: clk-rcg2: split __clk_rcg2_configure function clk: qcom: clk-rcg2: document calc_rate function clk: qcom: gcc-x1e80100: Do not turn off usb_2 controller GDSC clk: qcom: ipq5424: add gcc_xo_clk dt-bindings: clock: qcom: gcc-ipq5424: add gcc_xo_clk macro dt-bindings: clock: qcom: gcc-ipq5424: remove apss_dbg clock macro clk: qcom: ipq5424: remove apss_dbg clock dt-bindings: clock: qcom,sdm845-camcc: add sdm670 compatible ...
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Revision tags: v6.13 |
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5542b0b5 |
| 13-Jan-2025 |
Stephen Boyd <sboyd@kernel.org> |
Merge tag 'qcom-clk-for-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into clk-qcom
Pull Qualcomm clk driver updates from Bjorn Andersson:
- Support for various Qualcomm clk
Merge tag 'qcom-clk-for-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into clk-qcom
Pull Qualcomm clk driver updates from Bjorn Andersson:
- Support for various Qualcomm clk controllers: IPQ CMN PLL, SM6115 LPASS, SM750 global, tcsr, rpmh, and display. X Plus GPU and global. QCS615 rpmh and MSM8937 and MSM8940 RPM. - Support for Qualcomm Pongo and Taycan Alpha PLLs - Describe Qualcomm X Elite Titan GDSC relationships - Mark Qualcomm SM8550 and SM8650 PCIe GDSCs and X Elite USB GDSC as retention/on - Allow Qualcomm SDM845 general purpose clk to have arbitrary frequencies - Add Qualcomm IPQ5424 NoC-related interconnect clks
* tag 'qcom-clk-for-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (63 commits) clk: qcom: Select CLK_X1E80100_GCC in config CLK_X1P42100_GPUCC dt-bindings: clock: move qcom,x1e80100-camcc to its own file clk: qcom: smd-rpm: Add clocks for MSM8940 dt-bindings: clock: qcom,rpmcc: Add MSM8940 compatible clk: qcom: smd-rpm: Add clocks for MSM8937 dt-bindings: clock: qcom,rpmcc: Add MSM8937 compatible clk: qcom: ipq5424: Use icc-clk for enabling NoC related clocks dt-bindings: interconnect: Add Qualcomm IPQ5424 support clk: qcom: Add SM6115 LPASSCC dt-bindings: clock: Add Qualcomm SM6115 LPASS clock controller clk: qcom: gcc-sdm845: Do not use shared clk_ops for QUPs clk: qcom: gcc-sdm845: Add general purpose clock ops clk: qcom: clk-rcg2: split __clk_rcg2_configure function clk: qcom: clk-rcg2: document calc_rate function clk: qcom: gcc-x1e80100: Do not turn off usb_2 controller GDSC clk: qcom: ipq5424: add gcc_xo_clk dt-bindings: clock: qcom: gcc-ipq5424: add gcc_xo_clk macro dt-bindings: clock: qcom: gcc-ipq5424: remove apss_dbg clock macro clk: qcom: ipq5424: remove apss_dbg clock dt-bindings: clock: qcom,sdm845-camcc: add sdm670 compatible ...
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Revision tags: v6.13-rc7 |
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f1080d8d |
| 06-Jan-2025 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
clk: qcom: dispcc-sm8750: Add SM8750 Display clock controller
Add driver for Display clock controller (DISPCC) in Qualcomm SM8750. The device has several differences against SM8650, including new Po
clk: qcom: dispcc-sm8750: Add SM8750 Display clock controller
Add driver for Display clock controller (DISPCC) in Qualcomm SM8750. The device has several differences against SM8650, including new Pongo PLLs and different clock parents, thus no compatibility or driver re-usage.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250106-sm8750-dispcc-v2-3-6f42beda6317@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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