| #
c17ee635
|
| 23-Feb-2026 |
Maxime Ripard <mripard@kernel.org> |
Merge drm/drm-fixes into drm-misc-fixes
7.0-rc1 was just released, let's merge it to kick the new release cycle.
Signed-off-by: Maxime Ripard <mripard@kernel.org>
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| #
13c916af
|
| 15-Feb-2026 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd: "Not much changed in the clk framework this time except the clk.h consumer
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd: "Not much changed in the clk framework this time except the clk.h consumer API moved the context saving APIs around to fix a build error in certain configurations.
There was a change to the core framework for CLK_OPS_PARENT_ENABLE behavior during registration, but it wrecked existing drivers that didn't expect things to be turned off during clk registration so it got reverted.
This cycle is really a large collection of new clk drivers, primarily for Qualcomm SoCs but also for Amlogic, SpacemiT, Google, and Aspeed. Another big change in here is support for automatic hardware clock gating on Samsung SoCs where the clks turn on and off when needed. Ideally more vendors move to this method for better power savings. The highlights are in the updates section below.
Beyond all the new drivers we have a bunch of cleanups like converting drivers from divider_round_rate() to divider_determine_rate() and using scoped for each OF child loops. Otherwise it's the usual data fixes and plugging reference leaks, etc. that's all pretty ordinary but not critical enough to fix until the next release.
New Drivers: - Qualcomm Kaanapali global, tcsr, rpmh, display, gpu, camera, and video clk controllers - Qualcomm SM8750 camera clk controllers - Qualcomm MSM8940 and SDM439 global clk controllers - Google GS101 Display Process Unit (DPU) clk controllers - SpacemiT K3 clk controllers - Amlogic t7 clk controllers - Aspeed AST2700 clk controllers
Updates: - Convert clock dividers from round_rate() to determine_rate() - Fix sparse warnings, kernel-doc warnings, and plug leaked OF refs - Automatic hardware clk gating on Google GS101 SoCs - Amlogic s4 video clks - CAN-FD clks and resets on Renesas RZ/T2H, RZ/N2H, RZ/V2H, and RZ/V2N - Expanded Serial Peripheral Interface (xSPI) clocks and resets on Renesas RZ/T21H and RZ/N2H - DMAC, interrupt controller (ICU), SPI, and thermal (TSU) clocks and resets on Renesas RZ/V2N - More serial (RSCI) clocks and resets on Renesas RZ/V2H and RZ/V2N - CPU frequency scaling on T-HEAD TH1520"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (165 commits) clk: aspeed: Add reset for HACE/VIDEO dt-bindings: clock: aspeed: Add VIDEO reset definition clk: aspeed: add AST2700 clock driver MAINTAINERS: Add entry for ASPEED clock drivers. clk: aspeed: Move the existing ASPEED clk drivers into aspeed subdirectory. Revert "clk: Respect CLK_OPS_PARENT_ENABLE during recalc" clk: Disable KUNIT_UML_PCI dt-bindings: clk: rs9: Fix DIF pattern match clk: rs9: Convert to DEFINE_SIMPLE_DEV_PM_OPS() clk: rs9: Reserve 8 struct clk_hw slots for for 9FGV0841 clk: qcom: sm8750: Constify 'qcom_cc_desc' in SM8750 camcc clk: zynqmp: pll: Fix zynqmp_clk_divider_determine_rate kerneldoc clk: zynqmp: divider: Fix zynqmp_clk_divider_determine_rate kerneldoc clk: mediatek: Fix error handling in runtime PM setup clk: mediatek: don't select clk-mt8192 for all ARM64 builds clk: mediatek: Add mfg_eb as parent to mt8196 mfgpll clocks clk: mediatek: Refactor pllfh registration to pass device clk: mediatek: Pass device to clk_hw_register for PLLs clk: mediatek: Refactor pll registration to pass device clk: Respect CLK_OPS_PARENT_ENABLE during recalc ...
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| #
5921ae27
|
| 14-Feb-2026 |
Stephen Boyd <sboyd@kernel.org> |
Merge branches 'clk-aspeed' and 'clk-qcom' into clk-next
* clk-aspeed: clk: aspeed: Add reset for HACE/VIDEO dt-bindings: clock: aspeed: Add VIDEO reset definition clk: aspeed: add AST2700 clo
Merge branches 'clk-aspeed' and 'clk-qcom' into clk-next
* clk-aspeed: clk: aspeed: Add reset for HACE/VIDEO dt-bindings: clock: aspeed: Add VIDEO reset definition clk: aspeed: add AST2700 clock driver MAINTAINERS: Add entry for ASPEED clock drivers. clk: aspeed: Move the existing ASPEED clk drivers into aspeed subdirectory.
* clk-qcom: (49 commits) clk: qcom: sm8750: Constify 'qcom_cc_desc' in SM8750 camcc clk: qcom: gfx3d: add parent to parent request map clk: qcom: dispcc-sm7150: Fix dispcc_mdss_pclk1_clk_src clk: qcom: dispcc-sdm845: Enable parents for pixel clocks clk: qcom: regmap-divider: convert from divider_round_rate() to divider_determine_rate() clk: qcom: regmap-divider: convert from divider_ro_round_rate() to divider_ro_determine_rate() clk: qcom: alpha-pll: convert from divider_round_rate() to divider_determine_rate() clk: qcom: Add support for GPUCC and GXCLK for Kaanapali clk: qcom: Add support for VideoCC driver for Kaanapali clk: qcom: camcc: Add support for camera clock controller for Kaanapali clk: qcom: dispcc: Add support for display clock controller Kaanapali clk: qcom: clk-alpha-pll: Add support for controlling Pongo EKO_T PLL clk: qcom: clk-alpha-pll: Update the PLL support for cal_l clk: qcom: camcc: Add camera clock controller driver for SM8750 SoC clk: qcom: clk-alpha-pll: Add support for controlling Rivian PLL dt-bindings: clock: qcom: document the Kaanapali GPU Clock Controller dt-bindings: clock: qcom: Add Kaanapali video clock controller dt-bindings: clock: qcom: Add support for CAMCC for Kaanapali dt-bindings: clock: qcom: document Kaanapali DISPCC clock controller dt-bindings: clock: qcom: Add camera clock controller for SM8750 SoC ...
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| #
03b3faa1
|
| 24-Dec-2025 |
Ryan Chen <ryan_chen@aspeedtech.com> |
clk: aspeed: Move the existing ASPEED clk drivers into aspeed subdirectory.
Prepare for long-term maintenance and future additions by introducing a dedicated drivers/clk/aspeed/ subdirectory for ASP
clk: aspeed: Move the existing ASPEED clk drivers into aspeed subdirectory.
Prepare for long-term maintenance and future additions by introducing a dedicated drivers/clk/aspeed/ subdirectory for ASPEED clock drivers.
Move the existing ASPEED clock drivers into the new drivers/clk/aspeed/ subdirectory.
No functional change, file move only.
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com> Reviewed-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| #
a4a508df
|
| 13-Dec-2025 |
Dmitry Torokhov <dmitry.torokhov@gmail.com> |
Merge tag 'v6.18' into next
Sync up with the mainline to bring in the latest APIs.
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| #
cb3aa2b5
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| 30-Jan-2026 |
Sebastian Reichel <sebastian.reichel@collabora.com> |
Merge tag 'ib-mfd-clk-gpio-power-regulator-rtc-v6.20' into psy-next
Merge immutable branch between MFD, Clk, GPIO, Power, Regulator and RTC due for the v6.20 merge window to apply further cleanups o
Merge tag 'ib-mfd-clk-gpio-power-regulator-rtc-v6.20' into psy-next
Merge immutable branch between MFD, Clk, GPIO, Power, Regulator and RTC due for the v6.20 merge window to apply further cleanups on top of the BD72720 power-supply driver contained in this branch.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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| #
d7017821
|
| 11-Feb-2026 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'gpio-updates-for-v7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux
Pull gpio updates from Bartosz Golaszewski: "There are two new drivers and some changes to GPIO cor
Merge tag 'gpio-updates-for-v7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux
Pull gpio updates from Bartosz Golaszewski: "There are two new drivers and some changes to GPIO core but mostly just GPIO driver updates across a wide array of files, adding support for new models as well as various refactoring changes. Nothing controversial and everything has spent a good measure of time in linux-next.
GPIOLIB core: - shrink the GPIO bus driver stub code - rework software node support for "undefined" software nodes - provide and use devm_fwnode_gpiod_get_optional() - only compile the OF quirk for MT2701 when needed
New drivers: - add the GPIO driver for ROHM bd72720 - add the gpio-line-mux driver providing 1-to-many mapping for a single real GPIO
Driver changes: - refactor gpio-pca9570: use lock guard, add missing headers, use devres consistently - add support for a new model (G7 Aspeed sgpiom) to the aspeed-sgpio driver along with some prerequisite refactoring - use device_get_match_data() where applicable and save some lines - add support for more models to gpio-cadence - add the compatible property to reset-gpio and use it in shared GPIO management - drop unnecessary use of irqd_get_trigger_type() in gpio-max77759 - add support for a new variant to gpio-pca953x - extend build coverage with COMPILE_TEST for more drivers - constify configfs structures in gpio-sim and gpio-virtuser - add support for the K3 SoC to gpio-spacemit - implement the missing .get_direction() callback in gpio-max77620 - add support for Tegra264 to gpio-tegra186 - drop unneeded MODULE_ALIAS() from gpio-menz127
DT bindings: - document support for the opencores GPIO controller in gpio-mmio - document new variants for gpio-pca953x
Documentation: - extensively describe interrupt source detection for gpio-pca953x and add more models to the list of supported variants"
* tag 'gpio-updates-for-v7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (59 commits) gpio: tegra186: Add support for Tegra264 dt-bindings: gpio: Add Tegra264 support gpio: spacemit-k1: Use PDR for pin direction, not SDR/CDR gpio: max77620: Implement .get_direction() callback gpio: aspeed-sgpio: Support G7 Aspeed sgpiom controller dt-bindings: gpio: aspeed,sgpio: Support ast2700 gpio: aspeed-sgpio: Convert IRQ functions to use llops callbacks gpio: aspeed-sgpio: Create llops to handle hardware access gpio: aspeed-sgpio: Remove unused bank name field gpio: aspeed-sgpio: Change the macro to support deferred probe regulator: bd71815: switch to devm_fwnode_gpiod_get_optional gpiolib: introduce devm_fwnode_gpiod_get_optional() wrapper gpio: mmio: Add compatible for opencores GPIO dt-bindings: gpio-mmio: Correct opencores GPIO gpio: pca9570: use lock guards gpio: pca9570: Don't use "proxy" headers gpio: pca9570: Use devm_mutex_init() for mutex initialization MAINTAINERS: Add ROHM BD72720 PMIC power: supply: bd71828-power: Support ROHM BD72720 power: supply: bd71828: Support wider register addresses ...
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| #
6acd0e82
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| 15-Jan-2026 |
Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> |
Merge tag 'ib-mfd-clk-gpio-power-regulator-rtc-v6.20' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd into gpio/for-next
Immutable branch between MFD, Clk, GPIO, Power, Regulator and RTC du
Merge tag 'ib-mfd-clk-gpio-power-regulator-rtc-v6.20' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd into gpio/for-next
Immutable branch between MFD, Clk, GPIO, Power, Regulator and RTC due for the v6.20 merge window
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| #
da4950b5
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| 15-Dec-2025 |
Matti Vaittinen <mazziesaccount@gmail.com> |
clk: clk-bd718x7: Support BD72720 clk gate
The BD72720 has similar simple clk gate as a few other ROHM PMICs.
Add support for BD72720 clk gate.
Signed-off-by: Matti Vaittinen <mazziesaccount@gmail
clk: clk-bd718x7: Support BD72720 clk gate
The BD72720 has similar simple clk gate as a few other ROHM PMICs.
Add support for BD72720 clk gate.
Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://patch.msgid.link/742e76cd0b87e726818d4fddc534a29298697b6b.1765804226.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones <lee@kernel.org>
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| #
7362b5b4
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| 02-Dec-2025 |
Jiri Kosina <jkosina@suse.com> |
Merge branch 'for-6.19/nintendo' into for-linus
- switch to WQ_PERCPU workaueues (Marco Crivellari) - reduce potential initialization blocking time of hid-nintendo (Willy Huang)
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| #
2ace5271
|
| 21-Nov-2025 |
Peter Zijlstra <peterz@infradead.org> |
Merge branch 'objtool/core'
Bring in the UDB and objtool data annotations to avoid conflicts while further extending the bug exceptions.
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
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| #
f39b6c46
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| 18-Nov-2025 |
Dmitry Torokhov <dmitry.torokhov@gmail.com> |
Merge tag 'v6.18-rc6' into for-linus
Sync up with the mainline to bring in definition of INPUT_PROP_HAPTIC_TOUCHPAD.
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| #
cb9f145f
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| 01-Nov-2025 |
Rob Clark <robin.clark@oss.qualcomm.com> |
Merge remote-tracking branch 'drm/drm-next' into msm-next-robclark
Back-merge drm-next to get caught up.
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
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| #
ec2e0fb0
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| 16-Oct-2025 |
Takashi Iwai <tiwai@suse.de> |
Merge tag 'asoc-fix-v6.18-rc1' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
ASoC: Fixes for v6.18
A moderately large collection of driver specific fixes, plus a f
Merge tag 'asoc-fix-v6.18-rc1' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
ASoC: Fixes for v6.18
A moderately large collection of driver specific fixes, plus a few new quirks and device IDs. The NAU8821 changes are a little large but more in mechanical ways than in ways that are complex.
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| #
82ee5025
|
| 14-Oct-2025 |
Thomas Hellström <thomas.hellstrom@linux.intel.com> |
Merge drm/drm-next into drm-xe-next
Backmerging to bring in 6.18-rc1.
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
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| #
48a71076
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| 14-Oct-2025 |
Thomas Zimmermann <tzimmermann@suse.de> |
Merge drm/drm-fixes into drm-misc-fixes
Updating drm-misc-fixes to the state of v6.18-rc1.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
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| #
2acee98f
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| 14-Oct-2025 |
Jani Nikula <jani.nikula@intel.com> |
Merge drm/drm-next into drm-intel-next
Sync to v6.18-rc1.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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| #
4f38da1f
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| 13-Oct-2025 |
Mark Brown <broonie@kernel.org> |
spi: Merge up v6.18-rc1
Ensure my CI has a sensible baseline.
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| #
9b966ae4
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| 13-Oct-2025 |
Thomas Zimmermann <tzimmermann@suse.de> |
Merge drm/drm-next into drm-misc-next
Updating drm-misc-next to the state of v6.18-rc1.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
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| #
39e9d5f6
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| 12-Oct-2025 |
Alexei Starovoitov <ast@kernel.org> |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf before 6.18-rc1
Cross-merge BPF and other fixes after downstream PR.
No conflicts.
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
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| #
8b87f67b
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| 08-Oct-2025 |
Dmitry Torokhov <dmitry.torokhov@gmail.com> |
Merge branch 'next' into for-linus
Prepare input updates for 6.18 merge window.
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| #
522ba450
|
| 07-Oct-2025 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd: "There's a bunch of patches here across drivers/clk/ to migrate drivers to
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd: "There's a bunch of patches here across drivers/clk/ to migrate drivers to use struct clk_ops::determine_rate() instead of the round_rate() one so that we can remove the round_rate clk_op entirely. Brian has taken up that task which nobody else has wanted to do for close to a decade. Thanks Brian!
This is all prerequisite work to get to the real task of improving the clk rate setting process. Once we have determine_rate() used everywhere, we'll be able to do things like chain the rate request structs in linked lists to order the rate setting operations or add more parameters without having to change every clk driver in existence. It's also nice to not have multiple ways to do something which just causes confusion for clk driver authors. Overall I'm glad this is getting done.
Beyond this change we also have a tweak to the clk_lookup() function in the core framework to use hashing on the clk name instead of a clk tree walk with string comparisons. We _still_ rely on the clk name to be unique, because historically we've used globally unique strings to describe the clk tree topology. This tree walk becomes increasingly slow as more clks are added to the system. Searching from the roots for a duplicate is simple but pretty dumb and it wastes boot time so we're using a hash table as an improvement. Ideally we wouldn't rely on the strings to be unique at all, relegating them to simply debug information, but that is future work that will likely require some sort of Kconfig knob indicating strings aren't used for topology description.
Outside of the core framework changes we have the usual new SoC support and fixes to clk drivers for things that were discovered once the clks were used by consumer drivers. Nothing in particular is jumping out at me in the "misc" pile, except maybe the Amlogic driver that has gone through a refactoring. That series got a fix from testing in -next though so it seems likely that things have been getting good test coverage for a couple weeks already"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (299 commits) clk: microchip: core: remove duplicate roclk_determine_rate() reset: aspeed: register AST2700 reset auxiliary bus device dt-bindings: clock: ast2700: modify soc0/1 clock define clk: tegra: do not overallocate memory for bpmp clocks clk: ep93xx: Use int type to store negative error codes clk: nxp: Fix pll0 rate check condition in LPC18xx CGU driver clk: loongson2: Add clock definitions for Loongson-2K0300 SoC clk: loongson2: Avoid hardcoding firmware name of the reference clock clk: loongson2: Allow zero divisors for dividers clk: loongson2: Support scale clocks with an alternative mode clk: loongson2: Allow specifying clock flags for gate clock dt-bindings: clock: loongson2: Add Loongson-2K0300 compatible clk: clocking-wizard: Fix output clock register offset for Versal platforms clk: xilinx: Optimize divisor search in clk_wzrd_get_divisors_ver() clk: mmp: pxa1908: Instantiate power driver through auxiliary bus clk: s2mps11: add support for S2MPG10 PMIC clock dt-bindings: clock: samsung,s2mps11: add s2mpg10 dt-bindings: stm32: cosmetic fixes for STM32MP25 clock and reset bindings clk: stm32: introduce clocks for STM32MP21 platform dt-bindings: stm32: add STM32MP21 clocks and reset bindings ...
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| #
8397c58e
|
| 06-Oct-2025 |
Stephen Boyd <sboyd@kernel.org> |
Merge branches 'clk-marvell', 'clk-xilinx', 'clk-mediatek' and 'clk-loongson' into clk-next
- Add Mediatek MT8196 clk drivers
* clk-marvell: clk: mmp: pxa1908: Instantiate power driver through a
Merge branches 'clk-marvell', 'clk-xilinx', 'clk-mediatek' and 'clk-loongson' into clk-next
- Add Mediatek MT8196 clk drivers
* clk-marvell: clk: mmp: pxa1908: Instantiate power driver through auxiliary bus
* clk-xilinx: clk: clocking-wizard: Fix output clock register offset for Versal platforms clk: xilinx: Optimize divisor search in clk_wzrd_get_divisors_ver()
* clk-mediatek: (31 commits) clk: mediatek: Add MT8196 vencsys clock support clk: mediatek: Add MT8196 vdecsys clock support clk: mediatek: Add MT8196 ovl1 clock support clk: mediatek: Add MT8196 ovl0 clock support clk: mediatek: Add MT8196 disp-ao clock support clk: mediatek: Add MT8196 disp1 clock support clk: mediatek: Add MT8196 disp0 clock support clk: mediatek: Add MT8196 mfg clock support clk: mediatek: Add MT8196 mdpsys clock support clk: mediatek: Add MT8196 mcu clock support clk: mediatek: Add MT8196 I2C clock support clk: mediatek: Add MT8196 pextpsys clock support clk: mediatek: Add MT8196 ufssys clock support clk: mediatek: Add MT8196 peripheral clock support clk: mediatek: Add MT8196 vlpckgen clock support clk: mediatek: Add MT8196 topckgen2 clock support clk: mediatek: Add MT8196 topckgen clock support clk: mediatek: Add MT8196 apmixedsys clock support dt-bindings: clock: mediatek: Describe MT8196 clock controllers clk: mediatek: clk-mtk: Add MUX_DIV_GATE macro ...
* clk-loongson: clk: loongson2: Add clock definitions for Loongson-2K0300 SoC clk: loongson2: Avoid hardcoding firmware name of the reference clock clk: loongson2: Allow zero divisors for dividers clk: loongson2: Support scale clocks with an alternative mode clk: loongson2: Allow specifying clock flags for gate clock dt-bindings: clock: loongson2: Add Loongson-2K0300 compatible
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| #
ec733647
|
| 06-Oct-2025 |
Stephen Boyd <sboyd@kernel.org> |
Merge branches 'clk-bindings', 'clk-cleanup', 'clk-renesas', 'clk-thead' and 'clk-spacemit' into clk-next
* clk-bindings: dt-bindings: clock: mediatek: Add power-domains property dt-bindings: cl
Merge branches 'clk-bindings', 'clk-cleanup', 'clk-renesas', 'clk-thead' and 'clk-spacemit' into clk-next
* clk-bindings: dt-bindings: clock: mediatek: Add power-domains property dt-bindings: clock: silabs,si5341: Add missing properties dt-bindings: clock: adi,axi-clkgen: add clock-output-names property dt-bindings: clock: Remove unused fujitsu,mb86s70-crg11 binding dt-bindings: clock: Convert silabs,si570 to DT schema dt-bindings: clock: Convert silabs,si5341 to DT schema dt-bindings: clock: Convert silabs,si514/544 to DT schema
* clk-cleanup: clk: tegra: do not overallocate memory for bpmp clocks clk: ep93xx: Use int type to store negative error codes dt-bindings: clock: st: flexgen: remove deprecated compatibles clk: st: flexgen: remove unused compatible clk: clk-axi-clkgen: remove unneeded semicolon clk: tegra: Remove redundant semicolons clk: npcm: select CONFIG_AUXILIARY_BUS clk: remove unneeded 'fast_io' parameter in regmap_config
* clk-renesas: (27 commits) clk: renesas: r9a09g05[67]: Reduce differences clk: renesas: r9a09g047: Add USB3.0 clocks/resets clk: renesas: cpg-mssr: Fix memory leak in cpg_mssr_reserved_init() clk: renesas: r9a09g056: Add clock and reset entries for I3C clk: renesas: r9a09g057: Add clock and reset entries for I3C dt-bindings: clock: renesas,r9a09g047-cpg: Add USB3.0 core clocks clk: renesas: r9a09g077: Add Ethernet Subsystem core and module clocks clk: renesas: rzv2h: Simplify polling condition in __rzv2h_cpg_assert() clk: renesas: rzv2h: Re-assert reset on deassert timeout clk: renesas: rzg2l: Re-assert reset on deassert timeout clk: renesas: rzg2l: Simplify rzg2l_cpg_assert() and rzg2l_cpg_deassert() dt-bindings: clock: renesas,r9a09g077/87: Add Ethernet clock IDs clk: renesas: r9a09g047: Add GPT clocks and resets clk: renesas: r9a09g077: Add module clocks for SCI1-SCI5 clk: renesas: rzv2h: remove round_rate() in favor of determine_rate() clk: renesas: rzg2l: convert from round_rate() to determine_rate() clk: renesas: r9a07g04[34]: Use tabs instead of spaces clk: renesas: r9a07g043: Add MSTOP for RZ/G2UL clk: renesas: r9a07g044: Add MSTOP for RZ/G2L clk: renesas: r9a08g045: Add MSTOP for GPIO ...
* clk-thead: clk: thead: th1520-ap: set all AXI clocks to CLK_IS_CRITICAL clk: thead: support changing DPU pixel clock rate clk: thead: add support for enabling/disabling PLLs clk: thead: Correct parent for DPU pixel clocks clk: thead: th1520-ap: fix parent of padctrl0 clock clk: thead: th1520-ap: describe gate clocks with clk_gate
* clk-spacemit: clk: spacemit: fix i2s clock clk: spacemit: introduce pre-div for ddn clock dt-bindings: clock: spacemit: introduce i2s pre-clock to fix i2s clock clk: spacemit: ccu_pll: convert from round_rate() to determine_rate() clk: spacemit: ccu_mix: convert from round_rate() to determine_rate() clk: spacemit: ccu_ddn: convert from round_rate() to determine_rate() clk: spacemit: fix sspax_clk dt-bindings: clock: spacemit: CLK_SSPA_I2S_BCLK for SSPA
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| #
86bcf7be
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| 04-Oct-2025 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'riscv-for-linus-6.18-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull more RISC-V updates from Paul Walmsley:
- Support for the RISC-V-standardized RPMI interface.
Merge tag 'riscv-for-linus-6.18-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull more RISC-V updates from Paul Walmsley:
- Support for the RISC-V-standardized RPMI interface.
RPMI is a platform management communication mechanism between OSes running on application processors, and a remote platform management processor. Similar to ARM SCMI, TI SCI, etc. This includes irqchip, mailbox, and clk changes.
- Support for the RISC-V-standardized MPXY SBI extension.
MPXY is a RISC-V-specific standard implementing a shared memory mailbox between S-mode operating systems (e.g., Linux) and M-mode firmware (e.g., OpenSBI). It is part of this PR since one of its use cases is to enable M-mode firmware to act as a single RPMI client for all RPMI activity on a core (including S-mode RPMI activity). Includes a mailbox driver.
- Some ACPI-related updates to enable the use of RPMI and MPXY.
- The addition of Linux-wide memcpy_{from,to}_le32() static inline functions, for RPMI use.
- An ACPI Kconfig change to enable boot logos on any ACPI-using architecture (including RISC-V)
- A RISC-V defconfig change to add GPIO keyboard and event device support, for front panel shutdown or reboot buttons
* tag 'riscv-for-linus-6.18-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (26 commits) clk: COMMON_CLK_RPMI should depend on RISCV ACPI: support BGRT table on RISC-V MAINTAINERS: Add entry for RISC-V RPMI and MPXY drivers RISC-V: Enable GPIO keyboard and event device in RV64 defconfig irqchip/riscv-rpmi-sysmsi: Add ACPI support mailbox/riscv-sbi-mpxy: Add ACPI support irqchip/irq-riscv-imsic-early: Export imsic_acpi_get_fwnode() ACPI: RISC-V: Add RPMI System MSI to GSI mapping ACPI: RISC-V: Add support to update gsi range ACPI: RISC-V: Create interrupt controller list in sorted order ACPI: scan: Update honor list for RPMI System MSI ACPI: Add support for nargs_prop in acpi_fwnode_get_reference_args() ACPI: property: Refactor acpi_fwnode_get_reference_args() to support nargs_prop irqchip: Add driver for the RPMI system MSI service group dt-bindings: Add RPMI system MSI interrupt controller bindings dt-bindings: Add RPMI system MSI message proxy bindings clk: Add clock driver for the RISC-V RPMI clock service group dt-bindings: clock: Add RPMI clock service controller bindings dt-bindings: clock: Add RPMI clock service message proxy bindings mailbox: Add RISC-V SBI message proxy (MPXY) based mailbox driver ...
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