ARM: dts: Move .dts files to vendor sub-directories

The arm dts directory has grown to 1559 boards which makes it a bit
unwieldy to maintain and use. Past attempts stalled out due to plans to
move .

ARM: dts: Move .dts files to vendor sub-directories

The arm dts directory has grown to 1559 boards which makes it a bit
unwieldy to maintain and use. Past attempts stalled out due to plans to
move .dts files out of the kernel tree. Doing that is no longer planned
(any time soon at least), so let's go ahead and group .dts files by
vendors. This move aligns arm with arm64 .dts file structure.

There's no change to dtbs_install as the flat structure is maintained on
install.

The naming of vendor directories is roughly in this order of preference:
- Matching original and current SoC vendor prefix/name (e.g. ti, qcom)
- Current vendor prefix/name if still actively sold (SoCs which have
been aquired) (e.g. nxp/imx)
- Existing platform name for older platforms not sold/maintained by any
company (e.g. gemini, nspire)

The whole move was scripted with the exception of MAINTAINERS and a few
makefile fixups.

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Paul Barker <paul.barker@sancloud.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Nick Hawkins <nick.hawkins@hpe.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Peter Rosin <peda@axentia.se>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Patrice Chotard <patrice.chotard@foss.st.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>

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ARM: dts: dra7x-evm: switch to new cpsw switch drv

Switch all TI DRA7x boards to use new cpsw switch driver. Those boards
configured in dual_mac mode by default. Hence, dual_mac mode has been
preser

ARM: dts: dra7x-evm: switch to new cpsw switch drv

Switch all TI DRA7x boards to use new cpsw switch driver. Those boards
configured in dual_mac mode by default. Hence, dual_mac mode has been
preserved the same way between legacy and new driver it's safe to switch
drivers.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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Replace HTTP links with HTTPS ones: OMAP DEVICE TREE SUPPORT

Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Deterministic

Replace HTTP links with HTTPS ones: OMAP DEVICE TREE SUPPORT

Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.

Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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ARM: dts: dra72-evm: Add CMA pools and enable IPUs & DSP1 rprocs

The CMA reserved memory nodes have been added for both the IPUs and the
DSP1 remoteproc devices on DRA72 EVM board. These nodes are a

ARM: dts: dra72-evm: Add CMA pools and enable IPUs & DSP1 rprocs

The CMA reserved memory nodes have been added for both the IPUs and the
DSP1 remoteproc devices on DRA72 EVM board. These nodes are assigned to
the respective rproc device nodes, and both the IPUs and the DSP1 remote
processors are enabled for this board.

The current CMA pools and sizes are defined statically for each device.
The addresses chosen are the same as the respective processors on the
DRA7 EVM board to maintain firmware compatibility between the two boards.
The CMA pools and sizes are defined using 64-bit values to support LPAE.
The starting addresses are fixed to meet current dependencies on the
remote processor firmwares, and this will go away when the remote-side
code has been improved to gather this information runtime during its
initialization.

An associated pair of the rproc node and its CMA node can be disabled
later on if there is no use-case defined to use that remote processor.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

Based on 2 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms of th

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

Based on 2 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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ARM: dts: dra72-evm: get rid of phy_id property

The phy_id property is deprecated and phy-handle has to be used instead.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: T

ARM: dts: dra72-evm: get rid of phy_id property

The phy_id property is deprecated and phy-handle has to be used instead.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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ARM: dts: dra72-evm: Add pinmux configuration for MMC

Include dra72x-mmc-iodelay.dtsi which has pinmux and IODelay
configuration values for the various MMC modes for dra72 SoC
and use it in the pinc

ARM: dts: dra72-evm: Add pinmux configuration for MMC

Include dra72x-mmc-iodelay.dtsi which has pinmux and IODelay
configuration values for the various MMC modes for dra72 SoC
and use it in the pinctrl properties of MMC devicetree
nodes present in dra72-evm.dts.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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ARM: dts: dra72-evm: Add vqmmc supply to mmc1

Add vqmmc-supply property to mmc1 dt node and populate
it with ldo1_reg to reflect ldo1_out is connected to mmc1 IO lines.

Signed-off-by: Kishon Vijay

ARM: dts: dra72-evm: Add vqmmc supply to mmc1

Add vqmmc-supply property to mmc1 dt node and populate
it with ldo1_reg to reflect ldo1_out is connected to mmc1 IO lines.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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ARM: dts: dra72-evm-common: Correct vmmc-supply for mmc2

On dra72/dra71 evms, mmc2 vdd/ios are connected to a common 1.8V supply
not 3.3V. Also the regulator that supplies 1.8V is different on dra71

ARM: dts: dra72-evm-common: Correct vmmc-supply for mmc2

On dra72/dra71 evms, mmc2 vdd/ios are connected to a common 1.8V supply
not 3.3V. Also the regulator that supplies 1.8V is different on dra71-evm
so move the supply property from common dtsi to evm specific dts files.

Fixes: a4240d3af677 ("ARM: dts: Add support for dra72-evm rev C (SR2.0)")
Signed-off-by: Ravikumar Kattekola <rk@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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ARM: dts: dra72: Add separate dtsi for tps65917

dra72-evm-common.dtsi consolidates dra72-evm.dts and dra72-evm-revc.dts
which also include tps65917 pmic support as both the evms uses the same
pmic.

ARM: dts: dra72: Add separate dtsi for tps65917

dra72-evm-common.dtsi consolidates dra72-evm.dts and dra72-evm-revc.dts
which also include tps65917 pmic support as both the evms uses the same
pmic. But, dra71-evm has mostly similar features with a different pmic.
In order to exploit dra72-evm-common.dtsi, creating a separate dtsi
for tps65915 support and including it in respective board files.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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ARM: dts: dra7: Add missing unit name to memory nodes

This patch fixes the following DTC warnings:

"Node /memory has a reg or ranges property, but no unit name"

Signed-off-by: Javier Martinez Cani

ARM: dts: dra7: Add missing unit name to memory nodes

This patch fixes the following DTC warnings:

"Node /memory has a reg or ranges property, but no unit name"

Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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ARM: dts: Add support for dra72-evm rev C (SR2.0)

DRA72-EVM now has an upgrade to Rev C with SR2.0 silicon. As part of
this change, a few updates were factored in that were software
incompatible wit

ARM: dts: Add support for dra72-evm rev C (SR2.0)

DRA72-EVM now has an upgrade to Rev C with SR2.0 silicon. As part of
this change, a few updates were factored in that were software
incompatible with previous board in few areas:
- We now use DP83867 ethernet phy instead of older DP838865 which fails
in certain use cases.
- Two Ethernet ports now instead of the single one in rev B.
- polarities changed for certain pcf gpios
- Due to SoC phy current requirements, VDDA supplies are split between
ldo3 and ldo2 (ldo2 was previously unused). NOTE: DSS (VDDA_VIDEO) is
still supplied by ldo5, HDMI is now supplied by LDO2 instead of using
LDO3.

NOTE: It does not make much sense to spin off a new board compatible
flag since there is no real benefit for the same.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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ARM: dts: dra7x-evm: Provide NAND ready pin

On these boards NAND ready pin status is avilable over
GPMC_WAIT0 pin.

Read speed increases from 13768 KiB/ to 17246 KiB/s.
Write speed was unchanged at

ARM: dts: dra7x-evm: Provide NAND ready pin

On these boards NAND ready pin status is avilable over
GPMC_WAIT0 pin.

Read speed increases from 13768 KiB/ to 17246 KiB/s.
Write speed was unchanged at 7123 KiB/s.
Measured using mtd_speedtest.ko.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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ARM: dts: dra7xx: Fix compatible string for PCF8575 chip

The binding definition for the PCF857x GPIO expanders doesn't mention
a "ti,pcf8575" compatible string. This is apparently because TI is
onl

ARM: dts: dra7xx: Fix compatible string for PCF8575 chip

The binding definition for the PCF857x GPIO expanders doesn't mention
a "ti,pcf8575" compatible string. This is apparently because TI is
only a second source - there is no functional difference between
PCF8575 chips manufactured by TI and NXP, and the same board might be
populated with either depending on availability.

This is not a problem in practice because the I2C core uses
of_modalias_node() before matching drivers and this strips the
manufacturer name.

Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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ARM: dts: dra72-evm: Enable AFIFO use for McASP3

Since we switched to use eDMA we can now safely enable the FIFO in McASP.
This will reduce the chance of McASP level under/overflow.

Signed-off-by:

ARM: dts: dra72-evm: Enable AFIFO use for McASP3

Since we switched to use eDMA we can now safely enable the FIFO in McASP.
This will reduce the chance of McASP level under/overflow.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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ARM: dts: omap: remove unneeded unit name for sound nodes

This patch fixes the following DTC warning:

"sound@0 has a unit name, but no reg property"

Signed-off-by: Javier Martinez Canillas <javier

ARM: dts: omap: remove unneeded unit name for sound nodes

This patch fixes the following DTC warning:

"sound@0 has a unit name, but no reg property"

Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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ARM: dts: DRA7: change address-cells and size-cells

DRA7 SoC has the capability to support DDR memory upto 4GB. In order to
represent this in memory dt node, the address-cells and size cells
should

ARM: dts: DRA7: change address-cells and size-cells

DRA7 SoC has the capability to support DDR memory upto 4GB. In order to
represent this in memory dt node, the address-cells and size cells
should be 2. So, changing the address-cells and size-cells to 2 and
updating the memory nodes accordingly.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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ARM: dts: dra7: Remove redundant nand property

wait pin monitoring is not used for nand so it is pointless to
have the gpmc,wait-monitoring-ns property.

Signed-off-by: Roger Quadros <rogerq@ti.com>

ARM: dts: dra7: Remove redundant nand property

wait pin monitoring is not used for nand so it is pointless to
have the gpmc,wait-monitoring-ns property.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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ARM: dts: dra7: Fix NAND device nodes

Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.

The GPMC node will provide an interrupt controller for the
NAND IRQs

ARM: dts: dra7: Fix NAND device nodes

Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.

The GPMC node will provide an interrupt controller for the
NAND IRQs.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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ARM: dts: DRA72-EVM: Add regulator-allow-bypass property for ldo1 and ldo2

Add regulator-allow-bypass property for ldo1 and ldo2.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindg

ARM: dts: DRA72-EVM: Add regulator-allow-bypass property for ldo1 and ldo2

Add regulator-allow-bypass property for ldo1 and ldo2.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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ARM: dts: dra72-evm: Mark uart1 rxd as wakeup capable

Uart1 rxd is wakeup capable on DRA72 EVM. Hence, mark rxd line as
wakeup capable. This is similar to commit 66b0436977e2c ("ARM: dts:
dra7-evm:

ARM: dts: dra72-evm: Mark uart1 rxd as wakeup capable

Uart1 rxd is wakeup capable on DRA72 EVM. Hence, mark rxd line as
wakeup capable. This is similar to commit 66b0436977e2c ("ARM: dts:
dra7-evm: Mark uart1 rxd as wakeup capable") for DRA74 EVM.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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ARM: dts: dra72-evm: Use DRA7XX_CORE_IOPAD pinmux macro

Use the pinmux IOPAD macro to define the register absolute physical
address instead of the offset from the padconf base address. This
makes th

ARM: dts: dra72-evm: Use DRA7XX_CORE_IOPAD pinmux macro

Use the pinmux IOPAD macro to define the register absolute physical
address instead of the offset from the padconf base address. This
makes the DTS easier to read since matches the addresses listed in
the Technical Reference Manual.

Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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ARM: dts: dra72-evm: remove cpsw gpio hogging and add mode-gpios

With the current implementation of GPIO hogging and with
gpio-pcf857x is built as module, ethernet doesn't work on boot
and doesn't t

ARM: dts: dra72-evm: remove cpsw gpio hogging and add mode-gpios

With the current implementation of GPIO hogging and with
gpio-pcf857x is built as module, ethernet doesn't work on boot
and doesn't throw any error/warning to user. Ethernet becomes
operational when inserting gpio-pcf857x module, even this time
there is no error/warning logs to user that ethernet is
operational.

When using with NFS rootfs and gpio-pcf857x as module, board
doesn't boot as it doesn't get any ip address and doesn't throw
any error/warning. To over come this, now cpsw driver tries to
get mode-gpios. When gpio-pcf857x is built as module it will
throw error, so that user can decide either to built in
gpio-pcf857x to continue with nfs boot or choose alternate rootfs
filesystem like sd/ramdisk.

When using mmc/ramdisk as root fs, cpsw will probe defer and
re-probes again when gpio-pcf857x module is inserted and ethernet
becomes operational.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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ARM: dts: dra7xx: am57xx: fix cd-gpios definition as per hardware design and dt binding docs

As per mmc device tree binding documentation card detect gpio has
to be active low signal. When a hardwar

ARM: dts: dra7xx: am57xx: fix cd-gpios definition as per hardware design and dt binding docs

As per mmc device tree binding documentation card detect gpio has
to be active low signal. When a hardware is designed with active
high card detect, gpio polarity has to be changed with
cd-inverted dt property.

In DRA74x, DRA72x and AM57xx EVMs the card detect gpio is
designed as active low gpio. So correcting the dt card detect
gpio definition.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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ARM: dts: dra72-evm: Enable the system mailboxes 5 and 6

Enable the System Mailboxes 5 and 6 and the corresponding
child sub-mailbox (IPC 3.x) nodes for the DRA72 EVM board.
This is needed to enable

ARM: dts: dra72-evm: Enable the system mailboxes 5 and 6

Enable the System Mailboxes 5 and 6 and the corresponding
child sub-mailbox (IPC 3.x) nodes for the DRA72 EVM board.
This is needed to enable communication with the respective
remote processors IPU1, IPU2, and DSP1 from the MPU.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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