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c865f654 |
| 09-Jun-2021 |
Cornelia Huck <cohuck@redhat.com> |
x86: unify header guards
Standardize header guards to _ASMX86_HEADER_H_, _X86_HEADER_H_, and X86_HEADER_H.
Signed-off-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: David Hildenbrand <david@red
x86: unify header guards
Standardize header guards to _ASMX86_HEADER_H_, _X86_HEADER_H_, and X86_HEADER_H.
Signed-off-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20210609143712.60933-8-cohuck@redhat.com>
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9eef583d |
| 22-Apr-2021 |
Paolo Bonzini <pbonzini@redhat.com> |
x86/cstart: Don't use MSR_GS_BASE in 32-bit boot code
Add per-cpu selectors to the GDT, and set GS_BASE by loading a "real" segment. Using MSR_GS_BASE is wrong and broken, it's a 64-bit only MSR an
x86/cstart: Don't use MSR_GS_BASE in 32-bit boot code
Add per-cpu selectors to the GDT, and set GS_BASE by loading a "real" segment. Using MSR_GS_BASE is wrong and broken, it's a 64-bit only MSR and does not exist on 32-bit CPUs. The current code works only because 32-bit KVM VMX incorrectly disables interception of MSR_GS_BASE, and no one runs KVM on an actual 32-bit physical CPU, i.e. the MSR exists in hardware and so everything "works".
32-bit KVM SVM is not buggy and correctly injects #GP on the WRMSR, i.e. the tests have never worked on 32-bit SVM.
While at it, tweak the TSS setup to look like the percpu setup; both are setting up the address field of the descriptor.
Fixes: dfe6cb6 ("Add 32 bit smp initialization code") Reported-by: Sean Christopherson <seanjc@google.com> Message-Id: <20210422030504.3488253-2-seanjc@google.com> [Patch rewritten, keeping Sean's commit message. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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2b934609 |
| 04-Mar-2020 |
Xiaoyao Li <xiaoyao.li@intel.com> |
x86: Move definition of some exception vectors into processor.h
Both processor.h and desc.h hold some definitions of exception vector. put them together in processor.h
Signed-off-by: Xiaoyao Li <xi
x86: Move definition of some exception vectors into processor.h
Both processor.h and desc.h hold some definitions of exception vector. put them together in processor.h
Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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40f559bc |
| 28-Jun-2019 |
Krish Sadhukhan <krish.sadhukhan@oracle.com> |
x86: Remove duplicate definitions of write_cr4_checking() and put it in library
..so that it can be re-used.
Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com> Reviewed-by: Karl Heubaum <
x86: Remove duplicate definitions of write_cr4_checking() and put it in library
..so that it can be re-used.
Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com> Reviewed-by: Karl Heubaum <karl.heubaum@oracle.com> [Add 32-bit version of ASM_TRY. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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e8b0bc33 |
| 21-Nov-2018 |
Jim Mattson <jmattson@google.com> |
x86: nVMX: Basic test of NMI-window exiting
Test various NMI-window exiting scenarios. In the active activity state, test without any blocking, with blocking by MOV-SS, no blocking with event inject
x86: nVMX: Basic test of NMI-window exiting
Test various NMI-window exiting scenarios. In the active activity state, test without any blocking, with blocking by MOV-SS, no blocking with event injection, and with blocking by NMI. In the halted activity state, test without any blocking, with and without event injection.
Signed-off-by: Jim Mattson <jmattson@google.com> Reviewed-by: Peter Shier <pshier@google.com> Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
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728e71ee |
| 23-Mar-2018 |
Paolo Bonzini <pbonzini@redhat.com> |
x86: add UMIP test
The UMIP feature can be emulated by KVM, so it's useful to add a test that it works properly.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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9f025726 |
| 24-Dec-2017 |
Arbel Moshe <arbel.moshe@oracle.com> |
x86: Add definition for 64 bit Segment descriptor
Signed-off-by: Arbel Moshe <arbel.moshe@oracle.com> Reviewed-by: Liran Alon <liran.alon@oracle.com> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wil
x86: Add definition for 64 bit Segment descriptor
Signed-off-by: Arbel Moshe <arbel.moshe@oracle.com> Reviewed-by: Liran Alon <liran.alon@oracle.com> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Message-Id: <20171224100801.145806-5-arbel.moshe@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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06d1898a |
| 29-Jun-2017 |
Jim Mattson <jmattson@google.com> |
Save/restore handler in test_for_exception
The default handler for #DE, #UD, and #GP is check_exception_table. Test_for_exception should restore the original handler before returning, rather than bl
Save/restore handler in test_for_exception
The default handler for #DE, #UD, and #GP is check_exception_table. Test_for_exception should restore the original handler before returning, rather than blindly clobbering it with NULL.
Signed-off-by: Jim Mattson <jmattson@google.com> Message-Id: <20170629184647.76674-1-jmattson@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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10594e42 |
| 07-Jun-2017 |
Paolo Bonzini <pbonzini@redhat.com> |
x86: clean up GDTs
- Add a 16-bit code and data segment to cstart.S. - Move ring 3 segment descriptors at the end of the GDT, and lay them out as required by syscall/sysret in cstart64.S. - Only d
x86: clean up GDTs
- Add a 16-bit code and data segment to cstart.S. - Move ring 3 segment descriptors at the end of the GDT, and lay them out as required by syscall/sysret in cstart64.S. - Only define TSS_INTR for 32-bit, and place it where cstart64.S puts the 32-bit ring 0 segment. - Document that the same data segment can be used for 32 and 64-bit code. - Mark all descriptors as accessed.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
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03f37ef2 |
| 15-Dec-2015 |
Paolo Bonzini <pbonzini@redhat.com> |
x86: replace set_exception_return with longjmp-based implementation
set_exception_return forces exceptions handlers to return to a specific address instead of returning to the instruction address pu
x86: replace set_exception_return with longjmp-based implementation
set_exception_return forces exceptions handlers to return to a specific address instead of returning to the instruction address pushed by the CPU at the time of the exception. The unit tests apic.c and vmx.c use this functionality to recover from expected exceptions.
When using set_exception_return one would have to be careful not to modify the stack (such as by doing a function call) as triggering the exception will likely jump us past the instructions which undo the stack manipulation (such as a ret). This is unnecessarily brittle, and C already has a mechanism to do non-local returns---setjmp. Now that libcflat includes an implementation of setjmp, replace set_exception_return with a wrapper that takes care of restoring the processor flags as well.
Reported-by: David Matlack <dmatlack@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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7488d290 |
| 12-Nov-2015 |
Paolo Bonzini <pbonzini@redhat.com> |
KVM: x86: a few more x86-specific functions
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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73f9822e |
| 24-Jul-2014 |
Nadav Amit <namit@cs.technion.ac.il> |
x86: Test rflags.rf is set upon faults
This patch tests whether rflags.rf is set upon #UD and #GP faults as it should, according to Intel SDM 17.3.1.1. The patch saves rflags.rf in an unused bit of
x86: Test rflags.rf is set upon faults
This patch tests whether rflags.rf is set upon #UD and #GP faults as it should, according to Intel SDM 17.3.1.1. The patch saves rflags.rf in an unused bit of the value which is saved during exception handling to save rflags.rf.
Signed-off-by: Nadav Amit <namit@cs.technion.ac.il> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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b46094b4 |
| 08-Jul-2014 |
Paolo Bonzini <pbonzini@redhat.com> |
svm: fix mode switch testcase
This was broken because it needed the 32-bit and 16-bit selectors. Add them back to cstart64.S, and change svm.c to use symbolic names.
Signed-off-by: Paolo Bonzini <p
svm: fix mode switch testcase
This was broken because it needed the 32-bit and 16-bit selectors. Add them back to cstart64.S, and change svm.c to use symbolic names.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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309ca07b |
| 02-Apr-2014 |
Paolo Bonzini <pbonzini@redhat.com> |
x86: desc: support ISTs for alternate stacks in 64-bit mode
Introduce a new API that replaces setup_tss32 and set_intr_task_gate in tests that run in both modes. This will enable three more tests i
x86: desc: support ISTs for alternate stacks in 64-bit mode
Introduce a new API that replaces setup_tss32 and set_intr_task_gate in tests that run in both modes. This will enable three more tests in eventinj to run in 64-bit mode.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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69d8fe0e |
| 02-Apr-2014 |
Paolo Bonzini <pbonzini@redhat.com> |
x86: unify GDT format between 32-bit and 64-bit
Except the TSS, which is 16-bytes in 64-bit mode, we can use the same structure and share the constants. This will aid in porting tests to 64-bit.
M
x86: unify GDT format between 32-bit and 64-bit
Except the TSS, which is 16-bytes in 64-bit mode, we can use the same structure and share the constants. This will aid in porting tests to 64-bit.
Multiple bitwidth and ring 3 selectors aren't used yet. I couldn't make my mind on keeping vs. dropping them, in the end I kept the ring 3 selectors which have a chance of being used for SMAP or paging unit tests.
With this change, vmx.c can start using desc.h's constants and those in vm.h (why vm.h?) can be dropped.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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5b0bf08b |
| 02-Apr-2014 |
Paolo Bonzini <pbonzini@redhat.com> |
x86: taskswitch: use desc library
The APIs in desc.c make it much simpler to understand what the test is doing.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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8f4755fa |
| 02-Apr-2014 |
Paolo Bonzini <pbonzini@redhat.com> |
x86: desc: reuse cstart.S GDT and TSS
There is no particular reason to use a specific TSS in tests that use task-switching. In fact, in many cases the tests just want a separate interrupt stack and
x86: desc: reuse cstart.S GDT and TSS
There is no particular reason to use a specific TSS in tests that use task-switching. In fact, in many cases the tests just want a separate interrupt stack and could run on 64-bit just as well if the task-switching is abstracted.
As a first step, remove duplicate protected mode setup from desc.c's users. Just leave some spare selectors in cstart.S's GDT before the CPUs' main TSS. Then reuse CPU 0's TSS as TSS_MAIN.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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8e2a348d |
| 03-Apr-2014 |
Paolo Bonzini <pbonzini@redhat.com> |
x86: desc: move idt_entry_t and gdt_entry_t to header
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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67961d18 |
| 02-Apr-2014 |
Paolo Bonzini <pbonzini@redhat.com> |
x86: desc: change set_gdt_entry argument to selector
This interface, already used in taskswitch.c, is a bit easier to use.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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478027f5 |
| 04-Jan-2014 |
Jan Kiszka <jan.kiszka@siemens.com> |
x86: Add debug facility test case
This adds a basic test for INT3/#BP, hardware breakpoints, hardware watchpoints and single-stepping.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-
x86: Add debug facility test case
This adds a basic test for INT3/#BP, hardware breakpoints, hardware watchpoints and single-stepping.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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e3f363c4 |
| 04-Jan-2014 |
Jan Kiszka <jan.kiszka@siemens.com> |
lib/x86: Move exception test code into library
Will also be used by the APIC test. Moving exception_return assignment out of line, we can drop the explicit compiler barrier.
Signed-off-by: Jan Kisz
lib/x86: Move exception test code into library
Will also be used by the APIC test. Moving exception_return assignment out of line, we can drop the explicit compiler barrier.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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b01c8823 |
| 12-Apr-2013 |
Kevin Wolf <kwolf@redhat.com> |
x86/taskswitch2: Task switches into/out of VM86
This adds a test case that jumps into VM86 by iret-ing to a TSS and back to Protected Mode using a task gate in the IDT.
Signed-off-by: Kevin Wolf <k
x86/taskswitch2: Task switches into/out of VM86
This adds a test case that jumps into VM86 by iret-ing to a TSS and back to Protected Mode using a task gate in the IDT.
Signed-off-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Gleb Natapov <gleb@redhat.com>
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a4b87a16 |
| 22-Dec-2010 |
Gleb Natapov <gleb@redhat.com> |
Add event injection test
Add various event injection test. Those tests use testdev to unmap pages from shadow pages/ept tables which make it possible to test rare scenarios.
[avi: my compiler didn'
Add event injection test
Add various event injection test. Those tests use testdev to unmap pages from shadow pages/ept tables which make it possible to test rare scenarios.
[avi: my compiler didn't like "foo"R"bar", added spaces]
Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
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af11bd88 |
| 22-Dec-2010 |
Gleb Natapov <gleb@redhat.com> |
Add handle_exception() interface
Provide easy way for test to hook its own exception handler.
Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
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d21b4f12 |
| 22-Dec-2010 |
Gleb Natapov <gleb@redhat.com> |
Add another task switch test
It has more test cases then existing one. These test cases were written when I worked on fixing task switch emulation code. Most of them check for previously existing i
Add another task switch test
It has more test cases then existing one. These test cases were written when I worked on fixing task switch emulation code. Most of them check for previously existing issue.
Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
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