1 #ifndef __IDT_TEST__ 2 #define __IDT_TEST__ 3 4 void setup_idt(void); 5 #ifndef __x86_64__ 6 void setup_gdt(void); 7 void setup_tss32(void); 8 #else 9 static inline void setup_gdt(void){} 10 static inline void setup_tss32(void){} 11 #endif 12 13 struct ex_regs { 14 unsigned long rax, rcx, rdx, rbx; 15 unsigned long dummy, rbp, rsi, rdi; 16 #ifdef __x86_64__ 17 unsigned long r8, r9, r10, r11; 18 unsigned long r12, r13, r14, r15; 19 #endif 20 unsigned long vector; 21 unsigned long error_code; 22 unsigned long rip; 23 unsigned long cs; 24 unsigned long rflags; 25 }; 26 27 typedef struct { 28 u16 prev; 29 u16 res1; 30 u32 esp0; 31 u16 ss0; 32 u16 res2; 33 u32 esp1; 34 u16 ss1; 35 u16 res3; 36 u32 esp2; 37 u16 ss2; 38 u16 res4; 39 u32 cr3; 40 u32 eip; 41 u32 eflags; 42 u32 eax, ecx, edx, ebx, esp, ebp, esi, edi; 43 u16 es; 44 u16 res5; 45 u16 cs; 46 u16 res6; 47 u16 ss; 48 u16 res7; 49 u16 ds; 50 u16 res8; 51 u16 fs; 52 u16 res9; 53 u16 gs; 54 u16 res10; 55 u16 ldt; 56 u16 res11; 57 u16 t:1; 58 u16 res12:15; 59 u16 iomap_base; 60 } tss32_t; 61 62 #define ASM_TRY(catch) \ 63 "movl $0, %%gs:4 \n\t" \ 64 ".pushsection .data.ex \n\t" \ 65 ".quad 1111f, " catch "\n\t" \ 66 ".popsection \n\t" \ 67 "1111:" 68 69 #define UD_VECTOR 6 70 #define GP_VECTOR 13 71 72 #define TSS_MAIN 0x20 73 #define TSS_INTR 0x28 74 75 #define NP_SEL 0x18 76 77 unsigned exception_vector(void); 78 unsigned exception_error_code(void); 79 void set_idt_entry(int vec, void *addr, int dpl); 80 void set_idt_sel(int vec, u16 sel); 81 void set_gdt_entry(int num, u32 base, u32 limit, u8 access, u8 gran); 82 void set_idt_task_gate(int vec, u16 sel); 83 void set_intr_task_gate(int e, void *fn); 84 void print_current_tss_info(void); 85 void handle_exception(u8 v, void (*func)(struct ex_regs *regs)); 86 87 #endif 88