Merge branch 'riscv/sbi' into 'master'

riscv: SBI SSE tests and baremetal boot support

See merge request kvm-unit-tests/kvm-unit-tests!75

lib/riscv: Also provide sbiret impl functions

We almost always return sbiret from sbi wrapper functions so
do that for sbi_get_imp_version() and sbi_get_imp_id(), but
asserting no error and returnin

lib/riscv: Also provide sbiret impl functions

We almost always return sbiret from sbi wrapper functions so
do that for sbi_get_imp_version() and sbi_get_imp_id(), but
asserting no error and returning the value is also useful,
so continue to provide those functions too, just with a slightly
different name.

Reviewed-by: Clément Léger <cleger@rivosinc.com>
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

show more ...

lib: riscv: Add SBI SSE support

Add support for registering and handling SSE events. This will be used
for sbi tests as well as upcoming double trap tests.

Signed-off-by: Clément Léger <cleger@rivo

lib: riscv: Add SBI SSE support

Add support for registering and handling SSE events. This will be used
for sbi tests as well as upcoming double trap tests.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Andrew Jones <andrew.jones@linux.dev>
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

show more ...

lib: riscv: Add functions to get implementer ID and version

These functions will be used by SSE tests to check for a specific OpenSBI
version.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Sig

lib: riscv: Add functions to get implementer ID and version

These functions will be used by SSE tests to check for a specific OpenSBI
version.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

show more ...

lib: riscv: Add functions for version checking

Version checking was done using some custom hardcoded values, backport a
few SBI function and defines from Linux to do that cleanly.

Signed-off-by: Cl

lib: riscv: Add functions for version checking

Version checking was done using some custom hardcoded values, backport a
few SBI function and defines from Linux to do that cleanly.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

show more ...

Merge branch 'riscv/sbi' into 'master'

riscv: Added SBI tests for IPI, SUSP, and HSM

See merge request kvm-unit-tests/kvm-unit-tests!70

riscv: Add sbi_send_ipi_broadcast

Coming SBI IPI tests will use this, but as it could be useful for
other tests too, add it to the library.

Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

riscv: sbi: Improve spec version test

SBI spec version states that bit 31 must be zero and, when xlen
is greater than 32, that bit 32 and higher must be zero. Check
these bits are zero in the expect

riscv: sbi: Improve spec version test

SBI spec version states that bit 31 must be zero and, when xlen
is greater than 32, that bit 32 and higher must be zero. Check
these bits are zero in the expected value to ensure we test
appropriately.

Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

show more ...

Merge branch 'riscv/sbi' into 'master'

riscv: Collect some patches supporting SBI tests

See merge request kvm-unit-tests/kvm-unit-tests!68

riscv: sbi: Add HSM extension functions

Add helper functions to perform hart-related operations to prepare for
the HSM tests. Also add the HSM state IDs and default suspend type
constants.

Reviewed

riscv: sbi: Add HSM extension functions

Add helper functions to perform hart-related operations to prepare for
the HSM tests. Also add the HSM state IDs and default suspend type
constants.

Reviewed-by: Andrew Jones <andrew.jones@linux.dev>
Signed-off-by: James Raphael Tiovalen <jamestiotio@gmail.com>
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

show more ...

Merge branch 'riscv/sbi' into 'master'

riscv: Add support for SBI tests

See merge request kvm-unit-tests/kvm-unit-tests!67

riscv: Introduce SBI IPI convenience functions

The SBI IPI function interface is a bit painful to use since it
operates on hartids as opposed to cpuids and requires determining a
mask base and a mas

riscv: Introduce SBI IPI convenience functions

The SBI IPI function interface is a bit painful to use since it
operates on hartids as opposed to cpuids and requires determining a
mask base and a mask. Provide functions allowing IPIs to be sent to
single cpus and to all cpus set in a cpumask in order to simplify
things for unit tests.

Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

show more ...

riscv: Share sbi_time_ecall with framework

Setting timers is a useful thing to do for all types of tests. Not
every platform will have Sstc so make the SBI TIME extension
available as well.

Signed-

riscv: Share sbi_time_ecall with framework

Setting timers is a useful thing to do for all types of tests. Not
every platform will have Sstc so make the SBI TIME extension
available as well.

Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

show more ...

riscv: sbi: Add IPI extension support

Add IPI EID and FID constants and a helper function to perform the IPI
SBI ecall.

Signed-off-by: James Raphael Tiovalen <jamestiotio@gmail.com>
Signed-off-by:

riscv: sbi: Add IPI extension support

Add IPI EID and FID constants and a helper function to perform the IPI
SBI ecall.

Signed-off-by: James Raphael Tiovalen <jamestiotio@gmail.com>
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

show more ...

Merge branch 'riscv/sbi' into 'master'

riscv: Add TIME SBI extension tests

See merge request kvm-unit-tests/kvm-unit-tests!62

riscv: Add method to probe for SBI extensions

Add a `sbi_probe` helper method that can be used by SBI extension tests
to check if a given extension is available.

Suggested-by: Andrew Jones <andrew.

riscv: Add method to probe for SBI extensions

Add a `sbi_probe` helper method that can be used by SBI extension tests
to check if a given extension is available.

Suggested-by: Andrew Jones <andrew.jones@linux.dev>
Reviewed-by: Andrew Jones <andrew.jones@linux.dev>
Signed-off-by: James Raphael Tiovalen <jamestiotio@gmail.com>
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

show more ...

Merge branch 'riscv/initial-port-v3' into 'master'

riscv: Initial port

See merge request kvm-unit-tests/kvm-unit-tests!50

riscv: Add SMP support

Implement the same SMP API that Arm has but using an SBI HSM
call instead of PSCI. Unlike Arm, riscv needs to always set
cpu0_calls_idle, because the boot hart doesn't have to

riscv: Add SMP support

Implement the same SMP API that Arm has but using an SBI HSM
call instead of PSCI. Unlike Arm, riscv needs to always set
cpu0_calls_idle, because the boot hart doesn't have to be the
first hart described in the DT, which means cpu0 may well be
a secondary. As usual, add a couple tests to selftest.c to
make sure everything works.

(The secondary boot process is also improved over Arm's a bit
by keeping boot data percpu, dropping the need for a lock. We
could create percpu data for Arm too, but that's left as future
work.)

Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
Acked-by: Thomas Huth <thuth@redhat.com>

show more ...

riscv: Add initial SBI support

Add an SBI call function and immediately apply it to properly
exiting the test (instead of hanging) by invoking SBI shutdown
from exit(). Also seed an SBI test file wi

riscv: Add initial SBI support

Add an SBI call function and immediately apply it to properly
exiting the test (instead of hanging) by invoking SBI shutdown
from exit(). Also seed an SBI test file with a simple SBI test
that checks mvendorid is correctly extracted.

Run with e.g.
qemu-system-riscv64 -nographic -M virt \
-kernel riscv/sbi.flat \
-cpu rv64,mvendorid=45 \
-initrd sbi-env

and be happy that ctrl-a c q is no longer necessary to return to
the shell prompt. sbi-env has MVENDORID=45 in it.

Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
Acked-by: Thomas Huth <thuth@redhat.com>

show more ...