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71f7db53 |
| 11-Nov-2024 |
Andrew Jones <andrew.jones@linux.dev> |
Merge branch 'riscv/queue' into 'master'
lib/on-cpus and riscv smp improvements
See merge request kvm-unit-tests/kvm-unit-tests!69
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50fab1a5 |
| 23-Oct-2024 |
Andrew Jones <andrew.jones@linux.dev> |
riscv: Rework smp_boot_secondary
Use HSM status to determine when a secondary should be started. Also save the stack pointer so a secondary may be stopped and started again without leaking old stack
riscv: Rework smp_boot_secondary
Use HSM status to determine when a secondary should be started. Also save the stack pointer so a secondary may be stopped and started again without leaking old stacks.
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
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17f6f2fd |
| 03-Sep-2024 |
Andrew Jones <andrew.jones@linux.dev> |
Merge branch 'riscv/sbi' into 'master'
riscv: Add support for SBI tests
See merge request kvm-unit-tests/kvm-unit-tests!67
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70df1827 |
| 30-Aug-2024 |
Andrew Jones <andrew.jones@linux.dev> |
riscv: Provide helpers for IPIs
Provide a few functions to enable/disable/acknowledge IPIs.
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
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94ca1aaf |
| 28-Aug-2024 |
Andrew Jones <andrew.jones@linux.dev> |
riscv: Introduce local_hart_init
When Sstc is available make sure that even if we enable timer interrupts nothing will happen. This is necessary for cases where the unit tests actually intend to use
riscv: Introduce local_hart_init
When Sstc is available make sure that even if we enable timer interrupts nothing will happen. This is necessary for cases where the unit tests actually intend to use the SBI TIME extension and aren't thinking about Sstc at all, like the SBI TIME test in riscv/sbi where we can now remove the initialization.
We introduce local_hart_init() rather than something like local_timer_init() for this since other non-timer-related CSRs will also need to be set at init time in the future and we can just lump them all together.
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
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a1418d6d |
| 02-Aug-2024 |
Andrew Jones <andrew.jones@linux.dev> |
Merge branch 'riscv/sbi' into 'master'
riscv: Add TIME SBI extension tests
See merge request kvm-unit-tests/kvm-unit-tests!62
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c20c0aa7 |
| 30-Jul-2024 |
James Raphael Tiovalen <jamestiotio@gmail.com> |
riscv: Update exception cause list
Update the list of exception and interrupt causes to follow the latest RISC-V privileged ISA specification (version 20240411 section 18.6.1).
Reviewed-by: Andrew
riscv: Update exception cause list
Update the list of exception and interrupt causes to follow the latest RISC-V privileged ISA specification (version 20240411 section 18.6.1).
Reviewed-by: Andrew Jones <andrew.jones@linux.dev> Signed-off-by: James Raphael Tiovalen <jamestiotio@gmail.com> Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
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a3c0b550 |
| 30-Jul-2024 |
Andrew Jones <andrew.jones@linux.dev> |
riscv: Extend exception handling support for interrupts
Add install_irq_handler() to enable tests to install interrupt handlers. Also add local_irq_enable() and local_irq_disable() to respectively e
riscv: Extend exception handling support for interrupts
Add install_irq_handler() to enable tests to install interrupt handlers. Also add local_irq_enable() and local_irq_disable() to respectively enable and disable IRQs via the sstatus.SIE bit.
Signed-off-by: James Raphael Tiovalen <jamestiotio@gmail.com> Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
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48d59524 |
| 02-Feb-2024 |
Andrew Jones <andrew.jones@linux.dev> |
Merge branch 'riscv/initial-port-v3' into 'master'
riscv: Initial port
See merge request kvm-unit-tests/kvm-unit-tests!50
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db0ae91c |
| 03-Oct-2023 |
Andrew Jones <andrew.jones@linux.dev> |
riscv: Add isa string parsing
We can probably get away with just assuming several important and popular extensions (at least everything covered by G), but we'll also want to use some extensions whic
riscv: Add isa string parsing
We can probably get away with just assuming several important and popular extensions (at least everything covered by G), but we'll also want to use some extensions which we should ensure are present by parsing the isa string. Add a parser and already apply it to Sstc.
Signed-off-by: Andrew Jones <andrew.jones@linux.dev> Acked-by: Thomas Huth <thuth@redhat.com>
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386561f8 |
| 02-Oct-2023 |
Andrew Jones <andrew.jones@linux.dev> |
riscv: Add exception handling
Steal more code from Linux to implement exception handling, but with the same kvm-unit-tests API that Arm has. Also introduce struct thread_info like Arm has in order t
riscv: Add exception handling
Steal more code from Linux to implement exception handling, but with the same kvm-unit-tests API that Arm has. Also introduce struct thread_info like Arm has in order to hold the handler pointers. Finally, as usual, extend the selftest to make sure it all works.
Signed-off-by: Andrew Jones <andrew.jones@linux.dev> Acked-by: Thomas Huth <thuth@redhat.com>
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