f3f33861 | 08-Jul-2025 |
Paolo Bonzini <pbonzini@redhat.com> |
Merge tag 'kvm-x86-2025.06.26' of https://github.com/kvm-x86/kvm-unit-tests into HEAD
x86 fixes, cleanups, and new test coverage
- Ensure APIC is xAPIC mode for APIC MMIO tests.
- Expand the I/O
Merge tag 'kvm-x86-2025.06.26' of https://github.com/kvm-x86/kvm-unit-tests into HEAD
x86 fixes, cleanups, and new test coverage
- Ensure APIC is xAPIC mode for APIC MMIO tests.
- Expand the I/O APIC routing reconfiguration vs. EOI interception testcase to validate multiple in-flight interrupts.
- Fix a variety of minor PMU/PEBS bugs and warts.
- Fix the nSVM MSR interception test to actually detect failures, and expand its coverage to validate more scenarios.
- Add X86_PROPERTY_xxx macros (stolen from KVM selftests) and use them to clean up related code.
- Add testcases for MSR_SPEC_CTRL, and an msr64 config to validate negative testcases (i.e. when MSRs aren't supposed to exist).
- Disable PIT re-injection for all tests so that (x2)AVIC isn't inhibited due to enabling in-kernel PIT emulation.
- Play nice with QEMU builds that disable VNC support.
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f81e4fa4 | 01-Jul-2025 |
Jesse Taube <jesse@rivosinc.com> |
riscv: sbi: Add SBI Debug Triggers Extension tests
Add tests for the DBTR SBI extension.
Signed-off-by: Jesse Taube <jesse@rivosinc.com> Reviewed-by: Charlie Jenkins <charlie@rivosinc.com> Tested-b
riscv: sbi: Add SBI Debug Triggers Extension tests
Add tests for the DBTR SBI extension.
Signed-off-by: Jesse Taube <jesse@rivosinc.com> Reviewed-by: Charlie Jenkins <charlie@rivosinc.com> Tested-by: Charlie Jenkins <charlie@rivosinc.com> Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
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3494b839 | 24-Jun-2025 |
Jesse Taube <jesse@rivosinc.com> |
riscv: lib: Pass test status on sbi shutdown
The SBI SRST system reset function used to exit the test takes two parameters. The first is used to request a shutdown and the second describes the reaso
riscv: lib: Pass test status on sbi shutdown
The SBI SRST system reset function used to exit the test takes two parameters. The first is used to request a shutdown and the second describes the reason. A value of zero means "no reason" and a value of one means "system failure". Other values are currently reserved. Use the value of zero to indicate that the tests completed and all passed and of one otherwise.
It may be possible for the SBI implemention to use this information to alert testers of failing or aborting tests.
Signed-off-by: Jesse Taube <jesse@rivosinc.com> [Enhanced commit message and changed sbi_shutdown param to a bool.] Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
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e844ca0c | 16-Jun-2025 |
Clément Léger <cleger@rivosinc.com> |
riscv: Add ISA double trap extension testing
This test allows to test the double trap implementation of hardware as well as the SBI FWFT and SSE support for double trap. The tests will try to trigge
riscv: Add ISA double trap extension testing
This test allows to test the double trap implementation of hardware as well as the SBI FWFT and SSE support for double trap. The tests will try to trigger double trap using various sequences and will test to receive the SSE double trap event if supported.
It is provided as a separate test from the SBI one for two reasons: - It isn't specifically testing SBI "per se". - It ends up by trying to crash into in M-mode.
Currently, the test uses a page fault to raise a trap programatically. Some concern was raised by a github user on the original branch [1] saying that the spec doesn't mandate any trap to be delegatable and that we would need a way to detect which ones are delegatable. I think we can safely assume that PAGE FAULT is delegatable and if a hardware that does not have support comes up then it will probably be the vendor responsibility to provide a way to do so.
Link: https://github.com/clementleger/kvm-unit-tests/issues/1 [1] Signed-off-by: Clément Léger <cleger@rivosinc.com> Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
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3b60ab92 | 16-Jun-2025 |
Clément Léger <cleger@rivosinc.com> |
lib/riscv: export FWFT functions
These functions will be needed by other tests as well, expose them.
Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Andrew Jones <andrew.jones@linux
lib/riscv: export FWFT functions
These functions will be needed by other tests as well, expose them.
Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Andrew Jones <andrew.jones@linux.dev> Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
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863e0b90 | 29-May-2025 |
Sean Christopherson <seanjc@google.com> |
lib: Add and use static_assert() convenience wrappers
Add static_assert() to wrap _Static_assert() with stringification of the tested expression as the assert message. In most cases, the failed exp
lib: Add and use static_assert() convenience wrappers
Add static_assert() to wrap _Static_assert() with stringification of the tested expression as the assert message. In most cases, the failed expression is far more helpful than a human-generated message (usually because the developer is forced to add _something_ for the message).
For API consistency, provide a double-underscore variant for specifying a custom message.
Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: Andrew Jones <andrew.jones@linux.dev> Link: https://lore.kernel.org/r/20250529221929.3807680-2-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
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e726be6e | 05-Jun-2025 |
Jesse Taube <jesse@rivosinc.com> |
riscv: Add RV_INSN_LEN to processor.h
When handling traps and faults it is often necessary to know the size of the instruction at epc. Add RV_INSN_LEN to calculate the instruction size.
Signed-off-
riscv: Add RV_INSN_LEN to processor.h
When handling traps and faults it is often necessary to know the size of the instruction at epc. Add RV_INSN_LEN to calculate the instruction size.
Signed-off-by: Jesse Taube <jesse@rivosinc.com> Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
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a3fc8778 | 21-Mar-2025 |
Andrew Jones <andrew.jones@linux.dev> |
lib/riscv: Also provide sbiret impl functions
We almost always return sbiret from sbi wrapper functions so do that for sbi_get_imp_version() and sbi_get_imp_id(), but asserting no error and returnin
lib/riscv: Also provide sbiret impl functions
We almost always return sbiret from sbi wrapper functions so do that for sbi_get_imp_version() and sbi_get_imp_id(), but asserting no error and returning the value is also useful, so continue to provide those functions too, just with a slightly different name.
Reviewed-by: Clément Léger <cleger@rivosinc.com> Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
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98ea1f96 | 17-Mar-2025 |
Clément Léger <cleger@rivosinc.com> |
lib: riscv: Add SBI SSE support
Add support for registering and handling SSE events. This will be used for sbi tests as well as upcoming double trap tests.
Signed-off-by: Clément Léger <cleger@rivo
lib: riscv: Add SBI SSE support
Add support for registering and handling SSE events. This will be used for sbi tests as well as upcoming double trap tests.
Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Andrew Jones <andrew.jones@linux.dev> Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
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f16317a7 | 17-Mar-2025 |
Clément Léger <cleger@rivosinc.com> |
riscv: lib: Add SBI SSE extension definitions
Add SBI SSE extension definitions in sbi.h
Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Andrew Jones <andrew.jones@linux.dev> Signed
riscv: lib: Add SBI SSE extension definitions
Add SBI SSE extension definitions in sbi.h
Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Andrew Jones <andrew.jones@linux.dev> Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
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240729ee | 17-Mar-2025 |
Clément Léger <cleger@rivosinc.com> |
lib: riscv: Add functions to get implementer ID and version
These functions will be used by SSE tests to check for a specific OpenSBI version.
Signed-off-by: Clément Léger <cleger@rivosinc.com> Sig
lib: riscv: Add functions to get implementer ID and version
These functions will be used by SSE tests to check for a specific OpenSBI version.
Signed-off-by: Clément Léger <cleger@rivosinc.com> Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
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b9d58c27 | 17-Mar-2025 |
Clément Léger <cleger@rivosinc.com> |
lib: riscv: Add functions for version checking
Version checking was done using some custom hardcoded values, backport a few SBI function and defines from Linux to do that cleanly.
Signed-off-by: Cl
lib: riscv: Add functions for version checking
Version checking was done using some custom hardcoded values, backport a few SBI function and defines from Linux to do that cleanly.
Signed-off-by: Clément Léger <cleger@rivosinc.com> Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
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0cc3a351 | 22-Feb-2025 |
Sean Christopherson <seanjc@google.com> |
lib: Use __ASSEMBLER__ instead of __ASSEMBLY__
Convert all non-x86 #ifdefs from __ASSEMBLY__ to __ASSEMBLER__, and remove all manual __ASSEMBLY__ #defines. __ASSEMBLY_ was inherited blindly from th
lib: Use __ASSEMBLER__ instead of __ASSEMBLY__
Convert all non-x86 #ifdefs from __ASSEMBLY__ to __ASSEMBLER__, and remove all manual __ASSEMBLY__ #defines. __ASSEMBLY_ was inherited blindly from the Linux kernel, and must be manually defined, e.g. through build rules or with the aforementioned explicit #defines in assembly code.
__ASSEMBLER__ on the other hand is automatically defined by the compiler when preprocessing assembly, i.e. doesn't require manually #defines for the code to function correctly.
Ignore x86, as x86 doesn't actually rely on __ASSEMBLY__ at the moment, and is undergoing a parallel cleanup.
Signed-off-by: Sean Christopherson <seanjc@google.com> Reviewed-by: Andrew Jones <andrew.jones@linux.dev> Message-ID: <20250222014526.2302653-1-seanjc@google.com> [thuth: Fix three more occurances in libfdt.h and sbi-tests.h] Signed-off-by: Thomas Huth <thuth@redhat.com>
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f1302432 | 28-Jan-2025 |
Clément Léger <cleger@rivosinc.com> |
riscv: Add tests for SBI FWFT extension
Add tests for the FWFT SBI extension. Currently, only the reserved range as well as the misaligned exception delegation are used.
Signed-off-by: Clément Lége
riscv: Add tests for SBI FWFT extension
Add tests for the FWFT SBI extension. Currently, only the reserved range as well as the misaligned exception delegation are used.
Signed-off-by: Clément Léger <cleger@rivosinc.com> Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
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2ffe016f | 18-Oct-2024 |
Andrew Jones <andrew.jones@linux.dev> |
riscv: sbi: Add SUSP tests
Introduce tests for SBI system suspend. The basic test makes sure it works and other tests make sure it fails as expected with invalid entry criteria.
To test on QEMU or
riscv: sbi: Add SUSP tests
Introduce tests for SBI system suspend. The basic test makes sure it works and other tests make sure it fails as expected with invalid entry criteria.
To test on QEMU or hardware the firmware needs to support system suspend. For QEMU, OpenSBI can be told to enable its system suspend test mode by creating a new DTB which has
opensbi-config { compatible = "opensbi,config"; system-suspend-test; };
added to the 'chosen' node. Then, run with '-dtb susp.dtb'.
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
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56ca8093 | 23-Oct-2024 |
Andrew Jones <andrew.jones@linux.dev> |
riscv: Add sbi_send_ipi_broadcast
Coming SBI IPI tests will use this, but as it could be useful for other tests too, add it to the library.
Signed-off-by: Andrew Jones <andrew.jones@linux.dev> |
50fab1a5 | 23-Oct-2024 |
Andrew Jones <andrew.jones@linux.dev> |
riscv: Rework smp_boot_secondary
Use HSM status to determine when a secondary should be started. Also save the stack pointer so a secondary may be stopped and started again without leaking old stack
riscv: Rework smp_boot_secondary
Use HSM status to determine when a secondary should be started. Also save the stack pointer so a secondary may be stopped and started again without leaking old stacks.
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
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27e44c5d | 23-Oct-2024 |
Andrew Jones <andrew.jones@linux.dev> |
riscv: Bump NR_CPUS to 256
Besides a bit more memory used for the .bss section, where there are NR_CPUS sized arrays, and a tiny bit more stack used by functions with cpumasks on their stacks, then
riscv: Bump NR_CPUS to 256
Besides a bit more memory used for the .bss section, where there are NR_CPUS sized arrays, and a tiny bit more stack used by functions with cpumasks on their stacks, then there's no harm in bumping NR_CPUS. Bump it to 256, which should cover us for quite a while.
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
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30f161db | 22-Oct-2024 |
Andrew Jones <andrew.jones@linux.dev> |
Merge branch 'riscv/sbi' into 'master'
riscv: Collect some patches supporting SBI tests
See merge request kvm-unit-tests/kvm-unit-tests!68 |
ab0bbb9f | 11-Sep-2024 |
Andrew Jones <andrew.jones@linux.dev> |
lib/stack: Restrengthen base_address
commit a1f2b0e1efd5 ("treewide: lib/stack: Make base_address arch specific") made base_address() a weak function in order to allow architectures to override it.
lib/stack: Restrengthen base_address
commit a1f2b0e1efd5 ("treewide: lib/stack: Make base_address arch specific") made base_address() a weak function in order to allow architectures to override it. Linking for EFI doesn't seem to figure out the right one to use though [anymore?]. It must have worked at one point because the commit calls outs EFI as the motivation. Anyway, just drop the weakness in favor of another HAVE_ define.
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
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67b8f462 | 10-Sep-2024 |
James Raphael Tiovalen <jamestiotio@gmail.com> |
riscv: sbi: Add HSM extension functions
Add helper functions to perform hart-related operations to prepare for the HSM tests. Also add the HSM state IDs and default suspend type constants.
Reviewed
riscv: sbi: Add HSM extension functions
Add helper functions to perform hart-related operations to prepare for the HSM tests. Also add the HSM state IDs and default suspend type constants.
Reviewed-by: Andrew Jones <andrew.jones@linux.dev> Signed-off-by: James Raphael Tiovalen <jamestiotio@gmail.com> Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
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70df1827 | 30-Aug-2024 |
Andrew Jones <andrew.jones@linux.dev> |
riscv: Provide helpers for IPIs
Provide a few functions to enable/disable/acknowledge IPIs.
Signed-off-by: Andrew Jones <andrew.jones@linux.dev> |
25475fa5 | 30-Aug-2024 |
Andrew Jones <andrew.jones@linux.dev> |
riscv: Introduce SBI IPI convenience functions
The SBI IPI function interface is a bit painful to use since it operates on hartids as opposed to cpuids and requires determining a mask base and a mas
riscv: Introduce SBI IPI convenience functions
The SBI IPI function interface is a bit painful to use since it operates on hartids as opposed to cpuids and requires determining a mask base and a mask. Provide functions allowing IPIs to be sent to single cpus and to all cpus set in a cpumask in order to simplify things for unit tests.
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
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ff2fceb1 | 28-Aug-2024 |
Andrew Jones <andrew.jones@linux.dev> |
riscv: Provide timer_start and timer_stop
For unit tests that need a timer but don't care if they use Sstc or SBI TIME, provide timer_start and timer_stop which will try Sstc first and fallback to S
riscv: Provide timer_start and timer_stop
For unit tests that need a timer but don't care if they use Sstc or SBI TIME, provide timer_start and timer_stop which will try Sstc first and fallback to SBI TIME.
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
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9340e4b7 | 28-Aug-2024 |
Andrew Jones <andrew.jones@linux.dev> |
riscv: Share sbi_time_ecall with framework
Setting timers is a useful thing to do for all types of tests. Not every platform will have Sstc so make the SBI TIME extension available as well.
Signed-
riscv: Share sbi_time_ecall with framework
Setting timers is a useful thing to do for all types of tests. Not every platform will have Sstc so make the SBI TIME extension available as well.
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
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