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7e973773 |
| 14-Feb-2023 |
Andrew Jones <andrew.jones@linux.dev> |
Merge branch 'arm/queue' into 'master'
arm/arm64: PMU and PSCI tests
See merge request kvm-unit-tests/kvm-unit-tests!39
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25ea27e9 |
| 24-Nov-2022 |
Alexandru Elisei <alexandru.elisei@arm.com> |
arm/arm64: mmu: Rename mmu_get_pte() -> follow_pte()
The function get_pte() from mmu.c returns a pointer to the PTE associated with the requested virtual address, mapping the virtual address in the
arm/arm64: mmu: Rename mmu_get_pte() -> follow_pte()
The function get_pte() from mmu.c returns a pointer to the PTE associated with the requested virtual address, mapping the virtual address in the process if it's not already mapped.
mmu_get_pte() returns a pointer to the PTE if and only if the virtual is mapped in pgtable, otherwise returns NULL. Rename it to follow_pte() to avoid any confusion with get_pte(). follow_pte() also matches the name of Linux kernel function with a similar purpose.
Also remove the mmu_enabled() check from the function, as the purpose of the function is to get the mapping for the virtual address in the pgtable supplied as the argument, not to translate the virtual address to a physical address using the current translation; that's what virt_to_phys() does.
Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
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80e8b3d8 |
| 10-Jun-2021 |
Cornelia Huck <cohuck@redhat.com> |
header guards: clean up some stragglers
Some headers had been missed during the initial header guard standardization.
Signed-off-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Laurent Vivier <l
header guards: clean up some stragglers
Some headers had been missed during the initial header guard standardization.
Signed-off-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210610135937.94375-2-cohuck@redhat.com>
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f583d924 |
| 30-Mar-2021 |
Paolo Bonzini <bonzini@gnu.org> |
Merge branch 'arm/queue' into 'master'
arm/arm64: Fixes, improvements, and prep for target-efi
See merge request kvm-unit-tests/kvm-unit-tests!6
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0917dc65 |
| 19-Mar-2021 |
Nikos Nikoleris <nikos.nikoleris@arm.com> |
arm/arm64: Read system registers to get the state of the MMU
When we are in EL1 we can directly tell if the local cpu's MMU is on by reading a system register (SCTRL/SCTRL_EL1). In EL0, we use the r
arm/arm64: Read system registers to get the state of the MMU
When we are in EL1 we can directly tell if the local cpu's MMU is on by reading a system register (SCTRL/SCTRL_EL1). In EL0, we use the relevant cpumask. This way we don't have to rely on the cpu id in thread_info when we are in setup executing in EL1.
In addition, this change: * Removes mmu_disabled_cpu_count as it is no longer necessary and assumed that calls to mmu_mark_enabled()/mmu_mark_disabled() were serialized. This is currently true but a future change could easily break that assumption. * Changes mmu_disabled_mask to mmu_enabled_mask and inverts the logic to track in a more intuitive way that all CPUs start with the MMU OFF and at some point, we turn them ON.
Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com> Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com> [ Applied some code cleanups suggested by Alexandru Elisei ] Signed-off-by: Andrew Jones <drjones@redhat.com>
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1a00120a |
| 11-Nov-2020 |
Andrew Jones <drjones@redhat.com> |
Merge branch 'arm-pull-11-11-2020' into 'master'
Arm pull 11.11.2020
See merge request kvm-unit-tests/kvm-unit-tests!2
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2e2b82a0 |
| 10-Nov-2020 |
Luc Maranget <Luc.Maranget@inria.fr> |
arm: Add mmu_get_pte() to the MMU API
Add the mmu_get_pte() function that allows a test to get a pointer to the PTE for a valid virtual address. Return NULL if the MMU is off.
Signed-off-by: Nikos
arm: Add mmu_get_pte() to the MMU API
Add the mmu_get_pte() function that allows a test to get a pointer to the PTE for a valid virtual address. Return NULL if the MMU is off.
Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Signed-off-by: Luc Maranget <Luc.Maranget@inria.fr> Co-Developed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com> Signed-off-by: Andrew Jones <drjones@redhat.com>
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3c13c642 |
| 08-Jan-2020 |
Paolo Bonzini <pbonzini@redhat.com> |
Merge branch 'arm/queue' of https://github.com/rhdrjones/kvm-unit-tests into HEAD
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02f1cdc8 |
| 31-Dec-2019 |
Alexandru Elisei <alexandru.elisei@arm.com> |
lib: arm/arm64: Teach mmu_clear_user about block mappings
kvm-unit-tests uses block mappings, so let's expand the mmu_clear_user function to handle those as well.
Now that the function knows about
lib: arm/arm64: Teach mmu_clear_user about block mappings
kvm-unit-tests uses block mappings, so let's expand the mmu_clear_user function to handle those as well.
Now that the function knows about block mappings, we cannot simply assume that if an address isn't mapped we can map it as a regular page. Change the semantics of the function to fail quite loudly if the address isn't mapped, and shift the burden on the caller to map the address as a page or block mapping before calling mmu_clear_user.
Also make mmu_clear_user more flexible by adding a pgtable parameter, instead of assuming that the change always applies to the current translation tables.
Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> Signed-off-by: Andrew Jones <drjones@redhat.com>
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3ff42bdd |
| 03-Oct-2019 |
Alexandru Elisei <alexandru.elisei@arm.com> |
lib: arm/arm64: Add function to clear the PTE_USER bit
The PTE_USER bit (AP[1]) in a page entry means that lower privilege levels (EL0, on arm64, or PL0, on arm) can read and write from that memory
lib: arm/arm64: Add function to clear the PTE_USER bit
The PTE_USER bit (AP[1]) in a page entry means that lower privilege levels (EL0, on arm64, or PL0, on arm) can read and write from that memory location [1][2]. On arm64, it also implies PXN (Privileged execute-never) when is set [3]. Add a function to clear the bit which we can use when we want to execute code from that page or the prevent access from lower exception levels.
Make it available to arm too, in case someone needs it at some point.
[1] ARM DDI 0406C.d, Table B3-6 [2] ARM DDI 0487E.a, table D5-28 [3] ARM DDI 0487E.a, table D5-33
Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> Signed-off-by: Andrew Jones <drjones@redhat.com>
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031755db |
| 23-Oct-2017 |
Paolo Bonzini <pbonzini@redhat.com> |
arm: enable vmalloc
Unlike x86, ARM always enables virtual memory so it always switches early from phys_alloc to vmalloc. The changes mostly involve using alloc_page directly whenever physical addr
arm: enable vmalloc
Unlike x86, ARM always enables virtual memory so it always switches early from phys_alloc to vmalloc. The changes mostly involve using alloc_page directly whenever physical addresses are needed, and of course implementing the architecture-dependent callbacks that vmalloc needs.
The 32-bit root page table doesn't need a full page, but it is simpler to just allocate one. With split files for 32-bit and 64-bit, we could just place mmu_idmap in .bss.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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f0671a7b |
| 24-Oct-2017 |
Paolo Bonzini <pbonzini@redhat.com> |
arm: use better-matching types for virtual and physical addresses
Make virtual addresses use uintptr_t and physical addresses use phys_addr_t.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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c2a95639 |
| 23-Oct-2017 |
Paolo Bonzini <pbonzini@redhat.com> |
arm: make pgtable.h private to mmu.c
The pgd/pmd/pud definitions are not needed outside the architecture- dependent MMU functions. In fact, it probably would be simpler to have completely different
arm: make pgtable.h private to mmu.c
The pgd/pmd/pud definitions are not needed outside the architecture- dependent MMU functions. In fact, it probably would be simpler to have completely different files for 32-bit and 64-bit ARM. However, as a first and possibly less controversial step, hide them inside that file.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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1742c67a |
| 29-Jul-2015 |
Andrew Jones <drjones@redhat.com> |
arm/arm64: fix mmu_enabled
We recently modified how mmu_enabled works in order to speed spinlocks up (see c33efcf3 and b141dbac). Unfortunately c33efcf3 was a bit hasty in removing mmu_set_enabled.
arm/arm64: fix mmu_enabled
We recently modified how mmu_enabled works in order to speed spinlocks up (see c33efcf3 and b141dbac). Unfortunately c33efcf3 was a bit hasty in removing mmu_set_enabled. I had forgotten one of the reasons I introduced it was because secondaries don't go through mmu_enable(), they go straight to asm_mmu_enable from secondary_entry. This patch brings it back, albeit renamed to mmu_mark_enabled to match mmu_mark_disabled.
The patch also moves mmu_mark_disabled from psci code to smp code, as psci code shouldn't need to care about mmu stuff, and because we now have a nice balance in the smp code - we mark the mmu disabled for the secondary before we kick it, and then mark it enabled on the init.
Finally, a bit unrelated, I've added a lengthy comment to __mmu_enabled in order to warn about what can't be called from there. We need to be cautious there because mmu_enabled() gets scattered around easily, being in basic functions, and thus there's risk of recursion.
Signed-off-by: Andrew Jones <drjones@redhat.com> Reported-by: Levente Kurusa <lkurusa@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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b141dbac |
| 25-Jun-2015 |
Andrew Jones <drjones@redhat.com> |
arm/arm64: speed up spinlocks and atomic ops
spinlock torture tests made it clear that checking mmu_enabled() every time we call spin_lock is a bad idea. As most tests will want the MMU enabled the
arm/arm64: speed up spinlocks and atomic ops
spinlock torture tests made it clear that checking mmu_enabled() every time we call spin_lock is a bad idea. As most tests will want the MMU enabled the entire time, then we can inline a light weight "nobody disabled the mmu" check, and bail out early.
Adding a light weight inlined check vs. a compile-time flag suggested by Paolo.
Signed-off-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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c33efcf3 |
| 25-Jun-2015 |
Andrew Jones <drjones@redhat.com> |
arm/arm64: drop mmu_set_enabled
The mmu is enabled automatically for all cpus, they must disable it themselves if they don't want it on. Switch from managing a cpumask of enabled cpus to one of disa
arm/arm64: drop mmu_set_enabled
The mmu is enabled automatically for all cpus, they must disable it themselves if they don't want it on. Switch from managing a cpumask of enabled cpus to one of disabled cpus. This allows us to remove the mmu_set_enabled call from secondary_cinit, and the function all together.
Signed-off-by: Andrew Jones <drjones@redhat.com> [Place CPUs in MMU disabled state at startup. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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e27b176b |
| 25-Jun-2015 |
Andrew Jones <drjones@redhat.com> |
arm/arm64: Introduce mmu_disable
Allow unit test cpus to disable the MMU. Why not? We want the test framework to be as flexible as possible. Callers will have to deal with the cache coherency fallou
arm/arm64: Introduce mmu_disable
Allow unit test cpus to disable the MMU. Why not? We want the test framework to be as flexible as possible. Callers will have to deal with the cache coherency fallout... Cache flush support is still forthcoming to the framework though.
Signed-off-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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eb225344 |
| 01-Feb-2015 |
Andrew Jones <drjones@redhat.com> |
arm/arm64: make mmu_on per cpu
We introduced a variable called mmu_on to the mmu implementation because unit tests may want to run with the mmu off, yet still call into common code that could lead t
arm/arm64: make mmu_on per cpu
We introduced a variable called mmu_on to the mmu implementation because unit tests may want to run with the mmu off, yet still call into common code that could lead to {Load,Store}-Exclusive instructions - which is illegal. So, the mmu_on variable was added and made query-able (through mmu_enabled()) in order to guard those paths. But, mmu_on is really a per cpu concept, so for smp we need to change it. As it's just a bool, we can easily make it per cpu by changing it into a cpumask. We rename it more appropriately too.
Signed-off-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
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2f3028cd |
| 10-Dec-2014 |
Andrew Jones <drjones@redhat.com> |
arm: prepare mmu code for arm64
* don't assume 1G PGDIR_SIZE or L1_CACHE_BYTES pgd alignment * use page level descriptors for non-I/O memory * apply new pgd/pud/pmd/pte methods * split mmu.h to shar
arm: prepare mmu code for arm64
* don't assume 1G PGDIR_SIZE or L1_CACHE_BYTES pgd alignment * use page level descriptors for non-I/O memory * apply new pgd/pud/pmd/pte methods * split mmu.h to share function declarations * use more generic flag names in mmu.c
Signed-off-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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