a335cbb8 | 19-May-2021 |
Rob Bradford <robert.bradford@intel.com> |
hypervisor: Unconditional build Hypervisor::create_vm_with_type()
Mark it as unreachable for now in the default implementation as this is currently only used on tdx code path which is KVM only.
Si
hypervisor: Unconditional build Hypervisor::create_vm_with_type()
Mark it as unreachable for now in the default implementation as this is currently only used on tdx code path which is KVM only.
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
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0cf9218d | 19-May-2021 |
Rob Bradford <robert.bradford@intel.com> |
hypervisor, vmm: Add default Hypervisor::check_required_extensions()
This allows the removal of KVM specific compile time checks on this function.
Signed-off-by: Rob Bradford <robert.bradford@intel
hypervisor, vmm: Add default Hypervisor::check_required_extensions()
This allows the removal of KVM specific compile time checks on this function.
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
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24396257 | 19-May-2021 |
Rob Bradford <robert.bradford@intel.com> |
hypervisor: Cleanup unused Hypervisor trait members
Signed-off-by: Rob Bradford <robert.bradford@intel.com> |
496ceed1 | 11-May-2021 |
Rob Bradford <robert.bradford@intel.com> |
misc: Remove unnecessary "extern crate"
Now all crates use edition = "2018" then the majority of the "extern crate" statements can be removed. Only those for importing macros need to remain.
Signed
misc: Remove unnecessary "extern crate"
Now all crates use edition = "2018" then the majority of the "extern crate" statements can be removed. Only those for importing macros need to remain.
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
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28f383ba | 06-May-2021 |
Rob Bradford <robert.bradford@intel.com> |
hypervisor: aarch64: Safer calculation of offset_of
Use a safer method for calculating struct member offsets.
Signed-off-by: Rob Bradford <robert.bradford@intel.com> |
3c6dfd77 | 25-Mar-2021 |
Rob Bradford <robert.bradford@intel.com> |
tdx: Address Rust 1.51.0 clippy issue (upper_case_acroynms)
error: name `FinalizeTDX` contains a capitalized acronym --> vmm/src/vm.rs:274:5 | 274 | FinalizeTDX(hypervisor::HypervisorVmEr
tdx: Address Rust 1.51.0 clippy issue (upper_case_acroynms)
error: name `FinalizeTDX` contains a capitalized acronym --> vmm/src/vm.rs:274:5 | 274 | FinalizeTDX(hypervisor::HypervisorVmError), | ^^^^^^^^^^^ help: consider making the acronym lowercase, except the initial letter: `FinalizeTdx` | = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#upper_case_acronyms
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
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e2946889 | 25-Mar-2021 |
Rob Bradford <robert.bradford@intel.com> |
hypervisor: Address Rust 1.51.0 clippy issue (from_over_into)
warning: an implementation of `From` is preferred since it gives you `Into<_>` for free where the reverse isn't true --> hypervisor/sr
hypervisor: Address Rust 1.51.0 clippy issue (from_over_into)
warning: an implementation of `From` is preferred since it gives you `Into<_>` for free where the reverse isn't true --> hypervisor/src/vm.rs:41:1 | 41 | impl Into<u64> for DataMatch { | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^ | = note: `#[warn(clippy::from_over_into)]` on by default = help: consider to implement `From` instead = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#from_over_into
warning: 1 warning emitted
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
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0c27f69f | 25-Mar-2021 |
Rob Bradford <robert.bradford@intel.com> |
hypervisor: Address Rust 1.51.0 clippy issue (upper_case_acroynms)
warning: name `TranslateGVA` contains a capitalized acronym --> hypervisor/src/arch/emulator/mod.rs:51:5 | 51 | TranslateG
hypervisor: Address Rust 1.51.0 clippy issue (upper_case_acroynms)
warning: name `TranslateGVA` contains a capitalized acronym --> hypervisor/src/arch/emulator/mod.rs:51:5 | 51 | TranslateGVA(#[source] anyhow::Error), | ^^^^^^^^^^^^ help: consider making the acronym lowercase, except the initial letter: `TranslateGva` | = note: `#[warn(clippy::upper_case_acronyms)]` on by default = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#upper_case_acronyms
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
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68401e6e | 10-Mar-2021 |
Vineeth Pillai <viremana@linux.microsoft.com> |
hypervisor:mshv: Support the move of MSI routing to kernel
Signed-off-by: Vineeth Pillai <viremana@linux.microsoft.com> |
7fad74cb | 10-Mar-2021 |
Vineeth Pillai <viremana@linux.microsoft.com> |
hypervisor: refactor vec_with_array_field function
refactor vec_with_array_field to common hypervisor code so that mshv can also make use of it.
Signed-off-by: Vineeth Pillai <viremana@linux.micros
hypervisor: refactor vec_with_array_field function
refactor vec_with_array_field to common hypervisor code so that mshv can also make use of it.
Signed-off-by: Vineeth Pillai <viremana@linux.microsoft.com>
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d370ea58 | 22-Mar-2021 |
Sebastien Boeuf <sebastien.boeuf@intel.com> |
deps: bump iced-x86 from 1.10.3 to 1.11.0
Bumps iced-x86 from 1.10.3 to 1.11.0.
Manual update of the code was needed since memory_displacement() was deprecated and replaced with either memory_displ
deps: bump iced-x86 from 1.10.3 to 1.11.0
Bumps iced-x86 from 1.10.3 to 1.11.0.
Manual update of the code was needed since memory_displacement() was deprecated and replaced with either memory_displacement32() or memory_displacement64().
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
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afc83582 | 14-Mar-2021 |
Michael Zhao <michael.zhao@arm.com> |
aarch64: Enable IRQ routing for legacy devices
On AArch64, interrupt controller (GIC) is emulated by KVM. VMM need to set IRQ routing for devices, including legacy ones.
Before this commit, IRQ rou
aarch64: Enable IRQ routing for legacy devices
On AArch64, interrupt controller (GIC) is emulated by KVM. VMM need to set IRQ routing for devices, including legacy ones.
Before this commit, IRQ routing was only set for MSI. Legacy routing entries of type KVM_IRQ_ROUTING_IRQCHIP were missing. That is way legacy devices (like serial device ttyS0) does not work.
The setting of X86 IRQ routing entries are not impacted.
Signed-off-by: Michael Zhao <michael.zhao@arm.com>
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1c54fc3a | 23-Feb-2021 |
Rob Bradford <robert.bradford@intel.com> |
hypervisor: Support creating a VM of a specified KVM type
This is necessary to support creating a TD VM.
Signed-off-by: Rob Bradford <robert.bradford@intel.com> |
f282cc00 | 12-Feb-2021 |
Rob Bradford <robert.bradford@intel.com> |
tdx: Add abstraction to call TDX ioctls to hypervisor
Add API to the hypervisor interface and implement for KVM to allow the special TDX KVM ioctls on the VM and vCPU FDs.
Signed-off-by: Rob Bradfo
tdx: Add abstraction to call TDX ioctls to hypervisor
Add API to the hypervisor interface and implement for KVM to allow the special TDX KVM ioctls on the VM and vCPU FDs.
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
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74565538 | 01-Mar-2021 |
Wei Liu <liuwe@microsoft.com> |
hypervisor: mshv: hook up TranslateGVA hypercall
At this stage this is the bare minimum needed to make Windows server 2019 work on MSHV.
Signed-off-by: Wei Liu <liuwe@microsoft.com> |
030a86db | 01-Mar-2021 |
Wei Liu <liuwe@microsoft.com> |
hypervisor: mshv: simplify GVA to GPA cache
So far we've only had the need to emulate one instruction. There is no need to use a HashMap when a simple tuple for the initial mapping will do.
We can
hypervisor: mshv: simplify GVA to GPA cache
So far we've only had the need to emulate one instruction. There is no need to use a HashMap when a simple tuple for the initial mapping will do.
We can bring back the HashMap once more sophisticated use cases surface.
No functional change.
Signed-off-by: Wei Liu <liuwe@microsoft.com>
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3eb5b67d | 01-Mar-2021 |
Wei Liu <liuwe@microsoft.com> |
hypervisor: mshv: make SoftTLB part of MshvEmulatorContext
This avoids code complexity down the line when we get around implementing Windows support.
No functional change.
Signed-off-by: Wei Liu <
hypervisor: mshv: make SoftTLB part of MshvEmulatorContext
This avoids code complexity down the line when we get around implementing Windows support.
No functional change.
Signed-off-by: Wei Liu <liuwe@microsoft.com>
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f8875ace | 25-Feb-2021 |
Rob Bradford <robert.bradford@intel.com> |
misc: Bulk upgrade dependencies
In particular update for the vmm-sys-util upgrade and all the other dependent packages. This requires an updated forked version of kvm-bindings (due to updated vfio-i
misc: Bulk upgrade dependencies
In particular update for the vmm-sys-util upgrade and all the other dependent packages. This requires an updated forked version of kvm-bindings (due to updated vfio-ioctls) but allowed the removal of our forked version of kvm-ioctls.
The changes to the API from kvm-ioctls and vmm-sys-util required some other minor changes to the code.
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
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49214cf0 | 22-Feb-2021 |
Wei Liu <liuwe@microsoft.com> |
hypervisor: emulator: fix MOVZX
According to Intel's mnemonic (which is used by iced-x86) the first argument is destination while the second is source.
Signed-off-by: Wei Liu <liuwe@microsoft.com> |
e22b6ec7 | 04-Jan-2021 |
Wei Liu <liuwe@microsoft.com> |
hypervisor: x86: emulate MOVS instruction
Signed-off-by: Wei Liu <liuwe@microsoft.com> |
b59243f6 | 11-Jan-2021 |
Wei Liu <liuwe@microsoft.com> |
hypervisor: mshv: support reading and writing guest memory in emulator
We don't have an easy way to figure out if a GPA points to normal memory or device memory, but the guest's normal memory region
hypervisor: mshv: support reading and writing guest memory in emulator
We don't have an easy way to figure out if a GPA points to normal memory or device memory, but the guest's normal memory regions shouldn't overlap with device regions. We can simply try to do a normal memory read / write, and proceed to do device memory read / write if that fails.
Signed-off-by: Wei Liu <liuwe@microsoft.com>
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07a09eda | 08-Feb-2021 |
Rob Bradford <robert.bradford@intel.com> |
hypervisor: kvm: Remove whitespace from use statements
This allows cargo fmt to correctly order the statements.
Signed-off-by: Rob Bradford <robert.bradford@intel.com> |
29881a2d | 10-Dec-2020 |
Wei Liu <liuwe@microsoft.com> |
hypervisor: mshv: explicitly skip a few IO ports
OVMF would use string IO on those ports. String IO has not been implemented, so that leads to panics.
Skip them explicitly in MSHV. Leave a long-ish
hypervisor: mshv: explicitly skip a few IO ports
OVMF would use string IO on those ports. String IO has not been implemented, so that leads to panics.
Skip them explicitly in MSHV. Leave a long-ish comment in code to explain the situation. We should properly implement string IO once it becomes feasible / necessary.
Signed-off-by: Wei Liu <liuwe@microsoft.com>
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a330a156 | 15-Feb-2021 |
Rob Bradford <robert.bradford@intel.com> |
arch, arch_gen, hypervisor: Remove some unnecessary clippy attributes
Signed-off-by: Rob Bradford <robert.bradford@intel.com> |
cf6480f0 | 15-Feb-2021 |
Wei Liu <liuwe@microsoft.com> |
hypervisor: mshv: drop some clippy attributes
They were used to suppress warnings during development. At this stage they aren't needed anymore.
Signed-off-by: Wei Liu <liuwe@microsoft.com> |