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c8d9a430 |
| 15-Jul-2022 |
Wei Liu <liuwe@microsoft.com> |
hypervisor: x86: drop get/set Xsave from Vcpu trait
They are only needed internally within the hypervisor crate.
Signed-off-by: Wei Liu <liuwe@microsoft.com>
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#
6a8c0fc8 |
| 15-Jul-2022 |
Wei Liu <liuwe@microsoft.com> |
hypervisor: provide a generic FpuState structure
Signed-off-by: Wei Liu <liuwe@microsoft.com>
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#
08135fa0 |
| 18-Jul-2022 |
Wei Liu <liuwe@microsoft.com> |
hypervisor: provide a generic CpudIdEntry structure
Signed-off-by: Wei Liu <liuwe@microsoft.com>
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#
45fbf840 |
| 15-Jul-2022 |
Wei Liu <liuwe@microsoft.com> |
hypervisor, vmm: move away from CpuId type
CpuId is an alias type for the flexible array structure type over CpuIdEntry. The type itself and the type of the element in the array portion are tied to
hypervisor, vmm: move away from CpuId type
CpuId is an alias type for the flexible array structure type over CpuIdEntry. The type itself and the type of the element in the array portion are tied to the underlying hypervisor.
Switch to using CpuIdEntry slice or vector directly. The construction of CpuId type is left to hypervisors.
This allows us to decouple CpuIdEntry from hypervisors more easily.
No functional change intended.
Signed-off-by: Wei Liu <liuwe@microsoft.com>
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#
f1ab86fe |
| 14-Jul-2022 |
Wei Liu <liuwe@microsoft.com> |
hypervisor: x86: provide a generic SpecialRegisters structure
Signed-off-by: Wei Liu <liuwe@microsoft.com>
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#
8b7781e2 |
| 14-Jul-2022 |
Wei Liu <liuwe@microsoft.com> |
hypervisor: x86: provide a generic StandardRegisters structure
We only need to do this for x86 since MSHV does not have aarch64 support yet. This reduces unnecessary code churn.
Signed-off-by: Wei
hypervisor: x86: provide a generic StandardRegisters structure
We only need to do this for x86 since MSHV does not have aarch64 support yet. This reduces unnecessary code churn.
Signed-off-by: Wei Liu <liuwe@microsoft.com>
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#
d20f647b |
| 14-Jul-2022 |
Wei Liu <liuwe@microsoft.com> |
hypervisor: provide a generic IrqRoutingEntry structure
Signed-off-by: Wei Liu <liuwe@microsoft.com>
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#
4201bf40 |
| 14-Jul-2022 |
Wei Liu <liuwe@microsoft.com> |
hypervisor: provide a generic ClockData structure
Signed-off-by: Wei Liu <liuwe@microsoft.com>
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#
beb4f86b |
| 14-Jul-2022 |
Wei Liu <liuwe@microsoft.com> |
hypervisor, vmm: drop VmState and code
VmState was introduced to hold hypervisor specific VM state. KVM does not need it and MSHV does not really use it yet.
Just drop the code. It can be easily re
hypervisor, vmm: drop VmState and code
VmState was introduced to hold hypervisor specific VM state. KVM does not need it and MSHV does not really use it yet.
Just drop the code. It can be easily revived once there is a need.
Signed-off-by: Wei Liu <liuwe@microsoft.com>
show more ...
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#
72d552e5 |
| 14-Jul-2022 |
Wei Liu <liuwe@microsoft.com> |
hypervisor: provide a generic CpuState structure
Signed-off-by: Wei Liu <liuwe@microsoft.com>
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#
f9f0a60d |
| 14-Jul-2022 |
Wei Liu <liuwe@microsoft.com> |
hypervisor: provide a generic IoEventAddress structure
Signed-off-by: Wei Liu <liuwe@microsoft.com>
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#
9810ed44 |
| 14-Jul-2022 |
Wei Liu <liuwe@microsoft.com> |
hypervisor: provide a generic MpState structure
It is however only used for KVM right now because MSHV does not need it yet.
Nonetheless a stub MSHV constructor should be there and get/set function
hypervisor: provide a generic MpState structure
It is however only used for KVM right now because MSHV does not need it yet.
Nonetheless a stub MSHV constructor should be there and get/set functions should be implemented for MSHV.
Signed-off-by: Wei Liu <liuwe@microsoft.com>
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#
f0ad7fc7 |
| 21-Jun-2022 |
Michael Zhao <michael.zhao@arm.com> |
hypervisor: Remove `arch_target = "arm"' in `cfg`
Some `arch_target = "arm"' usages on VCPU related code are not correct. And we don't support 32-bit ARM architecture.
Signed-off-by: Michael Zhao <
hypervisor: Remove `arch_target = "arm"' in `cfg`
Some `arch_target = "arm"' usages on VCPU related code are not correct. And we don't support 32-bit ARM architecture.
Signed-off-by: Michael Zhao <michael.zhao@arm.com>
show more ...
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#
2d8635f0 |
| 21-Jun-2022 |
Michael Zhao <michael.zhao@arm.com> |
hypervisor: Refactor `system_registers` on AArch64
Function `system_registers` took mutable vector reference and modified the vector content. Now change the definition to `get/set` style. And rename
hypervisor: Refactor `system_registers` on AArch64
Function `system_registers` took mutable vector reference and modified the vector content. Now change the definition to `get/set` style. And rename to `get/set_sys_regs` to align with other functions.
Signed-off-by: Michael Zhao <michael.zhao@arm.com>
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#
c4455139 |
| 21-Jun-2022 |
Michael Zhao <michael.zhao@arm.com> |
hypervisor: Refactor `core_registers` on AArch64
On AArch64, the function `core_registers` and `set_core_registers` are the same thing of `get/set_regs` on x86_64. Now the names are aligned. This wi
hypervisor: Refactor `core_registers` on AArch64
On AArch64, the function `core_registers` and `set_core_registers` are the same thing of `get/set_regs` on x86_64. Now the names are aligned. This will benefit supporting `gdb`.
Signed-off-by: Michael Zhao <michael.zhao@arm.com>
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#
37109322 |
| 09-Jul-2022 |
Wei Liu <liuwe@microsoft.com> |
hypervisor: drop a level of indirection for KVM's DeviceFd
Signed-off-by: Wei Liu <liuwe@microsoft.com>
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#
ddad5f35 |
| 09-Jul-2022 |
Wei Liu <liuwe@microsoft.com> |
hypervisor: allow downcasting to KVM / MSHV device fd
Signed-off-by: Wei Liu <liuwe@microsoft.com>
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#
e1cf889d |
| 08-Jul-2022 |
Wei Liu <liuwe@microsoft.com> |
hypervisor: use UserMemoryRegion in the Vm trait
Signed-off-by: Dev Rajput <t-devrajput@microsoft.com> Signed-off-by: Wei Liu <liuwe@microsoft.com>
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#
5894b537 |
| 08-Jul-2022 |
Wei Liu <liuwe@microsoft.com> |
hypervisor: transform between UserMemoryRegion and hypervisor structs
Signed-off-by: Dev Rajput <t-devrajput@microsoft.com> Signed-off-by: Wei Liu <liuwe@microsoft.com>
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#
84bbaf06 |
| 08-Jul-2022 |
Wei Liu <liuwe@microsoft.com> |
hypervisor: turn boot_msr_entries into a trait method
This allows dispatching to either KVM or MSHV automatically.
No functional change.
Signed-off-by: Wei Liu <liuwe@microsoft.com>
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#
2716bc33 |
| 30-Jun-2022 |
Rob Bradford <robert.bradford@intel.com> |
build: Fix beta clippy issue (derive_partial_eq_without_eq)
warning: you are deriving `PartialEq` and can implement `Eq` --> vmm/src/serial_manager.rs:59:30 | 59 | #[derive(Debug, Clone, Copy,
build: Fix beta clippy issue (derive_partial_eq_without_eq)
warning: you are deriving `PartialEq` and can implement `Eq` --> vmm/src/serial_manager.rs:59:30 | 59 | #[derive(Debug, Clone, Copy, PartialEq)] | ^^^^^^^^^ help: consider deriving `Eq` as well: `PartialEq, Eq` | = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#derive_partial_eq_without_eq
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
show more ...
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#
a7a15d56 |
| 06-Jun-2022 |
Michael Zhao <michael.zhao@arm.com> |
aarch64: Move `setup_regs` to `hypervisor`
`setup_regs` of AArch64 calls KVM sepecific code. Now move it to `hypervisor` crate.
Signed-off-by: Michael Zhao <michael.zhao@arm.com>
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#
957d3a74 |
| 01-Jun-2022 |
Michael Zhao <michael.zhao@arm.com> |
aarch64: Simplify GIC related structs definition
Combined the `GicDevice` struct in `arch` crate and the `Gic` struct in `devices` crate.
After moving the KVM specific code for GIC in `arch`, a ver
aarch64: Simplify GIC related structs definition
Combined the `GicDevice` struct in `arch` crate and the `Gic` struct in `devices` crate.
After moving the KVM specific code for GIC in `arch`, a very thin wapper layer `GicDevice` was left in `arch` crate. It is easy to combine it with the `Gic` in `devices` crate.
Signed-off-by: Michael Zhao <michael.zhao@arm.com>
show more ...
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#
c2862b69 |
| 29-May-2022 |
Michael Zhao <michael.zhao@arm.com> |
hypervisor: Move GitV3Its code from `arch`
Signed-off-by: Michael Zhao <michael.zhao@arm.com>
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#
3a0429c9 |
| 17-May-2022 |
Maksym Pavlenko <pavlenko.maksym@gmail.com> |
cargo: Clean up serde dependencies
There is no need to include serde_derive separately, as it can be specified as serde feature instead.
Signed-off-by: Maksym Pavlenko <pavlenko.maksym@gmail.com>
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