#
218be264 |
| 11-May-2022 |
Rob Bradford <robert.bradford@intel.com> |
hypervisor: Explicitly `pub use` at the hypervisor crate top-level
Explicitly re-export types from the hypervisor specific modules. This makes it much clearer what the common functionality that is e
hypervisor: Explicitly `pub use` at the hypervisor crate top-level
Explicitly re-export types from the hypervisor specific modules. This makes it much clearer what the common functionality that is exposed is.
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
show more ...
|
#
3ffc105f |
| 10-May-2022 |
Rob Bradford <robert.bradford@intel.com> |
hypervisor, vm-device: Relocate InterruptSourceConfig
Move this enum from vm-device to hypervisor crate so that hypervisor crate does not gain an extra dependency.
Signed-off-by: Rob Bradford <robe
hypervisor, vm-device: Relocate InterruptSourceConfig
Move this enum from vm-device to hypervisor crate so that hypervisor crate does not gain an extra dependency.
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
show more ...
|
#
3f9e8d67 |
| 10-May-2022 |
Rob Bradford <robert.bradford@intel.com> |
hypervisor: Move creation of irq routing struct to hypervisor crate
This removes the requirement to leak as many datastructures from the hypervisor crate into the vmm crate.
Signed-off-by: Rob Brad
hypervisor: Move creation of irq routing struct to hypervisor crate
This removes the requirement to leak as many datastructures from the hypervisor crate into the vmm crate.
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
show more ...
|
#
387d5687 |
| 04-May-2022 |
Rob Bradford <robert.bradford@intel.com> |
vmm, hypervisor: Clean up nomenclature around offloading VM operations
The trait and functionality is about operations on the VM rather than the VMM so should be named appropriately. This clashed wi
vmm, hypervisor: Clean up nomenclature around offloading VM operations
The trait and functionality is about operations on the VM rather than the VMM so should be named appropriately. This clashed with with existing struct for the concrete implementation that was renamed appropriately.
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
show more ...
|
#
b0077f0b |
| 30-Mar-2022 |
Sebastien Boeuf <sebastien.boeuf@intel.com> |
hypervisor: Implement retrieval of TDX capabilities
Extend the Hypervisor API in order to retrieve the TDX capabilities from the underlying hypervisor.
Signed-off-by: Sebastien Boeuf <sebastien.boe
hypervisor: Implement retrieval of TDX capabilities
Extend the Hypervisor API in order to retrieve the TDX capabilities from the underlying hypervisor.
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
show more ...
|
#
f310dc09 |
| 30-Mar-2022 |
Sebastien Boeuf <sebastien.boeuf@intel.com> |
hypervisor: Don't enable TDX debug
This might not be correctly supported, therefore best to keep it disabled by default.
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
|
#
9f111388 |
| 30-Jan-2022 |
Akira Moroo <retrage01@gmail.com> |
hypervisor: Add `VmExit::Debug` for x86/KVM
This commit adds `VmExit::Debug` for x86/KVM. When the guest hits a hardware breakpoint, `VcpuExit::Debug` vm exit occurs. This vm exit will be handled wi
hypervisor: Add `VmExit::Debug` for x86/KVM
This commit adds `VmExit::Debug` for x86/KVM. When the guest hits a hardware breakpoint, `VcpuExit::Debug` vm exit occurs. This vm exit will be handled with code implemented in the following commits.
Signed-off-by: Akira Moroo <retrage01@gmail.com>
show more ...
|
#
9f27954f |
| 20-Feb-2022 |
Akira Moroo <retrage01@gmail.com> |
hypervisor: Add `set_guest_debug` for x86/KVM
This commit adds `set_guest_debug` implementation for x86/KVM. This function sets hardware breakpoints and single step to debug registers.
NOTE: The `s
hypervisor: Add `set_guest_debug` for x86/KVM
This commit adds `set_guest_debug` implementation for x86/KVM. This function sets hardware breakpoints and single step to debug registers.
NOTE: The `set_guest_debug` implementation is based on the crosvm implementation [1].
[1] https://github.com/google/crosvm/blob/main/hypervisor/src/kvm/x86_64.rs
Signed-off-by: Akira Moroo <retrage01@gmail.com>
show more ...
|
#
603ca0e2 |
| 20-Feb-2022 |
Akira Moroo <retrage01@gmail.com> |
hypervisor: Add `translate_gva` for x86/KVM
This commit adds `translate_gva` for x86/KVM. The same name function is already implemented for MSHV, but the implementation differs as KVM_TRANSLATE does
hypervisor: Add `translate_gva` for x86/KVM
This commit adds `translate_gva` for x86/KVM. The same name function is already implemented for MSHV, but the implementation differs as KVM_TRANSLATE does not take the flag argument and does not return status code. This change requires the newer version of kvm-ioctls [1].
[1] https://github.com/rust-vmm/kvm-ioctls/commit/97ff779b6ea96ae451308149b0ae38f13b271c19
Signed-off-by: Akira Moroo <retrage01@gmail.com>
show more ...
|
#
cb844ecd |
| 16-Feb-2022 |
Sebastien Boeuf <sebastien.boeuf@intel.com> |
hypervisor: Add support for TDX exit reason to KVM
Relying on the recent additions to the kvm-ioctls crate, this commit implements the support for providing the exit reason details to the caller, wh
hypervisor: Add support for TDX exit reason to KVM
Relying on the recent additions to the kvm-ioctls crate, this commit implements the support for providing the exit reason details to the caller, which allows the identification of the type of hypercall that was issued. It also introduces a way for the consumer to set the status code that must be sent back to the guest.
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
show more ...
|
#
50791238 |
| 07-Feb-2022 |
Rob Bradford <robert.bradford@intel.com> |
vmm: Ensure that PIO and MMIO exits complete before pausing
As per this kernel documentation:
For KVM_EXIT_IO, KVM_EXIT_MMIO, KVM_EXIT_OSI, KVM_EXIT_PAPR, KVM_EXIT_XEN, KVM_EXIT_EPR, KV
vmm: Ensure that PIO and MMIO exits complete before pausing
As per this kernel documentation:
For KVM_EXIT_IO, KVM_EXIT_MMIO, KVM_EXIT_OSI, KVM_EXIT_PAPR, KVM_EXIT_XEN, KVM_EXIT_EPR, KVM_EXIT_X86_RDMSR and KVM_EXIT_X86_WRMSR the corresponding operations are complete (and guest state is consistent) only after userspace has re-entered the kernel with KVM_RUN. The kernel side will first finish incomplete operations and then check for pending signals.
The pending state of the operation is not preserved in state which is visible to userspace, thus userspace should ensure that the operation is completed before performing a live migration. Userspace can re-enter the guest with an unmasked signal pending or with the immediate_exit field set to complete pending operations without allowing any further instructions to be executed.
Since we capture the state as part of the pause and override it as part of the resume we must ensure the state is consistent otherwise we will lose the results of the MMIO or PIO operation that caused the exit from which we paused.
Fixes: #3658
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
show more ...
|
#
9bcb9849 |
| 11-Jan-2022 |
Jianyong Wu <jianyong.wu@arm.com> |
hypervisor: add has/set trait for vcpu
Like devicefd, vcpufd also has ability to set/has attribute through kvm ioctl. These traits are used when enable PMU on arm64, so add it here.
Signed-off-by:
hypervisor: add has/set trait for vcpu
Like devicefd, vcpufd also has ability to set/has attribute through kvm ioctl. These traits are used when enable PMU on arm64, so add it here.
Signed-off-by: Jianyong Wu <jianyong.wu@arm.com>
show more ...
|
#
658658e7 |
| 18-Jan-2022 |
Rob Bradford <robert.bradford@intel.com> |
hypervisor: kvm: Ignore -EINVAL from KVM_KVMCLOCK_CTRL ioctl()
If the guest hasn't initialised a PV clock then the KVM_KVMCLOCK_CTRL ioctl will return -EINVAL. Therefore if running in the firmware o
hypervisor: kvm: Ignore -EINVAL from KVM_KVMCLOCK_CTRL ioctl()
If the guest hasn't initialised a PV clock then the KVM_KVMCLOCK_CTRL ioctl will return -EINVAL. Therefore if running in the firmware or an OS that doesn't use the PV clock then we should ignore that error
Tested by migrating a VM that has not yet booted into the Linux kernel (just in firmware) by specifying no disk image:
e.g. target/debug/cloud-hypervisor --kernel ~/workloads/hypervisor-fw --api-socket /tmp/api --serial tty --console off
Fixes: #3586
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
show more ...
|
#
c452471c |
| 04-Dec-2021 |
Sebastien Boeuf <sebastien.boeuf@intel.com> |
hypervisor: Add support for setting KVM identity map
Extending the Vm trait with set_identity_map_address() in order to expose this ioctl to the VMM.
Signed-off-by: Sebastien Boeuf <sebastien.boeuf
hypervisor: Add support for setting KVM identity map
Extending the Vm trait with set_identity_map_address() in order to expose this ioctl to the VMM.
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
show more ...
|
#
348def9d |
| 03-Dec-2021 |
Rob Bradford <robert.bradford@intel.com> |
arch, hypervisor, vmm: Explicitly place the TSS in the 32-bit space
Place the 3 page TSS at an explicit location in the 32-bit address space to avoid conflicting with the loaded raw firmware.
Signe
arch, hypervisor, vmm: Explicitly place the TSS in the 32-bit space
Place the 3 page TSS at an explicit location in the 32-bit address space to avoid conflicting with the loaded raw firmware.
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
show more ...
|
#
58d984f6 |
| 18-Nov-2021 |
Wei Liu <liuwe@microsoft.com> |
hypervisor: add a few safety comments
Signed-off-by: Wei Liu <liuwe@microsoft.com>
|
#
76a036e9 |
| 11-Oct-2021 |
Sebastien Boeuf <sebastien.boeuf@intel.com> |
hypervisor: kvm: Add missing MSR related to Hyper-V
When the synthetic interrupt controller is enabled, an extra set of MSRs must be stored in case of migration. There was one MSR missing in the lis
hypervisor: kvm: Add missing MSR related to Hyper-V
When the synthetic interrupt controller is enabled, an extra set of MSRs must be stored in case of migration. There was one MSR missing in the list, HV_X64_MSR_SINT14 corresponding to the 15th interrupt source from the synthetic interrupt controller.
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
show more ...
|
#
bcdac101 |
| 15-Sep-2021 |
Sebastien Boeuf <sebastien.boeuf@intel.com> |
deps: Bump kvm-bindings to v0.5.0
Update the kvm-bindings dependency so that Cloud Hypervisor now depends on the version 0.5.0, which is based on Linux kernel v5.13.0. We still have to rely on a for
deps: Bump kvm-bindings to v0.5.0
Update the kvm-bindings dependency so that Cloud Hypervisor now depends on the version 0.5.0, which is based on Linux kernel v5.13.0. We still have to rely on a forked version to be able to serialize all the KVM structures we need.
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
show more ...
|
#
d74a219a |
| 24-Aug-2021 |
Henry Wang <Henry.Wang@arm.com> |
hypervisor: Remove useless check when saving Arm SystemRegs
Signed-off-by: Henry Wang <Henry.Wang@arm.com>
|
#
a90260ff |
| 27-Aug-2021 |
Jiaqi Gao <jiaqi.gao@intel.com> |
hypervisor: kvm: Update TDX command INIT_VM
Definition of kvm_tdx_init_vm used by INIT_VM has been updated in latest kernel, needing an update on the Cloud Hypervisor side as well.
Update structure
hypervisor: kvm: Update TDX command INIT_VM
Definition of kvm_tdx_init_vm used by INIT_VM has been updated in latest kernel, needing an update on the Cloud Hypervisor side as well.
Update structure TdxInitVm to fit this change and avoid -EINVAL to be returned by the kernel.
Signed-off-by: Jiaqi Gao <jiaqi.gao@intel.com> Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
show more ...
|
#
fdecba69 |
| 08-Jul-2021 |
Muminul Islam <muislam@microsoft.com> |
hypervisor: MSHV needs gpa to retrieve dirty logs
Right now, get_dirty_log API has two parameters, slot and memory_size. MSHV needs gpa to retrieve the page states. GPA is needed as MSHV returns the
hypervisor: MSHV needs gpa to retrieve dirty logs
Right now, get_dirty_log API has two parameters, slot and memory_size. MSHV needs gpa to retrieve the page states. GPA is needed as MSHV returns the state base on PFN.
Signed-off-by: Muminul Islam <muislam@microsoft.com>
show more ...
|
#
dcc646f5 |
| 29-Jul-2021 |
Sebastien Boeuf <sebastien.boeuf@intel.com> |
clippy: Fix redundant allocations
With the new beta version, clippy complains about redundant allocation when using Arc<Box<dyn T>>, and suggests replacing it simply with Arc<dyn T>.
Signed-off-by:
clippy: Fix redundant allocations
With the new beta version, clippy complains about redundant allocation when using Arc<Box<dyn T>>, and suggests replacing it simply with Arc<dyn T>.
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
show more ...
|
#
e7c9954d |
| 26-Jul-2021 |
Bo Chen <chen.bo@intel.com> |
hypervisor, vmm: Abstract the interfaces to start/stop dirty log
Following KVM interfaces, the `hypervisor` crate now provides interfaces to start/stop the dirty pages logging on a per region basis,
hypervisor, vmm: Abstract the interfaces to start/stop dirty log
Following KVM interfaces, the `hypervisor` crate now provides interfaces to start/stop the dirty pages logging on a per region basis, and asks its users (e.g. the `vmm` crate) to iterate over the regions that needs dirty pages log. MSHV only has a global control to start/stop dirty pages log on all regions at once.
This patch refactors related APIs from the `hypervisor` crate to provide a global control to start/stop dirty pages log (following MSHV's behaviors), and keeps tracking the regions need dirty pages log for KVM. It avoids leaking hypervisor-specific behaviors out of the `hypervisor` crate.
Signed-off-by: Bo Chen <chen.bo@intel.com>
show more ...
|
#
5e0d4985 |
| 22-Jul-2021 |
Bo Chen <chen.bo@intel.com> |
hypervisor, vmm: Add dynamic control of logging dirty pages
This patch extends slightly the current live-migration code path with the ability to dynamically start and stop logging dirty-pages, which
hypervisor, vmm: Add dynamic control of logging dirty pages
This patch extends slightly the current live-migration code path with the ability to dynamically start and stop logging dirty-pages, which relies on two new methods added to the `hypervisor::vm::Vm` Trait. This patch also contains a complete implementation of the two new methods based on `kvm` and placeholders for `mshv` in the `hypervisor` crate.
Fixes: #2858
Signed-off-by: Bo Chen <chen.bo@intel.com>
show more ...
|
#
9ec0c981 |
| 07-Jul-2021 |
Sebastien Boeuf <sebastien.boeuf@intel.com> |
hypervisor: Add enable_sgx_attribute to the Vm API
We need a dedicated function to enable the SGX attribute capability through the Hypervisor abstraction.
Signed-off-by: Sebastien Boeuf <sebastien.
hypervisor: Add enable_sgx_attribute to the Vm API
We need a dedicated function to enable the SGX attribute capability through the Hypervisor abstraction.
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
show more ...
|