hypervisor: x86: provide a generic StandardRegisters structure

We only need to do this for x86 since MSHV does not have aarch64 support
yet. This reduces unnecessary code churn.

Signed-off-by: Wei

hypervisor: x86: provide a generic StandardRegisters structure

We only need to do this for x86 since MSHV does not have aarch64 support
yet. This reduces unnecessary code churn.

Signed-off-by: Wei Liu <liuwe@microsoft.com>

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hypervisor: provide a generic MpState structure

It is however only used for KVM right now because MSHV does not need it
yet.

Nonetheless a stub MSHV constructor should be there and get/set
function

hypervisor: provide a generic MpState structure

It is however only used for KVM right now because MSHV does not need it
yet.

Nonetheless a stub MSHV constructor should be there and get/set
functions should be implemented for MSHV.

Signed-off-by: Wei Liu <liuwe@microsoft.com>

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hypervisor: Remove `arch_target = "arm"' in `cfg`

Some `arch_target = "arm"' usages on VCPU related code are not correct.
And we don't support 32-bit ARM architecture.

Signed-off-by: Michael Zhao <

hypervisor: Remove `arch_target = "arm"' in `cfg`

Some `arch_target = "arm"' usages on VCPU related code are not correct.
And we don't support 32-bit ARM architecture.

Signed-off-by: Michael Zhao <michael.zhao@arm.com>

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hypervisor: Refactor `system_registers` on AArch64

Function `system_registers` took mutable vector reference and modified
the vector content. Now change the definition to `get/set` style.
And rename

hypervisor: Refactor `system_registers` on AArch64

Function `system_registers` took mutable vector reference and modified
the vector content. Now change the definition to `get/set` style.
And rename to `get/set_sys_regs` to align with other functions.

Signed-off-by: Michael Zhao <michael.zhao@arm.com>

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hypervisor: Refactor `core_registers` on AArch64

On AArch64, the function `core_registers` and `set_core_registers` are
the same thing of `get/set_regs` on x86_64. Now the names are aligned.
This wi

hypervisor: Refactor `core_registers` on AArch64

On AArch64, the function `core_registers` and `set_core_registers` are
the same thing of `get/set_regs` on x86_64. Now the names are aligned.
This will benefit supporting `gdb`.

Signed-off-by: Michael Zhao <michael.zhao@arm.com>

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hypervisor: turn boot_msr_entries into a trait method

This allows dispatching to either KVM or MSHV automatically.

No functional change.

Signed-off-by: Wei Liu <liuwe@microsoft.com>

aarch64: Move `setup_regs` to `hypervisor`

`setup_regs` of AArch64 calls KVM sepecific code. Now move it to
`hypervisor` crate.

Signed-off-by: Michael Zhao <michael.zhao@arm.com>

hypervisor: Explicitly `pub use` at the hypervisor crate top-level

Explicitly re-export types from the hypervisor specific modules. This
makes it much clearer what the common functionality that is e

hypervisor: Explicitly `pub use` at the hypervisor crate top-level

Explicitly re-export types from the hypervisor specific modules. This
makes it much clearer what the common functionality that is exposed is.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>

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hypervisor: Add `VmExit::Debug` for x86/KVM

This commit adds `VmExit::Debug` for x86/KVM. When the guest hits a
hardware breakpoint, `VcpuExit::Debug` vm exit occurs. This vm exit
will be handled wi

hypervisor: Add `VmExit::Debug` for x86/KVM

This commit adds `VmExit::Debug` for x86/KVM. When the guest hits a
hardware breakpoint, `VcpuExit::Debug` vm exit occurs. This vm exit
will be handled with code implemented in the following commits.

Signed-off-by: Akira Moroo <retrage01@gmail.com>

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hypervisor: Add `set_guest_debug` for x86/KVM

This commit adds `set_guest_debug` implementation for x86/KVM. This
function sets hardware breakpoints and single step to debug registers.

NOTE: The `s

hypervisor: Add `set_guest_debug` for x86/KVM

This commit adds `set_guest_debug` implementation for x86/KVM. This
function sets hardware breakpoints and single step to debug registers.

NOTE: The `set_guest_debug` implementation is based on the crosvm
implementation [1].

[1]
https://github.com/google/crosvm/blob/main/hypervisor/src/kvm/x86_64.rs

Signed-off-by: Akira Moroo <retrage01@gmail.com>

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hypervisor: Add `translate_gva` for x86/KVM

This commit adds `translate_gva` for x86/KVM. The same name function is
already implemented for MSHV, but the implementation differs as
KVM_TRANSLATE does

hypervisor: Add `translate_gva` for x86/KVM

This commit adds `translate_gva` for x86/KVM. The same name function is
already implemented for MSHV, but the implementation differs as
KVM_TRANSLATE does not take the flag argument and does not return status
code. This change requires the newer version of kvm-ioctls [1].

[1]
https://github.com/rust-vmm/kvm-ioctls/commit/97ff779b6ea96ae451308149b0ae38f13b271c19

Signed-off-by: Akira Moroo <retrage01@gmail.com>

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hypervisor: Remove mshv specific type from `translate_gva`

`translate_gva` returns mshv-specific type `hv_translate_gva_result`.
This return type is not a problem since this function is implemented

hypervisor: Remove mshv specific type from `translate_gva`

`translate_gva` returns mshv-specific type `hv_translate_gva_result`.
This return type is not a problem since this function is implemented
only for mshv, but we need to remove the type as the same function will
be implemented for KVM in PR #3575. This commit replaces the
mshv-specific type with `u32`.

Signed-off-by: Akira Moroo <retrage01@gmail.com>

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hypervisor: Add support for TDX exit reason to KVM

Relying on the recent additions to the kvm-ioctls crate, this commit
implements the support for providing the exit reason details to the
caller, wh

hypervisor: Add support for TDX exit reason to KVM

Relying on the recent additions to the kvm-ioctls crate, this commit
implements the support for providing the exit reason details to the
caller, which allows the identification of the type of hypercall that
was issued. It also introduces a way for the consumer to set the status
code that must be sent back to the guest.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>

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vmm: Ensure that PIO and MMIO exits complete before pausing

As per this kernel documentation:

For KVM_EXIT_IO, KVM_EXIT_MMIO, KVM_EXIT_OSI, KVM_EXIT_PAPR, KVM_EXIT_XEN,
KVM_EXIT_EPR, KV

vmm: Ensure that PIO and MMIO exits complete before pausing

As per this kernel documentation:

For KVM_EXIT_IO, KVM_EXIT_MMIO, KVM_EXIT_OSI, KVM_EXIT_PAPR, KVM_EXIT_XEN,
KVM_EXIT_EPR, KVM_EXIT_X86_RDMSR and KVM_EXIT_X86_WRMSR the corresponding
operations are complete (and guest state is consistent) only after userspace
has re-entered the kernel with KVM_RUN. The kernel side will first finish
incomplete operations and then check for pending signals.

The pending state of the operation is not preserved in state which is
visible to userspace, thus userspace should ensure that the operation is
completed before performing a live migration. Userspace can re-enter the
guest with an unmasked signal pending or with the immediate_exit field set
to complete pending operations without allowing any further instructions
to be executed.

Since we capture the state as part of the pause and override it as part
of the resume we must ensure the state is consistent otherwise we will
lose the results of the MMIO or PIO operation that caused the exit from
which we paused.

Fixes: #3658

Signed-off-by: Rob Bradford <robert.bradford@intel.com>

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hypervisor: add has/set trait for vcpu

Like devicefd, vcpufd also has ability to set/has attribute through kvm
ioctl. These traits are used when enable PMU on arm64, so add it here.

Signed-off-by:

hypervisor: add has/set trait for vcpu

Like devicefd, vcpufd also has ability to set/has attribute through kvm
ioctl. These traits are used when enable PMU on arm64, so add it here.

Signed-off-by: Jianyong Wu <jianyong.wu@arm.com>

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hypervisor: Add Misc register to Save/Restore state for MSHV

Hypercall register needs to be saved and restored for
TLB flush and IPI synthetic features enablement.
Enabling these two synthetic featu

hypervisor: Add Misc register to Save/Restore state for MSHV

Hypercall register needs to be saved and restored for
TLB flush and IPI synthetic features enablement.
Enabling these two synthetic features improves
guest performance.

Signed-off-by: Muminul Islam <muislam@microsoft.com>

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hypervisor: implement get_suspend_regs for MSHV vcpu trait

This vcpu API is necessary for MSHV related debugging.
These two registers controls the vcpu_run in the
/dev/mshv driver code.

Signed-off-

hypervisor: implement get_suspend_regs for MSHV vcpu trait

This vcpu API is necessary for MSHV related debugging.
These two registers controls the vcpu_run in the
/dev/mshv driver code.

Signed-off-by: Muminul Islam <muislam@microsoft.com>

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hypervisor: Address Rust 1.51.0 clippy issue (upper_case_acroynms)

warning: name `TranslateGVA` contains a capitalized acronym
--> hypervisor/src/arch/emulator/mod.rs:51:5
|
51 | TranslateG

hypervisor: Address Rust 1.51.0 clippy issue (upper_case_acroynms)

warning: name `TranslateGVA` contains a capitalized acronym
--> hypervisor/src/arch/emulator/mod.rs:51:5
|
51 | TranslateGVA(#[source] anyhow::Error),
| ^^^^^^^^^^^^ help: consider making the acronym lowercase, except the initial letter: `TranslateGva`
|
= note: `#[warn(clippy::upper_case_acronyms)]` on by default
= help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#upper_case_acronyms

Signed-off-by: Rob Bradford <robert.bradford@intel.com>

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tdx: Add abstraction to call TDX ioctls to hypervisor

Add API to the hypervisor interface and implement for KVM to allow the
special TDX KVM ioctls on the VM and vCPU FDs.

Signed-off-by: Rob Bradfo

tdx: Add abstraction to call TDX ioctls to hypervisor

Add API to the hypervisor interface and implement for KVM to allow the
special TDX KVM ioctls on the VM and vCPU FDs.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>

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hypervisor: mshv: hook up TranslateGVA hypercall

At this stage this is the bare minimum needed to make Windows server
2019 work on MSHV.

Signed-off-by: Wei Liu <liuwe@microsoft.com>

hypervisor, vmm: Implement the mshv module and add mshv support in vmm

Implement hypervisor, Vm, Vcpu crate at a minimal
functionalities. Also adds the mshv feature gate,
separates out the functiona

hypervisor, vmm: Implement the mshv module and add mshv support in vmm

Implement hypervisor, Vm, Vcpu crate at a minimal
functionalities. Also adds the mshv feature gate,
separates out the functionalities between kvm and
mshv inside the vmm crate.

Co-Developed-by: Nuno Das Neves <nudasnev@microsoft.com>
Signed-off-by: Nuno Das Neves <nudasnev@microsoft.com>
Co-Developed-by: Praveen Paladugu <prapal@microsoft.com>
Signed-off-by: Praveen Paladugu <prapal@microsoft.com>
Co-Developed-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Co-Developed-by: Wei Liu <liuwe@microsoft.com>
Signed-off-by: Wei Liu <liuwe@microsoft.com>
Signed-off-by: Muminul Islam <muislam@microsoft.com>

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hypervisor, vmm: Feature guard KVM specific code

There are some code base and function which are purely KVM specific for
now and we don't have those supports in mshv at the moment but we have plan
f

hypervisor, vmm: Feature guard KVM specific code

There are some code base and function which are purely KVM specific for
now and we don't have those supports in mshv at the moment but we have plan
for the future. We are doing a feature guard with KVM. For example, KVM has
mp_state, cpu clock support, which we don't have for mshv. In order to build
those code we are making the code base for KVM specific compilation.

Signed-off-by: Muminul Islam <muislam@microsoft.com>

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vmm: Implement VM rebooting on AArch64

The logic to handle AArch64 system event was: SHUTDOWN and RESET were
all treated as RESET.

Now we handle them differently:
- RESET event will trigger Vmm::vm

vmm: Implement VM rebooting on AArch64

The logic to handle AArch64 system event was: SHUTDOWN and RESET were
all treated as RESET.

Now we handle them differently:
- RESET event will trigger Vmm::vm_reboot(),
- SHUTDOWN event will trigger Vmm::vm_shutdown().

Signed-off-by: Michael Zhao <michael.zhao@arm.com>

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hypervisor, arch: rename "OneRegister" and relevant code

The OneRegister literally means "one (arbitrary) register". Just call it
"Register" instead. There is no need to inherit KVM's naming scheme

hypervisor, arch: rename "OneRegister" and relevant code

The OneRegister literally means "one (arbitrary) register". Just call it
"Register" instead. There is no need to inherit KVM's naming scheme in
the hypervisor agnostic code.

Signed-off-by: Wei Liu <liuwe@microsoft.com>

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AArch64: Implement AArch64 vCPU states save/restore

This commit adds methods to save/restore AArch64 vCPU registers,
including:

1. The AArch64 `VcpuKvmState` structure.

2. Some `Vcpu` trait method

AArch64: Implement AArch64 vCPU states save/restore

This commit adds methods to save/restore AArch64 vCPU registers,
including:

1. The AArch64 `VcpuKvmState` structure.

2. Some `Vcpu` trait methods of the `KvmVcpu` structure to
enable the save/restore of the AArch64 vCPU states.

Signed-off-by: Henry Wang <Henry.Wang@arm.com>

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