1c227958aSEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2c227958aSEmmanuel Vadot /* 3c227958aSEmmanuel Vadot * Copyright (c) 2022 MediaTek Inc. 4c227958aSEmmanuel Vadot * Author: Yong Wu <yong.wu@mediatek.com> 5c227958aSEmmanuel Vadot */ 6c227958aSEmmanuel Vadot #ifndef _DT_BINDINGS_MEMORY_MT8365_LARB_PORT_H_ 7c227958aSEmmanuel Vadot #define _DT_BINDINGS_MEMORY_MT8365_LARB_PORT_H_ 8c227958aSEmmanuel Vadot 9c227958aSEmmanuel Vadot #include <dt-bindings/memory/mtk-memory-port.h> 10c227958aSEmmanuel Vadot 11c227958aSEmmanuel Vadot #define M4U_LARB0_ID 0 12c227958aSEmmanuel Vadot #define M4U_LARB1_ID 1 13c227958aSEmmanuel Vadot #define M4U_LARB2_ID 2 14c227958aSEmmanuel Vadot #define M4U_LARB3_ID 3 15c227958aSEmmanuel Vadot 16c227958aSEmmanuel Vadot /* larb0 */ 17c227958aSEmmanuel Vadot #define M4U_PORT_DISP_OVL0 MTK_M4U_ID(M4U_LARB0_ID, 0) 18c227958aSEmmanuel Vadot #define M4U_PORT_DISP_OVL0_2L MTK_M4U_ID(M4U_LARB0_ID, 1) 19c227958aSEmmanuel Vadot #define M4U_PORT_DISP_RDMA0 MTK_M4U_ID(M4U_LARB0_ID, 2) 20c227958aSEmmanuel Vadot #define M4U_PORT_DISP_WDMA0 MTK_M4U_ID(M4U_LARB0_ID, 3) 21c227958aSEmmanuel Vadot #define M4U_PORT_DISP_RDMA1 MTK_M4U_ID(M4U_LARB0_ID, 4) 22c227958aSEmmanuel Vadot #define M4U_PORT_MDP_RDMA0 MTK_M4U_ID(M4U_LARB0_ID, 5) 23c227958aSEmmanuel Vadot #define M4U_PORT_MDP_WROT1 MTK_M4U_ID(M4U_LARB0_ID, 6) 24c227958aSEmmanuel Vadot #define M4U_PORT_MDP_WROT0 MTK_M4U_ID(M4U_LARB0_ID, 7) 25c227958aSEmmanuel Vadot #define M4U_PORT_MDP_RDMA1 MTK_M4U_ID(M4U_LARB0_ID, 8) 26c227958aSEmmanuel Vadot #define M4U_PORT_DISP_FAKE0 MTK_M4U_ID(M4U_LARB0_ID, 9) 27c227958aSEmmanuel Vadot #define M4U_PORT_APU_READ MTK_M4U_ID(M4U_LARB0_ID, 10) 28c227958aSEmmanuel Vadot #define M4U_PORT_APU_WRITE MTK_M4U_ID(M4U_LARB0_ID, 11) 29c227958aSEmmanuel Vadot 30c227958aSEmmanuel Vadot /* larb1 */ 31c227958aSEmmanuel Vadot #define M4U_PORT_VENC_RCPU MTK_M4U_ID(M4U_LARB1_ID, 0) 32c227958aSEmmanuel Vadot #define M4U_PORT_VENC_REC MTK_M4U_ID(M4U_LARB1_ID, 1) 33c227958aSEmmanuel Vadot #define M4U_PORT_VENC_BSDMA MTK_M4U_ID(M4U_LARB1_ID, 2) 34c227958aSEmmanuel Vadot #define M4U_PORT_VENC_SV_COMV MTK_M4U_ID(M4U_LARB1_ID, 3) 35c227958aSEmmanuel Vadot #define M4U_PORT_VENC_RD_COMV MTK_M4U_ID(M4U_LARB1_ID, 4) 36c227958aSEmmanuel Vadot #define M4U_PORT_VENC_NBM_RDMA MTK_M4U_ID(M4U_LARB1_ID, 5) 37c227958aSEmmanuel Vadot #define M4U_PORT_VENC_NBM_RDMA_LITE MTK_M4U_ID(M4U_LARB1_ID, 6) 38c227958aSEmmanuel Vadot #define M4U_PORT_JPGENC_Y_RDMA MTK_M4U_ID(M4U_LARB1_ID, 7) 39c227958aSEmmanuel Vadot #define M4U_PORT_JPGENC_C_RDMA MTK_M4U_ID(M4U_LARB1_ID, 8) 40c227958aSEmmanuel Vadot #define M4U_PORT_JPGENC_Q_TABLE MTK_M4U_ID(M4U_LARB1_ID, 9) 41c227958aSEmmanuel Vadot #define M4U_PORT_JPGENC_BSDMA MTK_M4U_ID(M4U_LARB1_ID, 10) 42c227958aSEmmanuel Vadot #define M4U_PORT_JPGDEC_WDMA MTK_M4U_ID(M4U_LARB1_ID, 11) 43c227958aSEmmanuel Vadot #define M4U_PORT_JPGDEC_BSDMA MTK_M4U_ID(M4U_LARB1_ID, 12) 44c227958aSEmmanuel Vadot #define M4U_PORT_VENC_NBM_WDMA MTK_M4U_ID(M4U_LARB1_ID, 13) 45c227958aSEmmanuel Vadot #define M4U_PORT_VENC_NBM_WDMA_LITE MTK_M4U_ID(M4U_LARB1_ID, 14) 46c227958aSEmmanuel Vadot #define M4U_PORT_VENC_CUR_LUMA MTK_M4U_ID(M4U_LARB1_ID, 15) 47c227958aSEmmanuel Vadot #define M4U_PORT_VENC_CUR_CHROMA MTK_M4U_ID(M4U_LARB1_ID, 16) 48c227958aSEmmanuel Vadot #define M4U_PORT_VENC_REF_LUMA MTK_M4U_ID(M4U_LARB1_ID, 17) 49c227958aSEmmanuel Vadot #define M4U_PORT_VENC_REF_CHROMA MTK_M4U_ID(M4U_LARB1_ID, 18) 50c227958aSEmmanuel Vadot 51c227958aSEmmanuel Vadot /* larb2 */ 52c227958aSEmmanuel Vadot #define M4U_PORT_CAM_IMGO MTK_M4U_ID(M4U_LARB2_ID, 0) 53c227958aSEmmanuel Vadot #define M4U_PORT_CAM_RRZO MTK_M4U_ID(M4U_LARB2_ID, 1) 54c227958aSEmmanuel Vadot #define M4U_PORT_CAM_AAO MTK_M4U_ID(M4U_LARB2_ID, 2) 55c227958aSEmmanuel Vadot #define M4U_PORT_CAM_LCS MTK_M4U_ID(M4U_LARB2_ID, 3) 56c227958aSEmmanuel Vadot #define M4U_PORT_CAM_ESFKO MTK_M4U_ID(M4U_LARB2_ID, 4) 57c227958aSEmmanuel Vadot #define M4U_PORT_CAM_CAM_SV0 MTK_M4U_ID(M4U_LARB2_ID, 5) 58c227958aSEmmanuel Vadot #define M4U_PORT_CAM_CAM_SV1 MTK_M4U_ID(M4U_LARB2_ID, 6) 59c227958aSEmmanuel Vadot #define M4U_PORT_CAM_LSCI MTK_M4U_ID(M4U_LARB2_ID, 7) 60c227958aSEmmanuel Vadot #define M4U_PORT_CAM_LSCI_D MTK_M4U_ID(M4U_LARB2_ID, 8) 61c227958aSEmmanuel Vadot #define M4U_PORT_CAM_AFO MTK_M4U_ID(M4U_LARB2_ID, 9) 62c227958aSEmmanuel Vadot #define M4U_PORT_CAM_SPARE MTK_M4U_ID(M4U_LARB2_ID, 10) 63c227958aSEmmanuel Vadot #define M4U_PORT_CAM_BPCI MTK_M4U_ID(M4U_LARB2_ID, 11) 64c227958aSEmmanuel Vadot #define M4U_PORT_CAM_BPCI_D MTK_M4U_ID(M4U_LARB2_ID, 12) 65c227958aSEmmanuel Vadot #define M4U_PORT_CAM_UFDI MTK_M4U_ID(M4U_LARB2_ID, 13) 66c227958aSEmmanuel Vadot #define M4U_PORT_CAM_IMGI MTK_M4U_ID(M4U_LARB2_ID, 14) 67c227958aSEmmanuel Vadot #define M4U_PORT_CAM_IMG2O MTK_M4U_ID(M4U_LARB2_ID, 15) 68c227958aSEmmanuel Vadot #define M4U_PORT_CAM_IMG3O MTK_M4U_ID(M4U_LARB2_ID, 16) 69c227958aSEmmanuel Vadot #define M4U_PORT_CAM_WPE0_I MTK_M4U_ID(M4U_LARB2_ID, 17) 70c227958aSEmmanuel Vadot #define M4U_PORT_CAM_WPE1_I MTK_M4U_ID(M4U_LARB2_ID, 18) 71c227958aSEmmanuel Vadot #define M4U_PORT_CAM_WPE_O MTK_M4U_ID(M4U_LARB2_ID, 19) 72c227958aSEmmanuel Vadot #define M4U_PORT_CAM_FD0_I MTK_M4U_ID(M4U_LARB2_ID, 20) 73c227958aSEmmanuel Vadot #define M4U_PORT_CAM_FD1_I MTK_M4U_ID(M4U_LARB2_ID, 21) 74c227958aSEmmanuel Vadot #define M4U_PORT_CAM_FD0_O MTK_M4U_ID(M4U_LARB2_ID, 22) 75c227958aSEmmanuel Vadot #define M4U_PORT_CAM_FD1_O MTK_M4U_ID(M4U_LARB2_ID, 23) 76c227958aSEmmanuel Vadot 77c227958aSEmmanuel Vadot /* larb3 */ 78c227958aSEmmanuel Vadot #define M4U_PORT_HW_VDEC_MC_EXT MTK_M4U_ID(M4U_LARB3_ID, 0) 79c227958aSEmmanuel Vadot #define M4U_PORT_HW_VDEC_UFO_EXT MTK_M4U_ID(M4U_LARB3_ID, 1) 80c227958aSEmmanuel Vadot #define M4U_PORT_HW_VDEC_PP_EXT MTK_M4U_ID(M4U_LARB3_ID, 2) 81c227958aSEmmanuel Vadot #define M4U_PORT_HW_VDEC_PRED_RD_EXT MTK_M4U_ID(M4U_LARB3_ID, 3) 82c227958aSEmmanuel Vadot #define M4U_PORT_HW_VDEC_PRED_WR_EXT MTK_M4U_ID(M4U_LARB3_ID, 4) 83c227958aSEmmanuel Vadot #define M4U_PORT_HW_VDEC_PPWRAP_EXT MTK_M4U_ID(M4U_LARB3_ID, 5) 84c227958aSEmmanuel Vadot #define M4U_PORT_HW_VDEC_TILE_EXT MTK_M4U_ID(M4U_LARB3_ID, 6) 85c227958aSEmmanuel Vadot #define M4U_PORT_HW_VDEC_VLD_EXT MTK_M4U_ID(M4U_LARB3_ID, 7) 86c227958aSEmmanuel Vadot #define M4U_PORT_HW_VDEC_VLD2_EXT MTK_M4U_ID(M4U_LARB3_ID, 8) 87c227958aSEmmanuel Vadot #define M4U_PORT_HW_VDEC_AVC_MV_EXT MTK_M4U_ID(M4U_LARB3_ID, 9) 88c227958aSEmmanuel Vadot #define M4U_PORT_HW_VDEC_RG_CTRL_DMA_EXT MTK_M4U_ID(M4U_LARB3_ID, 10) 89c227958aSEmmanuel Vadot 90c227958aSEmmanuel Vadot #endif 91