1c3f1cfc7SEmmanuel VadotIngenic XBurst pin controller 2d5464ff1SEmmanuel Vadot 3d5464ff1SEmmanuel VadotPlease refer to pinctrl-bindings.txt in this directory for details of the 4d5464ff1SEmmanuel Vadotcommon pinctrl bindings used by client devices, including the meaning of the 5d5464ff1SEmmanuel Vadotphrase "pin configuration node". 6d5464ff1SEmmanuel Vadot 7c3f1cfc7SEmmanuel VadotFor the XBurst SoCs, pin control is tightly bound with GPIO ports. All pins may 8d5464ff1SEmmanuel Vadotbe used as GPIOs, multiplexed device functions are configured within the 9d5464ff1SEmmanuel VadotGPIO port configuration registers and it is typical to refer to pins using the 10d5464ff1SEmmanuel Vadotnaming scheme "PxN" where x is a character identifying the GPIO port with 11d5464ff1SEmmanuel Vadotwhich the pin is associated and N is an integer from 0 to 31 identifying the 12d5464ff1SEmmanuel Vadotpin within that GPIO port. For example PA0 is the first pin in GPIO port A, and 13937eaf8bSEmmanuel VadotPB31 is the last pin in GPIO port B. The jz4740, the x1000 and the x1830 14937eaf8bSEmmanuel Vadotcontains 4 GPIO ports, PA to PD, for a total of 128 pins. The jz4760, the 15937eaf8bSEmmanuel Vadotjz4770 and the jz4780 contains 6 GPIO ports, PA to PF, for a total of 192 pins. 16d5464ff1SEmmanuel Vadot 17d5464ff1SEmmanuel Vadot 18d5464ff1SEmmanuel VadotRequired properties: 19d5464ff1SEmmanuel Vadot-------------------- 20d5464ff1SEmmanuel Vadot 21d5464ff1SEmmanuel Vadot - compatible: One of: 22d5464ff1SEmmanuel Vadot - "ingenic,jz4740-pinctrl" 23a31d1ff1SEmmanuel Vadot - "ingenic,jz4725b-pinctrl" 24c3f1cfc7SEmmanuel Vadot - "ingenic,jz4760-pinctrl" 25c3f1cfc7SEmmanuel Vadot - "ingenic,jz4760b-pinctrl" 26d5464ff1SEmmanuel Vadot - "ingenic,jz4770-pinctrl" 27d5464ff1SEmmanuel Vadot - "ingenic,jz4780-pinctrl" 28c3f1cfc7SEmmanuel Vadot - "ingenic,x1000-pinctrl" 29c3f1cfc7SEmmanuel Vadot - "ingenic,x1000e-pinctrl" 30c3f1cfc7SEmmanuel Vadot - "ingenic,x1500-pinctrl" 31937eaf8bSEmmanuel Vadot - "ingenic,x1830-pinctrl" 32d5464ff1SEmmanuel Vadot - reg: Address range of the pinctrl registers. 33d5464ff1SEmmanuel Vadot 34d5464ff1SEmmanuel Vadot 35a31d1ff1SEmmanuel VadotRequired properties for sub-nodes (GPIO chips): 36a31d1ff1SEmmanuel Vadot----------------------------------------------- 37d5464ff1SEmmanuel Vadot 38a31d1ff1SEmmanuel Vadot - compatible: Must contain one of: 39a31d1ff1SEmmanuel Vadot - "ingenic,jz4740-gpio" 40c3f1cfc7SEmmanuel Vadot - "ingenic,jz4760-gpio" 41a31d1ff1SEmmanuel Vadot - "ingenic,jz4770-gpio" 42a31d1ff1SEmmanuel Vadot - "ingenic,jz4780-gpio" 43c3f1cfc7SEmmanuel Vadot - "ingenic,x1000-gpio" 44937eaf8bSEmmanuel Vadot - "ingenic,x1830-gpio" 45a31d1ff1SEmmanuel Vadot - reg: The GPIO bank number. 46a31d1ff1SEmmanuel Vadot - interrupt-controller: Marks the device node as an interrupt controller. 47a31d1ff1SEmmanuel Vadot - interrupts: Interrupt specifier for the controllers interrupt. 48a31d1ff1SEmmanuel Vadot - #interrupt-cells: Should be 2. Refer to 49a31d1ff1SEmmanuel Vadot ../interrupt-controller/interrupts.txt for more details. 50a31d1ff1SEmmanuel Vadot - gpio-controller: Marks the device node as a GPIO controller. 51a31d1ff1SEmmanuel Vadot - #gpio-cells: Should be 2. The first cell is the GPIO number and the second 52a31d1ff1SEmmanuel Vadot cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the 53a31d1ff1SEmmanuel Vadot GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported. 54a31d1ff1SEmmanuel Vadot - gpio-ranges: Range of pins managed by the GPIO controller. Refer to 55a31d1ff1SEmmanuel Vadot ../gpio/gpio.txt for more details. 56d5464ff1SEmmanuel Vadot 57d5464ff1SEmmanuel Vadot 58d5464ff1SEmmanuel VadotExample: 59d5464ff1SEmmanuel Vadot-------- 60d5464ff1SEmmanuel Vadot 61d5464ff1SEmmanuel Vadotpinctrl: pin-controller@10010000 { 62d5464ff1SEmmanuel Vadot compatible = "ingenic,jz4740-pinctrl"; 63d5464ff1SEmmanuel Vadot reg = <0x10010000 0x400>; 64a31d1ff1SEmmanuel Vadot #address-cells = <1>; 65a31d1ff1SEmmanuel Vadot #size-cells = <0>; 66a31d1ff1SEmmanuel Vadot 67a31d1ff1SEmmanuel Vadot gpa: gpio@0 { 68a31d1ff1SEmmanuel Vadot compatible = "ingenic,jz4740-gpio"; 69a31d1ff1SEmmanuel Vadot reg = <0>; 70a31d1ff1SEmmanuel Vadot 71a31d1ff1SEmmanuel Vadot gpio-controller; 72a31d1ff1SEmmanuel Vadot gpio-ranges = <&pinctrl 0 0 32>; 73a31d1ff1SEmmanuel Vadot #gpio-cells = <2>; 74a31d1ff1SEmmanuel Vadot 75a31d1ff1SEmmanuel Vadot interrupt-controller; 76a31d1ff1SEmmanuel Vadot #interrupt-cells = <2>; 77a31d1ff1SEmmanuel Vadot 78a31d1ff1SEmmanuel Vadot interrupt-parent = <&intc>; 79a31d1ff1SEmmanuel Vadot interrupts = <28>; 80a31d1ff1SEmmanuel Vadot }; 81d5464ff1SEmmanuel Vadot}; 82