xref: /src/sys/contrib/device-tree/Bindings/media/qcom,sdm660-camss.yaml (revision 68ad2b0d7af2a3571c4abac9afa712f9b09b721c) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/qcom,sdm660-camss.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm CAMSS ISP
8
9maintainers:
10  - Robert Foss <robert.foss@linaro.org>
11  - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
12
13description: |
14  The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms
15
16properties:
17  compatible:
18    const: qcom,sdm660-camss
19
20  clocks:
21    minItems: 42
22    maxItems: 42
23
24  clock-names:
25    items:
26      - const: ahb
27      - const: cphy_csid0
28      - const: cphy_csid1
29      - const: cphy_csid2
30      - const: cphy_csid3
31      - const: csi0_ahb
32      - const: csi0
33      - const: csi0_phy
34      - const: csi0_pix
35      - const: csi0_rdi
36      - const: csi1_ahb
37      - const: csi1
38      - const: csi1_phy
39      - const: csi1_pix
40      - const: csi1_rdi
41      - const: csi2_ahb
42      - const: csi2
43      - const: csi2_phy
44      - const: csi2_pix
45      - const: csi2_rdi
46      - const: csi3_ahb
47      - const: csi3
48      - const: csi3_phy
49      - const: csi3_pix
50      - const: csi3_rdi
51      - const: csiphy0_timer
52      - const: csiphy1_timer
53      - const: csiphy2_timer
54      - const: csiphy_ahb2crif
55      - const: csi_vfe0
56      - const: csi_vfe1
57      - const: ispif_ahb
58      - const: throttle_axi
59      - const: top_ahb
60      - const: vfe0_ahb
61      - const: vfe0
62      - const: vfe0_stream
63      - const: vfe1_ahb
64      - const: vfe1
65      - const: vfe1_stream
66      - const: vfe_ahb
67      - const: vfe_axi
68
69  interrupts:
70    minItems: 10
71    maxItems: 10
72
73  interrupt-names:
74    items:
75      - const: csid0
76      - const: csid1
77      - const: csid2
78      - const: csid3
79      - const: csiphy0
80      - const: csiphy1
81      - const: csiphy2
82      - const: ispif
83      - const: vfe0
84      - const: vfe1
85
86  interconnects:
87    maxItems: 1
88
89  interconnect-names:
90    items:
91      - const: vfe-mem
92
93  iommus:
94    maxItems: 4
95
96  power-domains:
97    items:
98      - description: VFE0 GDSC - Video Front End, Global Distributed Switch Controller.
99      - description: VFE1 GDSC - Video Front End, Global Distributed Switch Controller.
100
101  ports:
102    $ref: /schemas/graph.yaml#/properties/ports
103
104    description:
105      CSI input ports.
106
107    properties:
108      port@0:
109        $ref: /schemas/graph.yaml#/$defs/port-base
110        unevaluatedProperties: false
111        description:
112          Input port for receiving CSI data.
113
114        properties:
115          endpoint:
116            $ref: video-interfaces.yaml#
117            unevaluatedProperties: false
118
119            properties:
120              data-lanes:
121                minItems: 1
122                maxItems: 4
123
124              bus-type:
125                enum:
126                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY
127                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY
128
129            required:
130              - data-lanes
131
132      port@1:
133        $ref: /schemas/graph.yaml#/$defs/port-base
134        unevaluatedProperties: false
135        description:
136          Input port for receiving CSI data.
137
138        properties:
139          endpoint:
140            $ref: video-interfaces.yaml#
141            unevaluatedProperties: false
142
143            properties:
144              data-lanes:
145                minItems: 1
146                maxItems: 4
147
148              bus-type:
149                enum:
150                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY
151                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY
152
153            required:
154              - data-lanes
155
156      port@2:
157        $ref: /schemas/graph.yaml#/$defs/port-base
158        unevaluatedProperties: false
159        description:
160          Input port for receiving CSI data.
161
162        properties:
163          endpoint:
164            $ref: video-interfaces.yaml#
165            unevaluatedProperties: false
166
167            properties:
168              data-lanes:
169                minItems: 1
170                maxItems: 4
171
172              bus-type:
173                enum:
174                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY
175                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY
176
177            required:
178              - data-lanes
179
180      port@3:
181        $ref: /schemas/graph.yaml#/$defs/port-base
182        unevaluatedProperties: false
183        description:
184          Input port for receiving CSI data.
185
186        properties:
187          endpoint:
188            $ref: video-interfaces.yaml#
189            unevaluatedProperties: false
190
191            properties:
192              data-lanes:
193                minItems: 1
194                maxItems: 4
195
196              bus-type:
197                enum:
198                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY
199                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY
200
201            required:
202              - data-lanes
203
204  reg:
205    minItems: 14
206    maxItems: 14
207
208  reg-names:
209    items:
210      - const: csi_clk_mux
211      - const: csid0
212      - const: csid1
213      - const: csid2
214      - const: csid3
215      - const: csiphy0
216      - const: csiphy0_clk_mux
217      - const: csiphy1
218      - const: csiphy1_clk_mux
219      - const: csiphy2
220      - const: csiphy2_clk_mux
221      - const: ispif
222      - const: vfe0
223      - const: vfe1
224
225  vdda-supply:
226    description:
227      Definition of the regulator used as analog power supply.
228
229required:
230  - clock-names
231  - clocks
232  - compatible
233  - interrupt-names
234  - interrupts
235  - iommus
236  - power-domains
237  - reg
238  - reg-names
239  - vdda-supply
240
241additionalProperties: false
242
243examples:
244  - |
245    #include <dt-bindings/interrupt-controller/arm-gic.h>
246    #include <dt-bindings/clock/qcom,gcc-sdm660.h>
247    #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
248
249    camss: camss@ca00020 {
250      compatible = "qcom,sdm660-camss";
251
252      clocks = <&mmcc CAMSS_AHB_CLK>,
253        <&mmcc CAMSS_CPHY_CSID0_CLK>,
254        <&mmcc CAMSS_CPHY_CSID1_CLK>,
255        <&mmcc CAMSS_CPHY_CSID2_CLK>,
256        <&mmcc CAMSS_CPHY_CSID3_CLK>,
257        <&mmcc CAMSS_CSI0_AHB_CLK>,
258        <&mmcc CAMSS_CSI0_CLK>,
259        <&mmcc CAMSS_CPHY_CSID0_CLK>,
260        <&mmcc CAMSS_CSI0PIX_CLK>,
261        <&mmcc CAMSS_CSI0RDI_CLK>,
262        <&mmcc CAMSS_CSI1_AHB_CLK>,
263        <&mmcc CAMSS_CSI1_CLK>,
264        <&mmcc CAMSS_CPHY_CSID1_CLK>,
265        <&mmcc CAMSS_CSI1PIX_CLK>,
266        <&mmcc CAMSS_CSI1RDI_CLK>,
267        <&mmcc CAMSS_CSI2_AHB_CLK>,
268        <&mmcc CAMSS_CSI2_CLK>,
269        <&mmcc CAMSS_CPHY_CSID2_CLK>,
270        <&mmcc CAMSS_CSI2PIX_CLK>,
271        <&mmcc CAMSS_CSI2RDI_CLK>,
272        <&mmcc CAMSS_CSI3_AHB_CLK>,
273        <&mmcc CAMSS_CSI3_CLK>,
274        <&mmcc CAMSS_CPHY_CSID3_CLK>,
275        <&mmcc CAMSS_CSI3PIX_CLK>,
276        <&mmcc CAMSS_CSI3RDI_CLK>,
277        <&mmcc CAMSS_CSI0PHYTIMER_CLK>,
278        <&mmcc CAMSS_CSI1PHYTIMER_CLK>,
279        <&mmcc CAMSS_CSI2PHYTIMER_CLK>,
280        <&mmcc CSIPHY_AHB2CRIF_CLK>,
281        <&mmcc CAMSS_CSI_VFE0_CLK>,
282        <&mmcc CAMSS_CSI_VFE1_CLK>,
283        <&mmcc CAMSS_ISPIF_AHB_CLK>,
284        <&mmcc THROTTLE_CAMSS_AXI_CLK>,
285        <&mmcc CAMSS_TOP_AHB_CLK>,
286        <&mmcc CAMSS_VFE0_AHB_CLK>,
287        <&mmcc CAMSS_VFE0_CLK>,
288        <&mmcc CAMSS_VFE0_STREAM_CLK>,
289        <&mmcc CAMSS_VFE1_AHB_CLK>,
290        <&mmcc CAMSS_VFE1_CLK>,
291        <&mmcc CAMSS_VFE1_STREAM_CLK>,
292        <&mmcc CAMSS_VFE_VBIF_AHB_CLK>,
293        <&mmcc CAMSS_VFE_VBIF_AXI_CLK>;
294
295      clock-names = "ahb",
296        "cphy_csid0",
297        "cphy_csid1",
298        "cphy_csid2",
299        "cphy_csid3",
300        "csi0_ahb",
301        "csi0",
302        "csi0_phy",
303        "csi0_pix",
304        "csi0_rdi",
305        "csi1_ahb",
306        "csi1",
307        "csi1_phy",
308        "csi1_pix",
309        "csi1_rdi",
310        "csi2_ahb",
311        "csi2",
312        "csi2_phy",
313        "csi2_pix",
314        "csi2_rdi",
315        "csi3_ahb",
316        "csi3",
317        "csi3_phy",
318        "csi3_pix",
319        "csi3_rdi",
320        "csiphy0_timer",
321        "csiphy1_timer",
322        "csiphy2_timer",
323        "csiphy_ahb2crif",
324        "csi_vfe0",
325        "csi_vfe1",
326        "ispif_ahb",
327        "throttle_axi",
328        "top_ahb",
329        "vfe0_ahb",
330        "vfe0",
331        "vfe0_stream",
332        "vfe1_ahb",
333        "vfe1",
334        "vfe1_stream",
335        "vfe_ahb",
336        "vfe_axi";
337
338      interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>,
339        <GIC_SPI 297 IRQ_TYPE_EDGE_RISING>,
340        <GIC_SPI 298 IRQ_TYPE_EDGE_RISING>,
341        <GIC_SPI 299 IRQ_TYPE_EDGE_RISING>,
342        <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
343        <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
344        <GIC_SPI 80 IRQ_TYPE_EDGE_RISING>,
345        <GIC_SPI 309 IRQ_TYPE_EDGE_RISING>,
346        <GIC_SPI 314 IRQ_TYPE_EDGE_RISING>,
347        <GIC_SPI 315 IRQ_TYPE_EDGE_RISING>;
348
349      interrupt-names = "csid0",
350        "csid1",
351        "csid2",
352        "csid3",
353        "csiphy0",
354        "csiphy1",
355        "csiphy2",
356        "ispif",
357        "vfe0",
358        "vfe1";
359
360      iommus = <&mmss_smmu 0xc00>,
361        <&mmss_smmu 0xc01>,
362        <&mmss_smmu 0xc02>,
363        <&mmss_smmu 0xc03>;
364
365      power-domains = <&mmcc CAMSS_VFE0_GDSC>,
366        <&mmcc CAMSS_VFE1_GDSC>;
367
368      reg = <0x0ca00020 0x10>,
369        <0x0ca30000 0x100>,
370        <0x0ca30400 0x100>,
371        <0x0ca30800 0x100>,
372        <0x0ca30c00 0x100>,
373        <0x0c824000 0x1000>,
374        <0x0ca00120 0x4>,
375        <0x0c825000 0x1000>,
376        <0x0ca00124 0x4>,
377        <0x0c826000 0x1000>,
378        <0x0ca00128 0x4>,
379        <0x0ca31000 0x500>,
380        <0x0ca10000 0x1000>,
381        <0x0ca14000 0x1000>;
382
383      reg-names = "csi_clk_mux",
384        "csid0",
385        "csid1",
386        "csid2",
387        "csid3",
388        "csiphy0",
389        "csiphy0_clk_mux",
390        "csiphy1",
391        "csiphy1_clk_mux",
392        "csiphy2",
393        "csiphy2_clk_mux",
394        "ispif",
395        "vfe0",
396        "vfe1";
397
398      vdda-supply = <&reg_2v8>;
399
400      ports {
401        #address-cells = <1>;
402        #size-cells = <0>;
403      };
404    };
405