1ff018dbfSEmmanuel VadotMarvell Armada 7K/8K PIC Interrupt controller 2ff018dbfSEmmanuel Vadot--------------------------------------------- 3ff018dbfSEmmanuel Vadot 4ff018dbfSEmmanuel VadotThis is the Device Tree binding for the PIC, a secondary interrupt 5ff018dbfSEmmanuel Vadotcontroller available on the Marvell Armada 7K/8K ARM64 SoCs, and 6ff018dbfSEmmanuel Vadottypically connected to the GIC as the primary interrupt controller. 7ff018dbfSEmmanuel Vadot 8ff018dbfSEmmanuel VadotRequired properties: 9ff018dbfSEmmanuel Vadot- compatible: should be "marvell,armada-8k-pic" 10ff018dbfSEmmanuel Vadot- interrupt-controller: identifies the node as an interrupt controller 11ff018dbfSEmmanuel Vadot- #interrupt-cells: the number of cells to define interrupts on this 12ff018dbfSEmmanuel Vadot controller. Should be 1 13ff018dbfSEmmanuel Vadot- reg: the register area for the PIC interrupt controller 14ff018dbfSEmmanuel Vadot- interrupts: the interrupt to the primary interrupt controller, 15ff018dbfSEmmanuel Vadot typically the GIC 16ff018dbfSEmmanuel Vadot 17ff018dbfSEmmanuel VadotExample: 18ff018dbfSEmmanuel Vadot 19ff018dbfSEmmanuel Vadot pic: interrupt-controller@3f0100 { 20ff018dbfSEmmanuel Vadot compatible = "marvell,armada-8k-pic"; 21ff018dbfSEmmanuel Vadot reg = <0x3f0100 0x10>; 22ff018dbfSEmmanuel Vadot #interrupt-cells = <1>; 23ff018dbfSEmmanuel Vadot interrupt-controller; 24ff018dbfSEmmanuel Vadot interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>; 25ff018dbfSEmmanuel Vadot }; 26