1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/iio/frequency/adf4371.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Analog Devices ADF4371/ADF4372 Wideband Synthesizers 8 9maintainers: 10 - Popa Stefan <stefan.popa@analog.com> 11 12description: | 13 Analog Devices ADF4371/ADF4372 SPI Wideband Synthesizers 14 https://www.analog.com/media/en/technical-documentation/data-sheets/adf4371.pdf 15 https://www.analog.com/media/en/technical-documentation/data-sheets/adf4372.pdf 16 17properties: 18 compatible: 19 enum: 20 - adi,adf4371 21 - adi,adf4372 22 23 reg: 24 maxItems: 1 25 26 clocks: 27 description: 28 Definition of the external clock (see clock/clock-bindings.txt) 29 maxItems: 1 30 31 clock-names: 32 description: 33 Must be "clkin" 34 maxItems: 1 35 36 adi,mute-till-lock-en: 37 type: boolean 38 description: 39 If this property is present, then the supply current to RF8P and RF8N 40 output stage will shut down until the ADF4371/ADF4372 achieves lock as 41 measured by the digital lock detect circuitry. 42 43 spi-max-frequency: true 44 45required: 46 - compatible 47 - reg 48 - clocks 49 - clock-names 50 51additionalProperties: false 52 53examples: 54 - | 55 spi0 { 56 #address-cells = <1>; 57 #size-cells = <0>; 58 59 frequency@0 { 60 compatible = "adi,adf4371"; 61 reg = <0>; 62 spi-max-frequency = <1000000>; 63 clocks = <&adf4371_clkin>; 64 clock-names = "clkin"; 65 }; 66 }; 67... 68