xref: /src/sys/contrib/device-tree/Bindings/gpio/apm,xgene-gpio-sb.yaml (revision bc531a96c9b28b1cabcd5deb0c9f8f6d815cfebc) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/apm,xgene-gpio-sb.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: APM X-Gene Standby GPIO controller
8
9maintainers:
10  - Khuong Dinh <khuong@os.amperecomputing.com>
11
12description: |
13  This is a gpio controller in the standby domain. It also supports interrupt in
14  some particular pins which are sourced to its parent interrupt controller
15  as diagram below:
16                                +-----------------+
17                                | X-Gene standby  |
18                                | GPIO controller +------ GPIO_0
19    +------------+              |                 | ...
20    | Parent IRQ | EXT_INT_0    |                 +------ GPIO_8/EXT_INT_0
21    | controller | (SPI40)      |                 | ...
22    | (GICv2)    +--------------+                 +------ GPIO_[N+8]/EXT_INT_N
23    |            |   ...        |                 |
24    |            | EXT_INT_N    |                 +------ GPIO_[N+9]
25    |            | (SPI[40 + N])|                 | ...
26    |            +--------------+                 +------ GPIO_MAX
27    +------------+              +-----------------+
28
29properties:
30  compatible:
31    const: apm,xgene-gpio-sb
32
33  reg:
34    maxItems: 1
35
36  '#gpio-cells':
37    const: 2
38
39  gpio-controller: true
40
41  interrupts:
42    description:
43      List of interrupt specifiers for EXT_INT_0 through EXT_INT_N. The first
44      entry must correspond to EXT_INT_0.
45
46  '#interrupt-cells':
47    const: 2
48    description:
49      First cell selects EXT_INT_N (0-N), second cell specifies flags
50
51  interrupt-controller: true
52
53  apm,nr-gpios:
54    $ref: /schemas/types.yaml#/definitions/uint32
55    description: Number of GPIO pins
56
57  apm,nr-irqs:
58    $ref: /schemas/types.yaml#/definitions/uint32
59    description: Number of interrupt pins
60
61  apm,irq-start:
62    $ref: /schemas/types.yaml#/definitions/uint32
63    description: Lowest GPIO pin supporting interrupts
64
65required:
66  - compatible
67  - reg
68  - '#gpio-cells'
69  - gpio-controller
70  - interrupts
71  - '#interrupt-cells'
72  - interrupt-controller
73
74additionalProperties: false
75
76examples:
77  - |
78    gpio@17001000 {
79        compatible = "apm,xgene-gpio-sb";
80        reg = <0x17001000 0x400>;
81        #gpio-cells = <2>;
82        gpio-controller;
83        interrupts = <0x0 0x28 0x1>,
84                     <0x0 0x29 0x1>,
85                     <0x0 0x2a 0x1>,
86                     <0x0 0x2b 0x1>,
87                     <0x0 0x2c 0x1>,
88                     <0x0 0x2d 0x1>;
89        #interrupt-cells = <2>;
90        interrupt-controller;
91        apm,nr-gpios = <22>;
92        apm,nr-irqs = <6>;
93        apm,irq-start = <8>;
94    };
95