xref: /src/sys/contrib/device-tree/Bindings/display/mediatek/mediatek,padding.yaml (revision ae5de77ed78ae54d86cead5604869212e8008e6b)
148aa10e0SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
248aa10e0SEmmanuel Vadot%YAML 1.2
348aa10e0SEmmanuel Vadot---
448aa10e0SEmmanuel Vadot$id: http://devicetree.org/schemas/display/mediatek/mediatek,padding.yaml#
548aa10e0SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml#
648aa10e0SEmmanuel Vadot
748aa10e0SEmmanuel Vadottitle: MediaTek Display Padding
848aa10e0SEmmanuel Vadot
948aa10e0SEmmanuel Vadotmaintainers:
1048aa10e0SEmmanuel Vadot  - Chun-Kuang Hu <chunkuang.hu@kernel.org>
1148aa10e0SEmmanuel Vadot  - Philipp Zabel <p.zabel@pengutronix.de>
1248aa10e0SEmmanuel Vadot
1348aa10e0SEmmanuel Vadotdescription:
1448aa10e0SEmmanuel Vadot  Padding provides ability to add pixels to width and height of a layer with
1548aa10e0SEmmanuel Vadot  specified colors. Due to hardware design, Mixer in VDOSYS1 requires
1648aa10e0SEmmanuel Vadot  width of a layer to be 2-pixel-align, or 4-pixel-align when ETHDR is enabled,
1748aa10e0SEmmanuel Vadot  we need Padding to deal with odd width.
1848aa10e0SEmmanuel Vadot  Please notice that even if the Padding is in bypass mode, settings in
1948aa10e0SEmmanuel Vadot  register must be cleared to 0, or undefined behaviors could happen.
2048aa10e0SEmmanuel Vadot
2148aa10e0SEmmanuel Vadotproperties:
2248aa10e0SEmmanuel Vadot  compatible:
23b8aada78SEmmanuel Vadot    oneOf:
24b8aada78SEmmanuel Vadot      - enum:
2548aa10e0SEmmanuel Vadot          - mediatek,mt8188-disp-padding
2648aa10e0SEmmanuel Vadot          - mediatek,mt8195-mdp3-padding
27b8aada78SEmmanuel Vadot      - items:
28b8aada78SEmmanuel Vadot          - const: mediatek,mt8188-mdp3-padding
29b8aada78SEmmanuel Vadot          - const: mediatek,mt8195-mdp3-padding
3048aa10e0SEmmanuel Vadot
3148aa10e0SEmmanuel Vadot  reg:
3248aa10e0SEmmanuel Vadot    maxItems: 1
3348aa10e0SEmmanuel Vadot
3448aa10e0SEmmanuel Vadot  power-domains:
3548aa10e0SEmmanuel Vadot    maxItems: 1
3648aa10e0SEmmanuel Vadot
3748aa10e0SEmmanuel Vadot  clocks:
3848aa10e0SEmmanuel Vadot    items:
3948aa10e0SEmmanuel Vadot      - description: Padding's clocks
4048aa10e0SEmmanuel Vadot
4148aa10e0SEmmanuel Vadot  mediatek,gce-client-reg:
4248aa10e0SEmmanuel Vadot    description:
4348aa10e0SEmmanuel Vadot      GCE (Global Command Engine) is a multi-core micro processor that helps
4448aa10e0SEmmanuel Vadot      its clients to execute commands without interrupting CPU. This property
4548aa10e0SEmmanuel Vadot      describes GCE client's information that is composed by 4 fields.
4648aa10e0SEmmanuel Vadot      1. Phandle of the GCE (there may be several GCE processors)
4748aa10e0SEmmanuel Vadot      2. Sub-system ID defined in the dt-binding like a user ID
4848aa10e0SEmmanuel Vadot         (Please refer to include/dt-bindings/gce/<chip>-gce.h)
4948aa10e0SEmmanuel Vadot      3. Offset from base address of the subsys you are at
5048aa10e0SEmmanuel Vadot      4. Size of the register the client needs
5148aa10e0SEmmanuel Vadot    $ref: /schemas/types.yaml#/definitions/phandle-array
5248aa10e0SEmmanuel Vadot    items:
5348aa10e0SEmmanuel Vadot      items:
5448aa10e0SEmmanuel Vadot        - description: Phandle of the GCE
5548aa10e0SEmmanuel Vadot        - description: Subsys ID defined in the dt-binding
5648aa10e0SEmmanuel Vadot        - description: Offset from base address of the subsys
5748aa10e0SEmmanuel Vadot        - description: Size of register
5848aa10e0SEmmanuel Vadot    maxItems: 1
5948aa10e0SEmmanuel Vadot
6048aa10e0SEmmanuel Vadotrequired:
6148aa10e0SEmmanuel Vadot  - compatible
6248aa10e0SEmmanuel Vadot  - reg
6348aa10e0SEmmanuel Vadot  - power-domains
6448aa10e0SEmmanuel Vadot  - clocks
6548aa10e0SEmmanuel Vadot  - mediatek,gce-client-reg
6648aa10e0SEmmanuel Vadot
6748aa10e0SEmmanuel VadotadditionalProperties: false
6848aa10e0SEmmanuel Vadot
6948aa10e0SEmmanuel Vadotexamples:
7048aa10e0SEmmanuel Vadot  - |
7148aa10e0SEmmanuel Vadot    #include <dt-bindings/interrupt-controller/arm-gic.h>
7248aa10e0SEmmanuel Vadot    #include <dt-bindings/clock/mediatek,mt8188-clk.h>
7348aa10e0SEmmanuel Vadot    #include <dt-bindings/power/mediatek,mt8188-power.h>
7448aa10e0SEmmanuel Vadot    #include <dt-bindings/gce/mt8195-gce.h>
7548aa10e0SEmmanuel Vadot
7648aa10e0SEmmanuel Vadot    soc {
7748aa10e0SEmmanuel Vadot        #address-cells = <2>;
7848aa10e0SEmmanuel Vadot        #size-cells = <2>;
7948aa10e0SEmmanuel Vadot
8048aa10e0SEmmanuel Vadot        padding0: padding@1c11d000 {
8148aa10e0SEmmanuel Vadot            compatible = "mediatek,mt8188-disp-padding";
8248aa10e0SEmmanuel Vadot            reg = <0 0x1c11d000 0 0x1000>;
8348aa10e0SEmmanuel Vadot            clocks = <&vdosys1 CLK_VDO1_PADDING0>;
8448aa10e0SEmmanuel Vadot            power-domains = <&spm MT8188_POWER_DOMAIN_VDOSYS1>;
8548aa10e0SEmmanuel Vadot            mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0xd000 0x1000>;
8648aa10e0SEmmanuel Vadot        };
8748aa10e0SEmmanuel Vadot    };
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