xref: /src/sys/contrib/device-tree/Bindings/clock/sprd,sc9860-clk.txt (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71)
15df7ea33SEmmanuel VadotSpreadtrum SC9860 Clock Binding
229087c4eSEmmanuel Vadot------------------------
329087c4eSEmmanuel Vadot
429087c4eSEmmanuel VadotRequired properties:
529087c4eSEmmanuel Vadot- compatible: should contain the following compatible strings:
629087c4eSEmmanuel Vadot	- "sprd,sc9860-pmu-gate"
729087c4eSEmmanuel Vadot	- "sprd,sc9860-pll"
829087c4eSEmmanuel Vadot	- "sprd,sc9860-ap-clk"
929087c4eSEmmanuel Vadot	- "sprd,sc9860-aon-prediv"
1029087c4eSEmmanuel Vadot	- "sprd,sc9860-apahb-gate"
1129087c4eSEmmanuel Vadot	- "sprd,sc9860-aon-gate"
1229087c4eSEmmanuel Vadot	- "sprd,sc9860-aonsecure-clk"
1329087c4eSEmmanuel Vadot	- "sprd,sc9860-agcp-gate"
1429087c4eSEmmanuel Vadot	- "sprd,sc9860-gpu-clk"
1529087c4eSEmmanuel Vadot	- "sprd,sc9860-vsp-clk"
1629087c4eSEmmanuel Vadot	- "sprd,sc9860-vsp-gate"
1729087c4eSEmmanuel Vadot	- "sprd,sc9860-cam-clk"
1829087c4eSEmmanuel Vadot	- "sprd,sc9860-cam-gate"
1929087c4eSEmmanuel Vadot	- "sprd,sc9860-disp-clk"
2029087c4eSEmmanuel Vadot	- "sprd,sc9860-disp-gate"
2129087c4eSEmmanuel Vadot	- "sprd,sc9860-apapb-gate"
2229087c4eSEmmanuel Vadot
2329087c4eSEmmanuel Vadot- #clock-cells: must be 1
2429087c4eSEmmanuel Vadot
2529087c4eSEmmanuel Vadot- clocks : Should be the input parent clock(s) phandle for the clock, this
2629087c4eSEmmanuel Vadot	   property here just simply shows which clock group the clocks'
2729087c4eSEmmanuel Vadot	   parents are in, since each clk node would represent many clocks
2829087c4eSEmmanuel Vadot	   which are defined in the driver.  The detailed dependency
2929087c4eSEmmanuel Vadot	   relationship (i.e. how many parents and which are the parents)
3029087c4eSEmmanuel Vadot	   are implemented in driver code.
3129087c4eSEmmanuel Vadot
3229087c4eSEmmanuel VadotOptional properties:
3329087c4eSEmmanuel Vadot
3429087c4eSEmmanuel Vadot- reg:	Contain the registers base address and length. It must be configured
3529087c4eSEmmanuel Vadot	only if no 'sprd,syscon' under the node.
3629087c4eSEmmanuel Vadot
3729087c4eSEmmanuel Vadot- sprd,syscon: phandle to the syscon which is in the same address area with
3829087c4eSEmmanuel Vadot	       the clock, and so we can get regmap for the clocks from the
3929087c4eSEmmanuel Vadot	       syscon device.
4029087c4eSEmmanuel Vadot
4129087c4eSEmmanuel VadotExample:
4229087c4eSEmmanuel Vadot
4329087c4eSEmmanuel Vadot	pmu_gate: pmu-gate {
4429087c4eSEmmanuel Vadot		compatible = "sprd,sc9860-pmu-gate";
4529087c4eSEmmanuel Vadot		sprd,syscon = <&pmu_regs>;
4629087c4eSEmmanuel Vadot		clocks = <&ext_26m>;
4729087c4eSEmmanuel Vadot		#clock-cells = <1>;
4829087c4eSEmmanuel Vadot	};
4929087c4eSEmmanuel Vadot
5029087c4eSEmmanuel Vadot	pll: pll {
5129087c4eSEmmanuel Vadot		compatible = "sprd,sc9860-pll";
5229087c4eSEmmanuel Vadot		sprd,syscon = <&ana_regs>;
5329087c4eSEmmanuel Vadot		clocks = <&pmu_gate 0>;
5429087c4eSEmmanuel Vadot		#clock-cells = <1>;
5529087c4eSEmmanuel Vadot	};
5629087c4eSEmmanuel Vadot
5729087c4eSEmmanuel Vadot	ap_clk: clock-controller@20000000 {
5829087c4eSEmmanuel Vadot		compatible = "sprd,sc9860-ap-clk";
5929087c4eSEmmanuel Vadot		reg = <0 0x20000000 0 0x400>;
6029087c4eSEmmanuel Vadot		clocks = <&ext_26m>, <&pll 0>,
6129087c4eSEmmanuel Vadot			 <&pmu_gate 0>;
6229087c4eSEmmanuel Vadot		#clock-cells = <1>;
6329087c4eSEmmanuel Vadot	};
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