xref: /src/sys/contrib/device-tree/Bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml (revision bc531a96c9b28b1cabcd5deb0c9f8f6d815cfebc) 
1# SPDX-License-Identifier: GPL-2.0+
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/allwinner,sun8i-a83t-de2-clk.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner A83t Display Engine 2/3 Clock Controller
8
9maintainers:
10  - Chen-Yu Tsai <wens@csie.org>
11  - Maxime Ripard <mripard@kernel.org>
12
13properties:
14  "#clock-cells":
15    const: 1
16
17  "#reset-cells":
18    const: 1
19
20  compatible:
21    oneOf:
22      - const: allwinner,sun8i-a83t-de2-clk
23      - const: allwinner,sun8i-h3-de2-clk
24      - const: allwinner,sun8i-v3s-de2-clk
25      - const: allwinner,sun50i-a64-de2-clk
26      - const: allwinner,sun50i-h5-de2-clk
27      - const: allwinner,sun50i-h6-de3-clk
28      - const: allwinner,sun50i-h616-de33-clk
29      - items:
30          - const: allwinner,sun8i-r40-de2-clk
31          - const: allwinner,sun8i-h3-de2-clk
32      - items:
33          - const: allwinner,sun20i-d1-de2-clk
34          - const: allwinner,sun50i-h5-de2-clk
35
36  reg:
37    maxItems: 1
38
39  clocks:
40    items:
41      - description: Bus Clock
42      - description: Module Clock
43
44  clock-names:
45    items:
46      - const: bus
47      - const: mod
48
49  resets:
50    maxItems: 1
51
52required:
53  - "#clock-cells"
54  - "#reset-cells"
55  - compatible
56  - reg
57  - clocks
58  - clock-names
59  - resets
60
61additionalProperties: false
62
63examples:
64  - |
65    #include <dt-bindings/clock/sun8i-h3-ccu.h>
66    #include <dt-bindings/reset/sun8i-h3-ccu.h>
67
68    de2_clocks: clock@1000000 {
69        compatible = "allwinner,sun8i-h3-de2-clk";
70        reg = <0x01000000 0x100000>;
71        clocks = <&ccu CLK_BUS_DE>,
72                 <&ccu CLK_DE>;
73        clock-names = "bus",
74                      "mod";
75        resets = <&ccu RST_BUS_DE>;
76        #clock-cells = <1>;
77        #reset-cells = <1>;
78    };
79
80...
81