1766f5c51SRuslan Bukin /* 285f87cf4SRuslan Bukin * Copyright (c) 2016-2019, Intel Corporation 3766f5c51SRuslan Bukin * 4766f5c51SRuslan Bukin * Redistribution and use in source and binary forms, with or without 5766f5c51SRuslan Bukin * modification, are permitted provided that the following conditions are met: 6766f5c51SRuslan Bukin * 7766f5c51SRuslan Bukin * * Redistributions of source code must retain the above copyright notice, 8766f5c51SRuslan Bukin * this list of conditions and the following disclaimer. 9766f5c51SRuslan Bukin * * Redistributions in binary form must reproduce the above copyright notice, 10766f5c51SRuslan Bukin * this list of conditions and the following disclaimer in the documentation 11766f5c51SRuslan Bukin * and/or other materials provided with the distribution. 12766f5c51SRuslan Bukin * * Neither the name of Intel Corporation nor the names of its contributors 13766f5c51SRuslan Bukin * may be used to endorse or promote products derived from this software 14766f5c51SRuslan Bukin * without specific prior written permission. 15766f5c51SRuslan Bukin * 16766f5c51SRuslan Bukin * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17766f5c51SRuslan Bukin * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18766f5c51SRuslan Bukin * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19766f5c51SRuslan Bukin * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 20766f5c51SRuslan Bukin * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21766f5c51SRuslan Bukin * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22766f5c51SRuslan Bukin * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23766f5c51SRuslan Bukin * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24766f5c51SRuslan Bukin * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25766f5c51SRuslan Bukin * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26766f5c51SRuslan Bukin * POSSIBILITY OF SUCH DAMAGE. 27766f5c51SRuslan Bukin */ 28766f5c51SRuslan Bukin 29766f5c51SRuslan Bukin #ifndef PT_BLOCK_DECODER_H 30766f5c51SRuslan Bukin #define PT_BLOCK_DECODER_H 31766f5c51SRuslan Bukin 32766f5c51SRuslan Bukin #include "pt_query_decoder.h" 33766f5c51SRuslan Bukin #include "pt_image.h" 34766f5c51SRuslan Bukin #include "pt_retstack.h" 35766f5c51SRuslan Bukin #include "pt_ild.h" 36766f5c51SRuslan Bukin #include "pt_msec_cache.h" 37766f5c51SRuslan Bukin 38766f5c51SRuslan Bukin 39766f5c51SRuslan Bukin /* A block decoder. 40766f5c51SRuslan Bukin * 41766f5c51SRuslan Bukin * It decodes Intel(R) Processor Trace into a sequence of instruction blocks 42766f5c51SRuslan Bukin * such that the instructions in each block can be decoded without further need 43766f5c51SRuslan Bukin * of trace. 44766f5c51SRuslan Bukin */ 45766f5c51SRuslan Bukin struct pt_block_decoder { 46766f5c51SRuslan Bukin /* The Intel(R) Processor Trace query decoder. */ 47766f5c51SRuslan Bukin struct pt_query_decoder query; 48766f5c51SRuslan Bukin 49766f5c51SRuslan Bukin /* The configuration flags. 50766f5c51SRuslan Bukin * 51766f5c51SRuslan Bukin * Those are our flags set by the user. In @query.config.flags, we set 52766f5c51SRuslan Bukin * the flags we need for the query decoder. 53766f5c51SRuslan Bukin */ 54766f5c51SRuslan Bukin struct pt_conf_flags flags; 55766f5c51SRuslan Bukin 56766f5c51SRuslan Bukin /* The default image. */ 57766f5c51SRuslan Bukin struct pt_image default_image; 58766f5c51SRuslan Bukin 59766f5c51SRuslan Bukin /* The image. */ 60766f5c51SRuslan Bukin struct pt_image *image; 61766f5c51SRuslan Bukin 62766f5c51SRuslan Bukin /* The current cached section. */ 63766f5c51SRuslan Bukin struct pt_msec_cache scache; 64766f5c51SRuslan Bukin 65766f5c51SRuslan Bukin /* The current address space. */ 66766f5c51SRuslan Bukin struct pt_asid asid; 67766f5c51SRuslan Bukin 68766f5c51SRuslan Bukin /* The current Intel(R) Processor Trace event. */ 69766f5c51SRuslan Bukin struct pt_event event; 70766f5c51SRuslan Bukin 71766f5c51SRuslan Bukin /* The call/return stack for ret compression. */ 72766f5c51SRuslan Bukin struct pt_retstack retstack; 73766f5c51SRuslan Bukin 74766f5c51SRuslan Bukin /* The current instruction. 75766f5c51SRuslan Bukin * 76766f5c51SRuslan Bukin * This is only valid if @process_insn is set. 77766f5c51SRuslan Bukin */ 78766f5c51SRuslan Bukin struct pt_insn insn; 79766f5c51SRuslan Bukin struct pt_insn_ext iext; 80766f5c51SRuslan Bukin 81766f5c51SRuslan Bukin /* The start IP of the next block. 82766f5c51SRuslan Bukin * 83766f5c51SRuslan Bukin * If tracing is disabled, this is the IP at which we assume tracing to 84766f5c51SRuslan Bukin * be resumed. 85766f5c51SRuslan Bukin */ 86766f5c51SRuslan Bukin uint64_t ip; 87766f5c51SRuslan Bukin 88766f5c51SRuslan Bukin /* The current execution mode. */ 89766f5c51SRuslan Bukin enum pt_exec_mode mode; 90766f5c51SRuslan Bukin 91766f5c51SRuslan Bukin /* The status of the last successful decoder query. 92766f5c51SRuslan Bukin * 93766f5c51SRuslan Bukin * Errors are reported directly; the status is always a non-negative 94766f5c51SRuslan Bukin * pt_status_flag bit-vector. 95766f5c51SRuslan Bukin */ 96766f5c51SRuslan Bukin int status; 97766f5c51SRuslan Bukin 98766f5c51SRuslan Bukin /* A collection of flags defining how to proceed flow reconstruction: 99766f5c51SRuslan Bukin * 100766f5c51SRuslan Bukin * - tracing is enabled. 101766f5c51SRuslan Bukin */ 102766f5c51SRuslan Bukin uint32_t enabled:1; 103766f5c51SRuslan Bukin 104766f5c51SRuslan Bukin /* - process @event. */ 105766f5c51SRuslan Bukin uint32_t process_event:1; 106766f5c51SRuslan Bukin 107766f5c51SRuslan Bukin /* - instructions are executed speculatively. */ 108766f5c51SRuslan Bukin uint32_t speculative:1; 109766f5c51SRuslan Bukin 110766f5c51SRuslan Bukin /* - process @insn/@iext. 111766f5c51SRuslan Bukin * 112766f5c51SRuslan Bukin * We have started processing events binding to @insn/@iext. The 113766f5c51SRuslan Bukin * instruction has been accounted for in the previous block, but we 114766f5c51SRuslan Bukin * have not yet proceeded past it. 115766f5c51SRuslan Bukin * 116766f5c51SRuslan Bukin * We will do so in pt_blk_event() after processing all events that 117766f5c51SRuslan Bukin * bind to it. 118766f5c51SRuslan Bukin */ 119766f5c51SRuslan Bukin uint32_t process_insn:1; 120766f5c51SRuslan Bukin 121766f5c51SRuslan Bukin /* - a paging event has already been bound to @insn/@iext. */ 122766f5c51SRuslan Bukin uint32_t bound_paging:1; 123766f5c51SRuslan Bukin 124766f5c51SRuslan Bukin /* - a vmcs event has already been bound to @insn/@iext. */ 125766f5c51SRuslan Bukin uint32_t bound_vmcs:1; 126766f5c51SRuslan Bukin 127766f5c51SRuslan Bukin /* - a ptwrite event has already been bound to @insn/@iext. */ 128766f5c51SRuslan Bukin uint32_t bound_ptwrite:1; 129766f5c51SRuslan Bukin }; 130766f5c51SRuslan Bukin 131766f5c51SRuslan Bukin 132766f5c51SRuslan Bukin /* Initialize a block decoder. 133766f5c51SRuslan Bukin * 134766f5c51SRuslan Bukin * Returns zero on success; a negative error code otherwise. 135766f5c51SRuslan Bukin * Returns -pte_internal, if @decoder or @config is NULL. 136766f5c51SRuslan Bukin */ 137766f5c51SRuslan Bukin extern int pt_blk_decoder_init(struct pt_block_decoder *decoder, 138766f5c51SRuslan Bukin const struct pt_config *config); 139766f5c51SRuslan Bukin 140766f5c51SRuslan Bukin /* Finalize a block decoder. */ 141766f5c51SRuslan Bukin extern void pt_blk_decoder_fini(struct pt_block_decoder *decoder); 142766f5c51SRuslan Bukin 143766f5c51SRuslan Bukin #endif /* PT_BLOCK_DECODER_H */ 144