1cfca06d7SDimitry Andric //===-- WebAssemblyDebugFixup.cpp - Debug Fixup ------------------===//
2cfca06d7SDimitry Andric //
3cfca06d7SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4cfca06d7SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
5cfca06d7SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6cfca06d7SDimitry Andric //
7cfca06d7SDimitry Andric //===----------------------------------------------------------------------===//
8cfca06d7SDimitry Andric ///
9cfca06d7SDimitry Andric /// \file
10cfca06d7SDimitry Andric /// Several prior passes may "stackify" registers, here we ensure any references
11cfca06d7SDimitry Andric /// in such registers in debug_value instructions become stack relative also.
12cfca06d7SDimitry Andric /// This is done in a separate pass such that not all previous passes need to
13cfca06d7SDimitry Andric /// track stack depth when values get stackified.
14cfca06d7SDimitry Andric ///
15cfca06d7SDimitry Andric //===----------------------------------------------------------------------===//
16cfca06d7SDimitry Andric
17cfca06d7SDimitry Andric #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
18cfca06d7SDimitry Andric #include "WebAssembly.h"
19cfca06d7SDimitry Andric #include "WebAssemblyMachineFunctionInfo.h"
20cfca06d7SDimitry Andric #include "WebAssemblySubtarget.h"
21b1c73532SDimitry Andric #include "WebAssemblyUtilities.h"
22cfca06d7SDimitry Andric #include "llvm/ADT/SCCIterator.h"
23cfca06d7SDimitry Andric #include "llvm/CodeGen/MachineFrameInfo.h"
24cfca06d7SDimitry Andric #include "llvm/CodeGen/MachineFunction.h"
25cfca06d7SDimitry Andric #include "llvm/CodeGen/MachineInstrBuilder.h"
26cfca06d7SDimitry Andric #include "llvm/CodeGen/MachineLoopInfo.h"
27cfca06d7SDimitry Andric #include "llvm/CodeGen/MachineRegisterInfo.h"
28cfca06d7SDimitry Andric #include "llvm/CodeGen/Passes.h"
29cfca06d7SDimitry Andric #include "llvm/Support/Debug.h"
30cfca06d7SDimitry Andric #include "llvm/Support/raw_ostream.h"
31cfca06d7SDimitry Andric using namespace llvm;
32cfca06d7SDimitry Andric
33cfca06d7SDimitry Andric #define DEBUG_TYPE "wasm-debug-fixup"
34cfca06d7SDimitry Andric
35cfca06d7SDimitry Andric namespace {
36cfca06d7SDimitry Andric class WebAssemblyDebugFixup final : public MachineFunctionPass {
getPassName() const37cfca06d7SDimitry Andric StringRef getPassName() const override { return "WebAssembly Debug Fixup"; }
38cfca06d7SDimitry Andric
getAnalysisUsage(AnalysisUsage & AU) const39cfca06d7SDimitry Andric void getAnalysisUsage(AnalysisUsage &AU) const override {
40cfca06d7SDimitry Andric AU.setPreservesCFG();
41cfca06d7SDimitry Andric MachineFunctionPass::getAnalysisUsage(AU);
42cfca06d7SDimitry Andric }
43cfca06d7SDimitry Andric
44cfca06d7SDimitry Andric bool runOnMachineFunction(MachineFunction &MF) override;
45cfca06d7SDimitry Andric
46cfca06d7SDimitry Andric public:
47cfca06d7SDimitry Andric static char ID; // Pass identification, replacement for typeid
WebAssemblyDebugFixup()48cfca06d7SDimitry Andric WebAssemblyDebugFixup() : MachineFunctionPass(ID) {}
49cfca06d7SDimitry Andric };
50cfca06d7SDimitry Andric } // end anonymous namespace
51cfca06d7SDimitry Andric
52cfca06d7SDimitry Andric char WebAssemblyDebugFixup::ID = 0;
53cfca06d7SDimitry Andric INITIALIZE_PASS(
54cfca06d7SDimitry Andric WebAssemblyDebugFixup, DEBUG_TYPE,
55cfca06d7SDimitry Andric "Ensures debug_value's that have been stackified become stack relative",
56cfca06d7SDimitry Andric false, false)
57cfca06d7SDimitry Andric
createWebAssemblyDebugFixup()58cfca06d7SDimitry Andric FunctionPass *llvm::createWebAssemblyDebugFixup() {
59cfca06d7SDimitry Andric return new WebAssemblyDebugFixup();
60cfca06d7SDimitry Andric }
61cfca06d7SDimitry Andric
62e3b55780SDimitry Andric // At this very end of the compilation pipeline, if any DBG_VALUEs with
63e3b55780SDimitry Andric // registers remain, it means they are dangling info which we failed to update
64e3b55780SDimitry Andric // when their corresponding def instruction was transformed/moved/splitted etc.
65e3b55780SDimitry Andric // Because Wasm cannot access values in LLVM virtual registers in the debugger,
66e3b55780SDimitry Andric // these dangling DBG_VALUEs in effect kill the effect of any previous DBG_VALUE
67e3b55780SDimitry Andric // associated with the variable, which will appear as "optimized out".
setDanglingDebugValuesUndef(MachineBasicBlock & MBB,const TargetInstrInfo * TII)687fa27ce4SDimitry Andric static void setDanglingDebugValuesUndef(MachineBasicBlock &MBB,
69e3b55780SDimitry Andric const TargetInstrInfo *TII) {
70e3b55780SDimitry Andric for (auto &MI : llvm::make_early_inc_range(MBB)) {
71e3b55780SDimitry Andric if (MI.isDebugValue() && MI.getDebugOperand(0).isReg() &&
72e3b55780SDimitry Andric !MI.isUndefDebugValue()) {
737fa27ce4SDimitry Andric LLVM_DEBUG(dbgs() << "Warning: dangling DBG_VALUE set to undef: " << MI
74e3b55780SDimitry Andric << "\n");
757fa27ce4SDimitry Andric MI.setDebugValueUndef();
76e3b55780SDimitry Andric }
77e3b55780SDimitry Andric }
78e3b55780SDimitry Andric }
79e3b55780SDimitry Andric
runOnMachineFunction(MachineFunction & MF)80cfca06d7SDimitry Andric bool WebAssemblyDebugFixup::runOnMachineFunction(MachineFunction &MF) {
81cfca06d7SDimitry Andric LLVM_DEBUG(dbgs() << "********** Debug Fixup **********\n"
82cfca06d7SDimitry Andric "********** Function: "
83cfca06d7SDimitry Andric << MF.getName() << '\n');
84cfca06d7SDimitry Andric
85cfca06d7SDimitry Andric WebAssemblyFunctionInfo &MFI = *MF.getInfo<WebAssemblyFunctionInfo>();
86cfca06d7SDimitry Andric const auto *TII = MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo();
87cfca06d7SDimitry Andric
88cfca06d7SDimitry Andric struct StackElem {
89cfca06d7SDimitry Andric unsigned Reg;
90cfca06d7SDimitry Andric MachineInstr *DebugValue;
91cfca06d7SDimitry Andric };
92cfca06d7SDimitry Andric std::vector<StackElem> Stack;
93cfca06d7SDimitry Andric for (MachineBasicBlock &MBB : MF) {
94cfca06d7SDimitry Andric // We may insert into this list.
95cfca06d7SDimitry Andric for (auto MII = MBB.begin(); MII != MBB.end(); ++MII) {
96cfca06d7SDimitry Andric MachineInstr &MI = *MII;
97cfca06d7SDimitry Andric if (MI.isDebugValue()) {
98cfca06d7SDimitry Andric auto &MO = MI.getOperand(0);
99cfca06d7SDimitry Andric // Also check if not a $noreg: likely a DBG_VALUE we just inserted.
100cfca06d7SDimitry Andric if (MO.isReg() && MO.getReg().isValid() &&
101cfca06d7SDimitry Andric MFI.isVRegStackified(MO.getReg())) {
102cfca06d7SDimitry Andric // Found a DBG_VALUE with a stackified register we will
103cfca06d7SDimitry Andric // change into a stack operand.
104cfca06d7SDimitry Andric // Search for register rather than assume it is on top (which it
105cfca06d7SDimitry Andric // typically is if it appears right after the def), since
106cfca06d7SDimitry Andric // DBG_VALUE's may shift under some circumstances.
107cfca06d7SDimitry Andric for (auto &Elem : reverse(Stack)) {
108cfca06d7SDimitry Andric if (MO.getReg() == Elem.Reg) {
109cfca06d7SDimitry Andric auto Depth = static_cast<unsigned>(&Elem - &Stack[0]);
110cfca06d7SDimitry Andric LLVM_DEBUG(dbgs() << "Debug Value VReg " << MO.getReg()
111cfca06d7SDimitry Andric << " -> Stack Relative " << Depth << "\n");
112cfca06d7SDimitry Andric MO.ChangeToTargetIndex(WebAssembly::TI_OPERAND_STACK, Depth);
113cfca06d7SDimitry Andric // Save the DBG_VALUE instruction that defined this stackified
114cfca06d7SDimitry Andric // variable since later we need it to construct another one on
115cfca06d7SDimitry Andric // pop.
116cfca06d7SDimitry Andric Elem.DebugValue = &MI;
117cfca06d7SDimitry Andric break;
118cfca06d7SDimitry Andric }
119cfca06d7SDimitry Andric }
120cfca06d7SDimitry Andric // If the Reg was not found, we have a DBG_VALUE outside of its
121cfca06d7SDimitry Andric // def-use range, and we leave it unmodified as reg, which means
122cfca06d7SDimitry Andric // it will be culled later.
123cfca06d7SDimitry Andric }
124cfca06d7SDimitry Andric } else {
125cfca06d7SDimitry Andric // Track stack depth.
126cfca06d7SDimitry Andric for (MachineOperand &MO : reverse(MI.explicit_uses())) {
127cfca06d7SDimitry Andric if (MO.isReg() && MFI.isVRegStackified(MO.getReg())) {
128cfca06d7SDimitry Andric auto Prev = Stack.back();
129cfca06d7SDimitry Andric Stack.pop_back();
130cfca06d7SDimitry Andric assert(Prev.Reg == MO.getReg() &&
131cfca06d7SDimitry Andric "WebAssemblyDebugFixup: Pop: Register not matched!");
132344a3780SDimitry Andric // We should not put a DBG_VALUE after a terminator; debug ranges
133344a3780SDimitry Andric // are terminated at the end of a BB anyway.
134344a3780SDimitry Andric if (Prev.DebugValue && !MI.isTerminator()) {
135cfca06d7SDimitry Andric // This stackified reg is a variable that started life at
136cfca06d7SDimitry Andric // Prev.DebugValue, so now that we're popping it we must insert
137cfca06d7SDimitry Andric // a $noreg DBG_VALUE for the variable to end it, right after
138cfca06d7SDimitry Andric // the current instruction.
139cfca06d7SDimitry Andric BuildMI(*Prev.DebugValue->getParent(), std::next(MII),
140344a3780SDimitry Andric Prev.DebugValue->getDebugLoc(),
141344a3780SDimitry Andric TII->get(WebAssembly::DBG_VALUE), false, Register(),
142344a3780SDimitry Andric Prev.DebugValue->getOperand(2).getMetadata(),
143cfca06d7SDimitry Andric Prev.DebugValue->getOperand(3).getMetadata());
144cfca06d7SDimitry Andric }
145cfca06d7SDimitry Andric }
146cfca06d7SDimitry Andric }
147cfca06d7SDimitry Andric for (MachineOperand &MO : MI.defs()) {
148cfca06d7SDimitry Andric if (MO.isReg() && MFI.isVRegStackified(MO.getReg())) {
149cfca06d7SDimitry Andric Stack.push_back({MO.getReg(), nullptr});
150cfca06d7SDimitry Andric }
151cfca06d7SDimitry Andric }
152cfca06d7SDimitry Andric }
153cfca06d7SDimitry Andric }
154cfca06d7SDimitry Andric assert(Stack.empty() &&
155cfca06d7SDimitry Andric "WebAssemblyDebugFixup: Stack not empty at end of basic block!");
156e3b55780SDimitry Andric
1577fa27ce4SDimitry Andric setDanglingDebugValuesUndef(MBB, TII);
158cfca06d7SDimitry Andric }
159cfca06d7SDimitry Andric
160cfca06d7SDimitry Andric return true;
161cfca06d7SDimitry Andric }
162