xref: /src/contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPU.td (revision 753f127f3ace09432b2baeffd71a308760641a62) 
1//===-- AMDGPU.td - AMDGPU Tablegen files --------*- tablegen -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===------------------------------------------------------------===//
8
9include "llvm/TableGen/SearchableTable.td"
10include "llvm/Target/Target.td"
11include "AMDGPUFeatures.td"
12
13def p0 : PtrValueType<i64, 0>;
14def p1 : PtrValueType<i64, 1>;
15def p2 : PtrValueType<i32, 2>;
16def p3 : PtrValueType<i32, 3>;
17def p4 : PtrValueType<i64, 4>;
18def p5 : PtrValueType<i32, 5>;
19def p6 : PtrValueType<i32, 6>;
20
21class BoolToList<bit Value> {
22  list<int> ret = !if(Value, [1]<int>, []<int>);
23}
24
25//===------------------------------------------------------------===//
26// Subtarget Features (device properties)
27//===------------------------------------------------------------===//
28
29def FeatureFastFMAF32 : SubtargetFeature<"fast-fmaf",
30  "FastFMAF32",
31  "true",
32  "Assuming f32 fma is at least as fast as mul + add"
33>;
34
35def FeatureFastDenormalF32 : SubtargetFeature<"fast-denormal-f32",
36  "FastDenormalF32",
37  "true",
38  "Enabling denormals does not cause f32 instructions to run at f64 rates"
39>;
40
41def FeatureMIMG_R128 : SubtargetFeature<"mimg-r128",
42  "MIMG_R128",
43  "true",
44  "Support 128-bit texture resources"
45>;
46
47def HalfRate64Ops : SubtargetFeature<"half-rate-64-ops",
48  "HalfRate64Ops",
49  "true",
50  "Most fp64 instructions are half rate instead of quarter"
51>;
52
53def FullRate64Ops : SubtargetFeature<"full-rate-64-ops",
54  "FullRate64Ops",
55  "true",
56  "Most fp64 instructions are full rate"
57>;
58
59def FeatureFlatAddressSpace : SubtargetFeature<"flat-address-space",
60  "FlatAddressSpace",
61  "true",
62  "Support flat address space"
63>;
64
65def FeatureFlatInstOffsets : SubtargetFeature<"flat-inst-offsets",
66  "FlatInstOffsets",
67  "true",
68  "Flat instructions have immediate offset addressing mode"
69>;
70
71def FeatureFlatGlobalInsts : SubtargetFeature<"flat-global-insts",
72  "FlatGlobalInsts",
73  "true",
74  "Have global_* flat memory instructions"
75>;
76
77def FeatureFlatScratchInsts : SubtargetFeature<"flat-scratch-insts",
78  "FlatScratchInsts",
79  "true",
80  "Have scratch_* flat memory instructions"
81>;
82
83def FeatureScalarFlatScratchInsts : SubtargetFeature<"scalar-flat-scratch-insts",
84  "ScalarFlatScratchInsts",
85  "true",
86  "Have s_scratch_* flat memory instructions"
87>;
88
89def FeatureEnableFlatScratch : SubtargetFeature<"enable-flat-scratch",
90  "EnableFlatScratch",
91  "true",
92  "Use scratch_* flat memory instructions to access scratch"
93>;
94
95def FeatureAddNoCarryInsts : SubtargetFeature<"add-no-carry-insts",
96  "AddNoCarryInsts",
97  "true",
98  "Have VALU add/sub instructions without carry out"
99>;
100
101def FeatureUnalignedBufferAccess : SubtargetFeature<"unaligned-buffer-access",
102  "UnalignedBufferAccess",
103  "true",
104  "Hardware supports unaligned global loads and stores"
105>;
106
107def FeatureTrapHandler: SubtargetFeature<"trap-handler",
108  "TrapHandler",
109  "true",
110  "Trap handler support"
111>;
112
113def FeatureUnalignedScratchAccess : SubtargetFeature<"unaligned-scratch-access",
114  "UnalignedScratchAccess",
115  "true",
116  "Support unaligned scratch loads and stores"
117>;
118
119def FeatureUnalignedDSAccess : SubtargetFeature<"unaligned-ds-access",
120  "UnalignedDSAccess",
121  "true",
122  "Hardware supports unaligned local and region loads and stores"
123>;
124
125def FeatureApertureRegs : SubtargetFeature<"aperture-regs",
126  "HasApertureRegs",
127  "true",
128  "Has Memory Aperture Base and Size Registers"
129>;
130
131def FeatureMadMixInsts : SubtargetFeature<"mad-mix-insts",
132  "HasMadMixInsts",
133  "true",
134  "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions"
135>;
136
137def FeatureFmaMixInsts : SubtargetFeature<"fma-mix-insts",
138  "HasFmaMixInsts",
139  "true",
140  "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions"
141>;
142
143def FeatureSupportsXNACK : SubtargetFeature<"xnack-support",
144  "SupportsXNACK",
145  "true",
146  "Hardware supports XNACK"
147>;
148
149// XNACK is disabled if SH_MEM_CONFIG.ADDRESS_MODE = GPUVM on chips that support
150// XNACK. The current default kernel driver setting is:
151// - graphics ring: XNACK disabled
152// - compute ring: XNACK enabled
153//
154// If XNACK is enabled, the VMEM latency can be worse.
155// If XNACK is disabled, the 2 SGPRs can be used for general purposes.
156def FeatureXNACK : SubtargetFeature<"xnack",
157  "EnableXNACK",
158  "true",
159  "Enable XNACK support"
160>;
161
162def FeatureTgSplit : SubtargetFeature<"tgsplit",
163  "EnableTgSplit",
164  "true",
165  "Enable threadgroup split execution"
166>;
167
168def FeatureCuMode : SubtargetFeature<"cumode",
169  "EnableCuMode",
170  "true",
171  "Enable CU wavefront execution mode"
172>;
173
174def FeatureSGPRInitBug : SubtargetFeature<"sgpr-init-bug",
175  "SGPRInitBug",
176  "true",
177  "VI SGPR initialization bug requiring a fixed SGPR allocation size"
178>;
179
180def FeatureUserSGPRInit16Bug : SubtargetFeature<"user-sgpr-init16-bug",
181  "UserSGPRInit16Bug",
182  "true",
183  "Bug requiring at least 16 user+system SGPRs to be enabled"
184>;
185
186def FeatureLdsMisalignedBug : SubtargetFeature<"lds-misaligned-bug",
187  "LDSMisalignedBug",
188  "true",
189  "Some GFX10 bug with multi-dword LDS and flat access that is not naturally aligned in WGP mode"
190>;
191
192def FeatureMFMAInlineLiteralBug : SubtargetFeature<"mfma-inline-literal-bug",
193  "HasMFMAInlineLiteralBug",
194  "true",
195  "MFMA cannot use inline literal as SrcC"
196>;
197
198def FeatureVcmpxPermlaneHazard : SubtargetFeature<"vcmpx-permlane-hazard",
199  "HasVcmpxPermlaneHazard",
200  "true",
201  "TODO: describe me"
202>;
203
204def FeatureVMEMtoScalarWriteHazard : SubtargetFeature<"vmem-to-scalar-write-hazard",
205  "HasVMEMtoScalarWriteHazard",
206  "true",
207  "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution."
208>;
209
210def FeatureSMEMtoVectorWriteHazard : SubtargetFeature<"smem-to-vector-write-hazard",
211  "HasSMEMtoVectorWriteHazard",
212  "true",
213  "s_load_dword followed by v_cmp page faults"
214>;
215
216def FeatureInstFwdPrefetchBug : SubtargetFeature<"inst-fwd-prefetch-bug",
217  "HasInstFwdPrefetchBug",
218  "true",
219  "S_INST_PREFETCH instruction causes shader to hang"
220>;
221
222def FeatureVcmpxExecWARHazard : SubtargetFeature<"vcmpx-exec-war-hazard",
223  "HasVcmpxExecWARHazard",
224  "true",
225  "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)"
226>;
227
228def FeatureLdsBranchVmemWARHazard : SubtargetFeature<"lds-branch-vmem-war-hazard",
229  "HasLdsBranchVmemWARHazard",
230  "true",
231  "Switching between LDS and VMEM-tex not waiting VM_VSRC=0"
232>;
233
234def FeatureNSAtoVMEMBug : SubtargetFeature<"nsa-to-vmem-bug",
235  "HasNSAtoVMEMBug",
236  "true",
237  "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero"
238>;
239
240def FeatureNSAClauseBug : SubtargetFeature<"nsa-clause-bug",
241  "HasNSAClauseBug",
242  "true",
243  "MIMG-NSA in a hard clause has unpredictable results on GFX10.1"
244>;
245
246def FeatureFlatSegmentOffsetBug : SubtargetFeature<"flat-segment-offset-bug",
247  "HasFlatSegmentOffsetBug",
248  "true",
249  "GFX10 bug where inst_offset is ignored when flat instructions access global memory"
250>;
251
252def FeatureNegativeScratchOffsetBug : SubtargetFeature<"negative-scratch-offset-bug",
253  "NegativeScratchOffsetBug",
254  "true",
255  "Negative immediate offsets in scratch instructions with an SGPR offset page fault on GFX9"
256>;
257
258def FeatureNegativeUnalignedScratchOffsetBug : SubtargetFeature<"negative-unaligned-scratch-offset-bug",
259  "NegativeUnalignedScratchOffsetBug",
260  "true",
261  "Scratch instructions with a VGPR offset and a negative immediate offset that is not a multiple of 4 read wrong memory on GFX10"
262>;
263
264def FeatureOffset3fBug : SubtargetFeature<"offset-3f-bug",
265  "HasOffset3fBug",
266  "true",
267  "Branch offset of 3f hardware bug"
268>;
269
270def FeatureImageStoreD16Bug : SubtargetFeature<"image-store-d16-bug",
271  "HasImageStoreD16Bug",
272  "true",
273  "Image Store D16 hardware bug"
274>;
275
276def FeatureImageGather4D16Bug : SubtargetFeature<"image-gather4-d16-bug",
277  "HasImageGather4D16Bug",
278  "true",
279  "Image Gather4 D16 hardware bug"
280>;
281
282class SubtargetFeatureLDSBankCount <int Value> : SubtargetFeature <
283  "ldsbankcount"#Value,
284  "LDSBankCount",
285  !cast<string>(Value),
286  "The number of LDS banks per compute unit."
287>;
288
289def FeatureLDSBankCount16 : SubtargetFeatureLDSBankCount<16>;
290def FeatureLDSBankCount32 : SubtargetFeatureLDSBankCount<32>;
291
292def FeatureGCN3Encoding : SubtargetFeature<"gcn3-encoding",
293  "GCN3Encoding",
294  "true",
295  "Encoding format for VI"
296>;
297
298def FeatureCIInsts : SubtargetFeature<"ci-insts",
299  "CIInsts",
300  "true",
301  "Additional instructions for CI+"
302>;
303
304def FeatureGFX8Insts : SubtargetFeature<"gfx8-insts",
305  "GFX8Insts",
306  "true",
307  "Additional instructions for GFX8+"
308>;
309
310def FeatureGFX9Insts : SubtargetFeature<"gfx9-insts",
311  "GFX9Insts",
312  "true",
313  "Additional instructions for GFX9+"
314>;
315
316def FeatureGFX90AInsts : SubtargetFeature<"gfx90a-insts",
317  "GFX90AInsts",
318  "true",
319  "Additional instructions for GFX90A+"
320>;
321
322def FeatureGFX940Insts : SubtargetFeature<"gfx940-insts",
323  "GFX940Insts",
324  "true",
325  "Additional instructions for GFX940+"
326>;
327
328def FeatureGFX10Insts : SubtargetFeature<"gfx10-insts",
329  "GFX10Insts",
330  "true",
331  "Additional instructions for GFX10+"
332>;
333
334def FeatureGFX11Insts : SubtargetFeature<"gfx11-insts",
335  "GFX11Insts",
336  "true",
337  "Additional instructions for GFX11+"
338>;
339
340def FeatureGFX10_3Insts : SubtargetFeature<"gfx10-3-insts",
341  "GFX10_3Insts",
342  "true",
343  "Additional instructions for GFX10.3"
344>;
345
346def FeatureGFX7GFX8GFX9Insts : SubtargetFeature<"gfx7-gfx8-gfx9-insts",
347  "GFX7GFX8GFX9Insts",
348  "true",
349  "Instructions shared in GFX7, GFX8, GFX9"
350>;
351
352def FeatureSMemRealTime : SubtargetFeature<"s-memrealtime",
353  "HasSMemRealTime",
354  "true",
355  "Has s_memrealtime instruction"
356>;
357
358def FeatureInv2PiInlineImm : SubtargetFeature<"inv-2pi-inline-imm",
359  "HasInv2PiInlineImm",
360  "true",
361  "Has 1 / (2 * pi) as inline immediate"
362>;
363
364def Feature16BitInsts : SubtargetFeature<"16-bit-insts",
365  "Has16BitInsts",
366  "true",
367  "Has i16/f16 instructions"
368>;
369
370def FeatureTrue16BitInsts : SubtargetFeature<"true16",
371  "HasTrue16BitInsts",
372  "true",
373  "True 16-bit operand instructions"
374>;
375
376def FeatureVOP3P : SubtargetFeature<"vop3p",
377  "HasVOP3PInsts",
378  "true",
379  "Has VOP3P packed instructions"
380>;
381
382def FeatureMovrel : SubtargetFeature<"movrel",
383  "HasMovrel",
384  "true",
385  "Has v_movrel*_b32 instructions"
386>;
387
388def FeatureVGPRIndexMode : SubtargetFeature<"vgpr-index-mode",
389  "HasVGPRIndexMode",
390  "true",
391  "Has VGPR mode register indexing"
392>;
393
394def FeatureScalarStores : SubtargetFeature<"scalar-stores",
395  "HasScalarStores",
396  "true",
397  "Has store scalar memory instructions"
398>;
399
400def FeatureScalarAtomics : SubtargetFeature<"scalar-atomics",
401  "HasScalarAtomics",
402  "true",
403  "Has atomic scalar memory instructions"
404>;
405
406def FeatureSDWA : SubtargetFeature<"sdwa",
407  "HasSDWA",
408  "true",
409  "Support SDWA (Sub-DWORD Addressing) extension"
410>;
411
412def FeatureSDWAOmod : SubtargetFeature<"sdwa-omod",
413  "HasSDWAOmod",
414  "true",
415  "Support OMod with SDWA (Sub-DWORD Addressing) extension"
416>;
417
418def FeatureSDWAScalar : SubtargetFeature<"sdwa-scalar",
419  "HasSDWAScalar",
420  "true",
421  "Support scalar register with SDWA (Sub-DWORD Addressing) extension"
422>;
423
424def FeatureSDWASdst : SubtargetFeature<"sdwa-sdst",
425  "HasSDWASdst",
426  "true",
427  "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension"
428>;
429
430def FeatureSDWAMac : SubtargetFeature<"sdwa-mav",
431  "HasSDWAMac",
432  "true",
433  "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension"
434>;
435
436def FeatureSDWAOutModsVOPC : SubtargetFeature<"sdwa-out-mods-vopc",
437  "HasSDWAOutModsVOPC",
438  "true",
439  "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension"
440>;
441
442def FeatureDPP : SubtargetFeature<"dpp",
443  "HasDPP",
444  "true",
445  "Support DPP (Data Parallel Primitives) extension"
446>;
447
448// DPP8 allows arbitrary cross-lane swizzling within groups of 8 lanes.
449def FeatureDPP8 : SubtargetFeature<"dpp8",
450  "HasDPP8",
451  "true",
452  "Support DPP8 (Data Parallel Primitives) extension"
453>;
454
455def Feature64BitDPP : SubtargetFeature<"dpp-64bit",
456  "Has64BitDPP",
457  "true",
458  "Support DPP (Data Parallel Primitives) extension"
459>;
460
461def FeaturePackedFP32Ops : SubtargetFeature<"packed-fp32-ops",
462  "HasPackedFP32Ops",
463  "true",
464  "Support packed fp32 instructions"
465>;
466
467def FeatureR128A16 : SubtargetFeature<"r128-a16",
468  "HasR128A16",
469  "true",
470  "Support gfx9-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands, where a16 is aliased with r128"
471>;
472
473def FeatureGFX10A16 : SubtargetFeature<"a16",
474  "HasGFX10A16",
475  "true",
476  "Support gfx10-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands"
477>;
478
479def FeatureG16 : SubtargetFeature<"g16",
480  "HasG16",
481  "true",
482  "Support G16 for 16-bit gradient image operands"
483>;
484
485def FeatureNSAEncoding : SubtargetFeature<"nsa-encoding",
486  "HasNSAEncoding",
487  "true",
488  "Support NSA encoding for image instructions"
489>;
490
491def FeatureImageInsts : SubtargetFeature<"image-insts",
492  "HasImageInsts",
493  "true",
494  "Support image instructions"
495>;
496
497def FeatureExtendedImageInsts : SubtargetFeature<"extended-image-insts",
498  "HasExtendedImageInsts",
499  "true",
500  "Support mips != 0, lod != 0, gather4, and get_lod"
501>;
502
503def FeatureGFX10_AEncoding : SubtargetFeature<"gfx10_a-encoding",
504  "GFX10_AEncoding",
505  "true",
506  "Has BVH ray tracing instructions"
507>;
508
509def FeatureGFX10_BEncoding : SubtargetFeature<"gfx10_b-encoding",
510  "GFX10_BEncoding",
511  "true",
512  "Encoding format GFX10_B"
513>;
514
515def FeatureIntClamp : SubtargetFeature<"int-clamp-insts",
516  "HasIntClamp",
517  "true",
518  "Support clamp for integer destination"
519>;
520
521def FeatureUnpackedD16VMem : SubtargetFeature<"unpacked-d16-vmem",
522  "HasUnpackedD16VMem",
523  "true",
524  "Has unpacked d16 vmem instructions"
525>;
526
527def FeatureDLInsts : SubtargetFeature<"dl-insts",
528  "HasDLInsts",
529  "true",
530  "Has v_fmac_f32 and v_xnor_b32 instructions"
531>;
532
533def FeatureDot1Insts : SubtargetFeature<"dot1-insts",
534  "HasDot1Insts",
535  "true",
536  "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions"
537>;
538
539def FeatureDot2Insts : SubtargetFeature<"dot2-insts",
540  "HasDot2Insts",
541  "true",
542  "Has v_dot2_i32_i16, v_dot2_u32_u16 instructions"
543>;
544
545def FeatureDot3Insts : SubtargetFeature<"dot3-insts",
546  "HasDot3Insts",
547  "true",
548  "Has v_dot8c_i32_i4 instruction"
549>;
550
551def FeatureDot4Insts : SubtargetFeature<"dot4-insts",
552  "HasDot4Insts",
553  "true",
554  "Has v_dot2c_i32_i16 instruction"
555>;
556
557def FeatureDot5Insts : SubtargetFeature<"dot5-insts",
558  "HasDot5Insts",
559  "true",
560  "Has v_dot2c_f32_f16 instruction"
561>;
562
563def FeatureDot6Insts : SubtargetFeature<"dot6-insts",
564  "HasDot6Insts",
565  "true",
566  "Has v_dot4c_i32_i8 instruction"
567>;
568
569def FeatureDot7Insts : SubtargetFeature<"dot7-insts",
570  "HasDot7Insts",
571  "true",
572  "Has v_dot2_f32_f16, v_dot4_u32_u8, v_dot8_u32_u4 instructions"
573>;
574
575def FeatureDot8Insts : SubtargetFeature<"dot8-insts",
576  "HasDot8Insts",
577  "true",
578  "Has v_dot2_f16_f16, v_dot2_bf16_bf16, v_dot2_f32_bf16, "
579  "v_dot4_i32_iu8, v_dot8_i32_iu4 instructions"
580>;
581
582def FeatureMAIInsts : SubtargetFeature<"mai-insts",
583  "HasMAIInsts",
584  "true",
585  "Has mAI instructions"
586>;
587
588def FeaturePkFmacF16Inst : SubtargetFeature<"pk-fmac-f16-inst",
589  "HasPkFmacF16Inst",
590  "true",
591  "Has v_pk_fmac_f16 instruction"
592>;
593
594def FeatureAtomicFaddRtnInsts : SubtargetFeature<"atomic-fadd-rtn-insts",
595  "HasAtomicFaddRtnInsts",
596  "true",
597  "Has buffer_atomic_add_f32 and global_atomic_add_f32 instructions that "
598  "return original value",
599  [FeatureFlatGlobalInsts]
600>;
601
602def FeatureAtomicFaddNoRtnInsts : SubtargetFeature<"atomic-fadd-no-rtn-insts",
603  "HasAtomicFaddNoRtnInsts",
604  "true",
605  "Has buffer_atomic_add_f32 and global_atomic_add_f32 instructions that "
606  "don't return original value",
607  [FeatureFlatGlobalInsts]
608>;
609
610def FeatureAtomicPkFaddNoRtnInsts
611  : SubtargetFeature<"atomic-pk-fadd-no-rtn-insts",
612  "HasAtomicPkFaddNoRtnInsts",
613  "true",
614  "Has buffer_atomic_pk_add_f16 and global_atomic_pk_add_f16 instructions that "
615  "don't return original value",
616  [FeatureFlatGlobalInsts]
617>;
618
619def FeatureSupportsSRAMECC : SubtargetFeature<"sramecc-support",
620  "SupportsSRAMECC",
621  "true",
622  "Hardware supports SRAMECC"
623>;
624
625def FeatureSRAMECC : SubtargetFeature<"sramecc",
626  "EnableSRAMECC",
627  "true",
628  "Enable SRAMECC"
629>;
630
631def FeatureNoSdstCMPX : SubtargetFeature<"no-sdst-cmpx",
632  "HasNoSdstCMPX",
633  "true",
634  "V_CMPX does not write VCC/SGPR in addition to EXEC"
635>;
636
637def FeatureVscnt : SubtargetFeature<"vscnt",
638  "HasVscnt",
639  "true",
640  "Has separate store vscnt counter"
641>;
642
643def FeatureGetWaveIdInst : SubtargetFeature<"get-wave-id-inst",
644  "HasGetWaveIdInst",
645  "true",
646  "Has s_get_waveid_in_workgroup instruction"
647>;
648
649def FeatureSMemTimeInst : SubtargetFeature<"s-memtime-inst",
650  "HasSMemTimeInst",
651  "true",
652  "Has s_memtime instruction"
653>;
654
655def FeatureShaderCyclesRegister : SubtargetFeature<"shader-cycles-register",
656  "HasShaderCyclesRegister",
657  "true",
658  "Has SHADER_CYCLES hardware register"
659>;
660
661def FeatureMadMacF32Insts : SubtargetFeature<"mad-mac-f32-insts",
662  "HasMadMacF32Insts",
663  "true",
664  "Has v_mad_f32/v_mac_f32/v_madak_f32/v_madmk_f32 instructions"
665>;
666
667def FeatureDsSrc2Insts : SubtargetFeature<"ds-src2-insts",
668  "HasDsSrc2Insts",
669  "true",
670  "Has ds_*_src2 instructions"
671>;
672
673def FeatureVOP3Literal : SubtargetFeature<"vop3-literal",
674  "HasVOP3Literal",
675  "true",
676  "Can use one literal in VOP3"
677>;
678
679def FeatureNoDataDepHazard : SubtargetFeature<"no-data-dep-hazard",
680  "HasNoDataDepHazard",
681  "true",
682  "Does not need SW waitstates"
683>;
684
685class SubtargetFeatureNSAMaxSize <int Value> : SubtargetFeature <
686  "nsa-max-size-"#Value,
687  "NSAMaxSize",
688  !cast<string>(Value),
689  "The maximum non-sequential address size in VGPRs."
690>;
691
692def FeatureNSAMaxSize5 : SubtargetFeatureNSAMaxSize<5>;
693def FeatureNSAMaxSize13 : SubtargetFeatureNSAMaxSize<13>;
694
695def FeatureVOPD : SubtargetFeature<"vopd",
696  "HasVOPDInsts",
697  "true",
698  "Has VOPD dual issue wave32 instructions"
699>;
700
701//===------------------------------------------------------------===//
702// Subtarget Features (options and debugging)
703//===------------------------------------------------------------===//
704
705class FeatureMaxPrivateElementSize<int size> : SubtargetFeature<
706  "max-private-element-size-"#size,
707  "MaxPrivateElementSize",
708  !cast<string>(size),
709  "Maximum private access size may be "#size
710>;
711
712def FeatureMaxPrivateElementSize4 : FeatureMaxPrivateElementSize<4>;
713def FeatureMaxPrivateElementSize8 : FeatureMaxPrivateElementSize<8>;
714def FeatureMaxPrivateElementSize16 : FeatureMaxPrivateElementSize<16>;
715
716def FeatureDumpCode : SubtargetFeature <"DumpCode",
717  "DumpCode",
718  "true",
719  "Dump MachineInstrs in the CodeEmitter"
720>;
721
722def FeatureDumpCodeLower : SubtargetFeature <"dumpcode",
723  "DumpCode",
724  "true",
725  "Dump MachineInstrs in the CodeEmitter"
726>;
727
728// XXX - This should probably be removed once enabled by default
729def FeatureEnableLoadStoreOpt : SubtargetFeature <"load-store-opt",
730  "EnableLoadStoreOpt",
731  "true",
732  "Enable SI load/store optimizer pass"
733>;
734
735// Performance debugging feature. Allow using DS instruction immediate
736// offsets even if the base pointer can't be proven to be base. On SI,
737// base pointer values that won't give the same result as a 16-bit add
738// are not safe to fold, but this will override the conservative test
739// for the base pointer.
740def FeatureEnableUnsafeDSOffsetFolding : SubtargetFeature <
741  "unsafe-ds-offset-folding",
742  "EnableUnsafeDSOffsetFolding",
743  "true",
744  "Force using DS instruction immediate offsets on SI"
745>;
746
747def FeatureEnableSIScheduler : SubtargetFeature<"si-scheduler",
748  "EnableSIScheduler",
749  "true",
750  "Enable SI Machine Scheduler"
751>;
752
753def FeatureEnableDS128 : SubtargetFeature<"enable-ds128",
754  "EnableDS128",
755  "true",
756  "Use ds_{read|write}_b128"
757>;
758
759// Sparse texture support requires that all result registers are zeroed when
760// PRTStrictNull is set to true. This feature is turned on for all architectures
761// but is enabled as a feature in case there are situations where PRTStrictNull
762// is disabled by the driver.
763def FeatureEnablePRTStrictNull : SubtargetFeature<"enable-prt-strict-null",
764  "EnablePRTStrictNull",
765  "true",
766  "Enable zeroing of result registers for sparse texture fetches"
767>;
768
769// Unless +-flat-for-global is specified, turn on FlatForGlobal for
770// all OS-es on VI and newer hardware to avoid assertion failures due
771// to missing ADDR64 variants of MUBUF instructions.
772// FIXME: moveToVALU should be able to handle converting addr64 MUBUF
773// instructions.
774
775def FeatureFlatForGlobal : SubtargetFeature<"flat-for-global",
776  "FlatForGlobal",
777  "true",
778  "Force to generate flat instruction for global"
779>;
780
781def FeatureAutoWaitcntBeforeBarrier : SubtargetFeature <
782  "auto-waitcnt-before-barrier",
783  "AutoWaitcntBeforeBarrier",
784  "true",
785  "Hardware automatically inserts waitcnt before barrier"
786>;
787
788def FeatureTrigReducedRange : SubtargetFeature<"trig-reduced-range",
789  "HasTrigReducedRange",
790  "true",
791  "Requires use of fract on arguments to trig instructions"
792>;
793
794// Alignment enforcement is controlled by a configuration register:
795// SH_MEM_CONFIG.alignment_mode
796def FeatureUnalignedAccessMode : SubtargetFeature<"unaligned-access-mode",
797  "UnalignedAccessMode",
798  "true",
799  "Enable unaligned global, local and region loads and stores if the hardware"
800  " supports it"
801>;
802
803def FeaturePackedTID : SubtargetFeature<"packed-tid",
804  "HasPackedTID",
805  "true",
806  "Workitem IDs are packed into v0 at kernel launch"
807>;
808
809def FeatureArchitectedFlatScratch : SubtargetFeature<"architected-flat-scratch",
810  "HasArchitectedFlatScratch",
811  "true",
812  "Flat Scratch register is a readonly SPI initialized architected register"
813>;
814
815// Dummy feature used to disable assembler instructions.
816def FeatureDisable : SubtargetFeature<"",
817  "FeatureDisable","true",
818  "Dummy feature to disable assembler instructions"
819>;
820
821class GCNSubtargetFeatureGeneration <string Value,
822                                     string FeatureName,
823                                     list<SubtargetFeature> Implies> :
824        SubtargetFeatureGeneration <Value, FeatureName, "GCNSubtarget", Implies>;
825
826def FeatureSouthernIslands : GCNSubtargetFeatureGeneration<"SOUTHERN_ISLANDS",
827    "southern-islands",
828  [FeatureFP64, FeatureLocalMemorySize32768, FeatureMIMG_R128,
829  FeatureWavefrontSize64, FeatureSMemTimeInst, FeatureMadMacF32Insts,
830  FeatureDsSrc2Insts, FeatureLDSBankCount32, FeatureMovrel,
831  FeatureTrigReducedRange, FeatureExtendedImageInsts, FeatureImageInsts
832  ]
833>;
834
835def FeatureSeaIslands : GCNSubtargetFeatureGeneration<"SEA_ISLANDS",
836    "sea-islands",
837  [FeatureFP64, FeatureLocalMemorySize65536, FeatureMIMG_R128,
838  FeatureWavefrontSize64, FeatureFlatAddressSpace,
839  FeatureCIInsts, FeatureMovrel, FeatureTrigReducedRange,
840  FeatureGFX7GFX8GFX9Insts, FeatureSMemTimeInst, FeatureMadMacF32Insts,
841  FeatureDsSrc2Insts, FeatureExtendedImageInsts, FeatureUnalignedBufferAccess,
842  FeatureImageInsts
843  ]
844>;
845
846def FeatureVolcanicIslands : GCNSubtargetFeatureGeneration<"VOLCANIC_ISLANDS",
847  "volcanic-islands",
848  [FeatureFP64, FeatureLocalMemorySize65536, FeatureMIMG_R128,
849   FeatureWavefrontSize64, FeatureFlatAddressSpace,
850   FeatureGCN3Encoding, FeatureCIInsts, Feature16BitInsts,
851   FeatureSMemRealTime, FeatureVGPRIndexMode, FeatureMovrel,
852   FeatureScalarStores, FeatureInv2PiInlineImm,
853   FeatureSDWA, FeatureSDWAOutModsVOPC, FeatureSDWAMac, FeatureDPP,
854   FeatureIntClamp, FeatureTrigReducedRange, FeatureGFX8Insts,
855   FeatureGFX7GFX8GFX9Insts, FeatureSMemTimeInst, FeatureMadMacF32Insts,
856   FeatureDsSrc2Insts, FeatureExtendedImageInsts, FeatureFastDenormalF32,
857   FeatureUnalignedBufferAccess, FeatureImageInsts
858  ]
859>;
860
861def FeatureGFX9 : GCNSubtargetFeatureGeneration<"GFX9",
862  "gfx9",
863  [FeatureFP64, FeatureLocalMemorySize65536,
864   FeatureWavefrontSize64, FeatureFlatAddressSpace,
865   FeatureGCN3Encoding, FeatureCIInsts, Feature16BitInsts,
866   FeatureSMemRealTime, FeatureScalarStores, FeatureInv2PiInlineImm,
867   FeatureApertureRegs, FeatureGFX9Insts, FeatureVOP3P, FeatureVGPRIndexMode,
868   FeatureFastFMAF32, FeatureDPP, FeatureIntClamp,
869   FeatureSDWA, FeatureSDWAOmod, FeatureSDWAScalar, FeatureSDWASdst,
870   FeatureFlatInstOffsets, FeatureFlatGlobalInsts, FeatureFlatScratchInsts,
871   FeatureAddNoCarryInsts, FeatureGFX8Insts, FeatureGFX7GFX8GFX9Insts,
872   FeatureScalarFlatScratchInsts, FeatureScalarAtomics, FeatureR128A16,
873   FeatureSMemTimeInst, FeatureFastDenormalF32, FeatureSupportsXNACK,
874   FeatureUnalignedBufferAccess, FeatureUnalignedDSAccess,
875   FeatureNegativeScratchOffsetBug
876  ]
877>;
878
879def FeatureGFX10 : GCNSubtargetFeatureGeneration<"GFX10",
880  "gfx10",
881  [FeatureFP64, FeatureLocalMemorySize65536, FeatureMIMG_R128,
882   FeatureFlatAddressSpace,
883   FeatureCIInsts, Feature16BitInsts,
884   FeatureSMemRealTime, FeatureInv2PiInlineImm,
885   FeatureApertureRegs, FeatureGFX9Insts, FeatureGFX10Insts, FeatureVOP3P,
886   FeatureMovrel, FeatureFastFMAF32, FeatureDPP, FeatureIntClamp,
887   FeatureSDWA, FeatureSDWAOmod, FeatureSDWAScalar, FeatureSDWASdst,
888   FeatureFlatInstOffsets, FeatureFlatGlobalInsts, FeatureFlatScratchInsts,
889   FeatureAddNoCarryInsts, FeatureFmaMixInsts, FeatureGFX8Insts,
890   FeatureNoSdstCMPX, FeatureVscnt,
891   FeatureVOP3Literal, FeatureDPP8, FeatureExtendedImageInsts,
892   FeatureNoDataDepHazard, FeaturePkFmacF16Inst,
893   FeatureGFX10A16, FeatureSMemTimeInst, FeatureFastDenormalF32, FeatureG16,
894   FeatureUnalignedBufferAccess, FeatureUnalignedDSAccess, FeatureImageInsts
895  ]
896>;
897
898def FeatureGFX11 : GCNSubtargetFeatureGeneration<"GFX11",
899  "gfx11",
900  [FeatureFP64, FeatureLocalMemorySize65536, FeatureMIMG_R128,
901   FeatureFlatAddressSpace, Feature16BitInsts,
902   FeatureInv2PiInlineImm, FeatureApertureRegs,
903   FeatureCIInsts, FeatureGFX8Insts, FeatureGFX9Insts, FeatureGFX10Insts,
904   FeatureGFX10_AEncoding, FeatureGFX10_BEncoding, FeatureGFX10_3Insts,
905   FeatureGFX11Insts, FeatureVOP3P, FeatureVOPD, FeatureTrue16BitInsts,
906   FeatureMovrel, FeatureFastFMAF32, FeatureDPP, FeatureIntClamp,
907   FeatureFlatInstOffsets, FeatureFlatGlobalInsts, FeatureFlatScratchInsts,
908   FeatureAddNoCarryInsts, FeatureFmaMixInsts,
909   FeatureNoSdstCMPX, FeatureVscnt,
910   FeatureVOP3Literal, FeatureDPP8, FeatureExtendedImageInsts,
911   FeatureNoDataDepHazard, FeaturePkFmacF16Inst,
912   FeatureGFX10A16, FeatureFastDenormalF32, FeatureG16,
913   FeatureUnalignedBufferAccess, FeatureUnalignedDSAccess
914  ]
915>;
916
917class FeatureSet<list<SubtargetFeature> Features_> {
918  list<SubtargetFeature> Features = Features_;
919}
920
921def FeatureISAVersion6_0_0 : FeatureSet<[FeatureSouthernIslands,
922   FeatureFastFMAF32,
923   HalfRate64Ops,
924   FeatureLDSBankCount32]>;
925
926def FeatureISAVersion6_0_1 : FeatureSet<
927  [FeatureSouthernIslands,
928   FeatureLDSBankCount32]>;
929
930def FeatureISAVersion6_0_2 : FeatureSet<
931  [FeatureSouthernIslands,
932   FeatureLDSBankCount32]>;
933
934def FeatureISAVersion7_0_0 : FeatureSet<
935  [FeatureSeaIslands,
936   FeatureLDSBankCount32]>;
937
938def FeatureISAVersion7_0_1 : FeatureSet<
939  [FeatureSeaIslands,
940   HalfRate64Ops,
941   FeatureLDSBankCount32,
942   FeatureFastFMAF32]>;
943
944def FeatureISAVersion7_0_2 : FeatureSet<
945  [FeatureSeaIslands,
946   FeatureLDSBankCount16,
947   FeatureFastFMAF32]>;
948
949def FeatureISAVersion7_0_3 : FeatureSet<
950  [FeatureSeaIslands,
951   FeatureLDSBankCount16]>;
952
953def FeatureISAVersion7_0_4 : FeatureSet<
954  [FeatureSeaIslands,
955   FeatureLDSBankCount32]>;
956
957def FeatureISAVersion7_0_5 : FeatureSet<
958  [FeatureSeaIslands,
959   FeatureLDSBankCount16]>;
960
961def FeatureISAVersion8_0_1 : FeatureSet<
962  [FeatureVolcanicIslands,
963   FeatureFastFMAF32,
964   HalfRate64Ops,
965   FeatureLDSBankCount32,
966   FeatureSupportsXNACK,
967   FeatureUnpackedD16VMem]>;
968
969def FeatureISAVersion8_0_2 : FeatureSet<
970  [FeatureVolcanicIslands,
971   FeatureLDSBankCount32,
972   FeatureSGPRInitBug,
973   FeatureUnpackedD16VMem]>;
974
975def FeatureISAVersion8_0_3 : FeatureSet<
976  [FeatureVolcanicIslands,
977   FeatureLDSBankCount32,
978   FeatureUnpackedD16VMem]>;
979
980def FeatureISAVersion8_0_5 : FeatureSet<
981  [FeatureVolcanicIslands,
982   FeatureLDSBankCount32,
983   FeatureSGPRInitBug,
984   FeatureUnpackedD16VMem]>;
985
986def FeatureISAVersion8_1_0 : FeatureSet<
987  [FeatureVolcanicIslands,
988   FeatureLDSBankCount16,
989   FeatureSupportsXNACK,
990   FeatureImageStoreD16Bug,
991   FeatureImageGather4D16Bug]>;
992
993def FeatureISAVersion9_0_0 : FeatureSet<
994  [FeatureGFX9,
995   FeatureMadMixInsts,
996   FeatureLDSBankCount32,
997   FeatureDsSrc2Insts,
998   FeatureExtendedImageInsts,
999   FeatureImageInsts,
1000   FeatureMadMacF32Insts,
1001   FeatureImageGather4D16Bug]>;
1002
1003def FeatureISAVersion9_0_2 : FeatureSet<
1004  [FeatureGFX9,
1005   FeatureMadMixInsts,
1006   FeatureLDSBankCount32,
1007   FeatureDsSrc2Insts,
1008   FeatureExtendedImageInsts,
1009   FeatureImageInsts,
1010   FeatureMadMacF32Insts,
1011   FeatureImageGather4D16Bug]>;
1012
1013def FeatureISAVersion9_0_4 : FeatureSet<
1014  [FeatureGFX9,
1015   FeatureLDSBankCount32,
1016   FeatureDsSrc2Insts,
1017   FeatureExtendedImageInsts,
1018   FeatureImageInsts,
1019   FeatureMadMacF32Insts,
1020   FeatureFmaMixInsts,
1021   FeatureImageGather4D16Bug]>;
1022
1023def FeatureISAVersion9_0_6 : FeatureSet<
1024  [FeatureGFX9,
1025   HalfRate64Ops,
1026   FeatureFmaMixInsts,
1027   FeatureLDSBankCount32,
1028   FeatureDsSrc2Insts,
1029   FeatureExtendedImageInsts,
1030   FeatureImageInsts,
1031   FeatureMadMacF32Insts,
1032   FeatureDLInsts,
1033   FeatureDot1Insts,
1034   FeatureDot2Insts,
1035   FeatureDot7Insts,
1036   FeatureSupportsSRAMECC,
1037   FeatureImageGather4D16Bug]>;
1038
1039def FeatureISAVersion9_0_8 : FeatureSet<
1040  [FeatureGFX9,
1041   HalfRate64Ops,
1042   FeatureFmaMixInsts,
1043   FeatureLDSBankCount32,
1044   FeatureDsSrc2Insts,
1045   FeatureExtendedImageInsts,
1046   FeatureImageInsts,
1047   FeatureMadMacF32Insts,
1048   FeatureDLInsts,
1049   FeatureDot1Insts,
1050   FeatureDot2Insts,
1051   FeatureDot3Insts,
1052   FeatureDot4Insts,
1053   FeatureDot5Insts,
1054   FeatureDot6Insts,
1055   FeatureDot7Insts,
1056   FeatureMAIInsts,
1057   FeaturePkFmacF16Inst,
1058   FeatureAtomicFaddNoRtnInsts,
1059   FeatureAtomicPkFaddNoRtnInsts,
1060   FeatureSupportsSRAMECC,
1061   FeatureMFMAInlineLiteralBug,
1062   FeatureImageGather4D16Bug]>;
1063
1064def FeatureISAVersion9_0_9 : FeatureSet<
1065  [FeatureGFX9,
1066   FeatureMadMixInsts,
1067   FeatureLDSBankCount32,
1068   FeatureDsSrc2Insts,
1069   FeatureExtendedImageInsts,
1070   FeatureImageInsts,
1071   FeatureMadMacF32Insts,
1072   FeatureImageGather4D16Bug]>;
1073
1074def FeatureISAVersion9_0_A : FeatureSet<
1075  [FeatureGFX9,
1076   FeatureGFX90AInsts,
1077   FeatureFmaMixInsts,
1078   FeatureLDSBankCount32,
1079   FeatureDLInsts,
1080   FeatureDot1Insts,
1081   FeatureDot2Insts,
1082   FeatureDot3Insts,
1083   FeatureDot4Insts,
1084   FeatureDot5Insts,
1085   FeatureDot6Insts,
1086   FeatureDot7Insts,
1087   Feature64BitDPP,
1088   FeaturePackedFP32Ops,
1089   FeatureMAIInsts,
1090   FeaturePkFmacF16Inst,
1091   FeatureAtomicFaddRtnInsts,
1092   FeatureAtomicFaddNoRtnInsts,
1093   FeatureAtomicPkFaddNoRtnInsts,
1094   FeatureImageInsts,
1095   FeatureMadMacF32Insts,
1096   FeatureSupportsSRAMECC,
1097   FeaturePackedTID,
1098   FullRate64Ops]>;
1099
1100def FeatureISAVersion9_0_C : FeatureSet<
1101  [FeatureGFX9,
1102   FeatureMadMixInsts,
1103   FeatureLDSBankCount32,
1104   FeatureDsSrc2Insts,
1105   FeatureExtendedImageInsts,
1106   FeatureImageInsts,
1107   FeatureMadMacF32Insts,
1108   FeatureImageGather4D16Bug]>;
1109
1110def FeatureISAVersion9_4_0 : FeatureSet<
1111  [FeatureGFX9,
1112   FeatureGFX90AInsts,
1113   FeatureGFX940Insts,
1114   FeatureFmaMixInsts,
1115   FeatureLDSBankCount32,
1116   FeatureDLInsts,
1117   FeatureDot1Insts,
1118   FeatureDot2Insts,
1119   FeatureDot3Insts,
1120   FeatureDot4Insts,
1121   FeatureDot5Insts,
1122   FeatureDot6Insts,
1123   FeatureDot7Insts,
1124   Feature64BitDPP,
1125   FeaturePackedFP32Ops,
1126   FeatureMAIInsts,
1127   FeaturePkFmacF16Inst,
1128   FeatureAtomicFaddRtnInsts,
1129   FeatureAtomicFaddNoRtnInsts,
1130   FeatureAtomicPkFaddNoRtnInsts,
1131   FeatureSupportsSRAMECC,
1132   FeaturePackedTID,
1133   FeatureArchitectedFlatScratch,
1134   FullRate64Ops]>;
1135
1136// TODO: Organize more features into groups.
1137def FeatureGroup {
1138  // Bugs present on gfx10.1.
1139  list<SubtargetFeature> GFX10_1_Bugs = [
1140    FeatureVcmpxPermlaneHazard,
1141    FeatureVMEMtoScalarWriteHazard,
1142    FeatureSMEMtoVectorWriteHazard,
1143    FeatureInstFwdPrefetchBug,
1144    FeatureVcmpxExecWARHazard,
1145    FeatureLdsBranchVmemWARHazard,
1146    FeatureNSAtoVMEMBug,
1147    FeatureNSAClauseBug,
1148    FeatureOffset3fBug,
1149    FeatureFlatSegmentOffsetBug,
1150    FeatureNegativeUnalignedScratchOffsetBug
1151   ];
1152}
1153
1154def FeatureISAVersion10_1_0 : FeatureSet<
1155  !listconcat(FeatureGroup.GFX10_1_Bugs,
1156    [FeatureGFX10,
1157     FeatureLDSBankCount32,
1158     FeatureDLInsts,
1159     FeatureNSAEncoding,
1160     FeatureNSAMaxSize5,
1161     FeatureWavefrontSize32,
1162     FeatureScalarStores,
1163     FeatureScalarAtomics,
1164     FeatureScalarFlatScratchInsts,
1165     FeatureGetWaveIdInst,
1166     FeatureMadMacF32Insts,
1167     FeatureDsSrc2Insts,
1168     FeatureLdsMisalignedBug,
1169     FeatureSupportsXNACK])>;
1170
1171def FeatureISAVersion10_1_1 : FeatureSet<
1172  !listconcat(FeatureGroup.GFX10_1_Bugs,
1173    [FeatureGFX10,
1174     FeatureLDSBankCount32,
1175     FeatureDLInsts,
1176     FeatureDot1Insts,
1177     FeatureDot2Insts,
1178     FeatureDot5Insts,
1179     FeatureDot6Insts,
1180     FeatureDot7Insts,
1181     FeatureNSAEncoding,
1182     FeatureNSAMaxSize5,
1183     FeatureWavefrontSize32,
1184     FeatureScalarStores,
1185     FeatureScalarAtomics,
1186     FeatureScalarFlatScratchInsts,
1187     FeatureGetWaveIdInst,
1188     FeatureMadMacF32Insts,
1189     FeatureDsSrc2Insts,
1190     FeatureLdsMisalignedBug,
1191     FeatureSupportsXNACK])>;
1192
1193def FeatureISAVersion10_1_2 : FeatureSet<
1194  !listconcat(FeatureGroup.GFX10_1_Bugs,
1195    [FeatureGFX10,
1196     FeatureLDSBankCount32,
1197     FeatureDLInsts,
1198     FeatureDot1Insts,
1199     FeatureDot2Insts,
1200     FeatureDot5Insts,
1201     FeatureDot6Insts,
1202     FeatureDot7Insts,
1203     FeatureNSAEncoding,
1204     FeatureNSAMaxSize5,
1205     FeatureWavefrontSize32,
1206     FeatureScalarStores,
1207     FeatureScalarAtomics,
1208     FeatureScalarFlatScratchInsts,
1209     FeatureGetWaveIdInst,
1210     FeatureMadMacF32Insts,
1211     FeatureDsSrc2Insts,
1212     FeatureLdsMisalignedBug,
1213     FeatureSupportsXNACK])>;
1214
1215def FeatureISAVersion10_1_3 : FeatureSet<
1216  !listconcat(FeatureGroup.GFX10_1_Bugs,
1217    [FeatureGFX10,
1218     FeatureGFX10_AEncoding,
1219     FeatureLDSBankCount32,
1220     FeatureDLInsts,
1221     FeatureNSAEncoding,
1222     FeatureNSAMaxSize5,
1223     FeatureWavefrontSize32,
1224     FeatureScalarStores,
1225     FeatureScalarAtomics,
1226     FeatureScalarFlatScratchInsts,
1227     FeatureGetWaveIdInst,
1228     FeatureMadMacF32Insts,
1229     FeatureDsSrc2Insts,
1230     FeatureLdsMisalignedBug,
1231     FeatureSupportsXNACK])>;
1232
1233def FeatureISAVersion10_3_0 : FeatureSet<
1234  [FeatureGFX10,
1235   FeatureGFX10_AEncoding,
1236   FeatureGFX10_BEncoding,
1237   FeatureGFX10_3Insts,
1238   FeatureLDSBankCount32,
1239   FeatureDLInsts,
1240   FeatureDot1Insts,
1241   FeatureDot2Insts,
1242   FeatureDot5Insts,
1243   FeatureDot6Insts,
1244   FeatureDot7Insts,
1245   FeatureNSAEncoding,
1246   FeatureNSAMaxSize13,
1247   FeatureWavefrontSize32,
1248   FeatureShaderCyclesRegister]>;
1249
1250def FeatureISAVersion11_Common : FeatureSet<
1251  [FeatureGFX11,
1252   FeatureLDSBankCount32,
1253   FeatureDLInsts,
1254   FeatureDot5Insts,
1255   FeatureDot7Insts,
1256   FeatureDot8Insts,
1257   FeatureNSAEncoding,
1258   FeatureNSAMaxSize5,
1259   FeatureWavefrontSize32,
1260   FeatureShaderCyclesRegister,
1261   FeatureArchitectedFlatScratch,
1262   FeatureAtomicFaddRtnInsts,
1263   FeatureAtomicFaddNoRtnInsts,
1264   FeatureImageInsts,
1265   FeaturePackedTID,
1266   FeatureVcmpxPermlaneHazard]>;
1267
1268// Features for GFX 11.0.0 and 11.0.1
1269def FeatureISAVersion11_0 : FeatureSet<
1270  !listconcat(FeatureISAVersion11_Common.Features,
1271    [FeatureUserSGPRInit16Bug])>;
1272
1273def FeatureISAVersion11_0_2 : FeatureSet<
1274  !listconcat(FeatureISAVersion11_Common.Features,
1275    [FeatureUserSGPRInit16Bug])>;
1276
1277//===----------------------------------------------------------------------===//
1278
1279def AMDGPUInstrInfo : InstrInfo {
1280  let guessInstructionProperties = 1;
1281  let noNamedPositionallyEncodedOperands = 1;
1282}
1283
1284def AMDGPUAsmParser : AsmParser {
1285  // Some of the R600 registers have the same name, so this crashes.
1286  // For example T0_XYZW and T0_XY both have the asm name T0.
1287  let ShouldEmitMatchRegisterName = 0;
1288}
1289
1290def AMDGPUAsmWriter : AsmWriter {
1291  int PassSubtarget = 1;
1292}
1293
1294def AMDGPUAsmVariants {
1295  string Default = "Default";
1296  int Default_ID = 0;
1297  string VOP3 = "VOP3";
1298  int VOP3_ID = 1;
1299  string SDWA = "SDWA";
1300  int SDWA_ID = 2;
1301  string SDWA9 = "SDWA9";
1302  int SDWA9_ID = 3;
1303  string DPP = "DPP";
1304  int DPP_ID = 4;
1305  string VOP3_DPP = "VOP3_DPP";
1306  int VOP3_DPP_ID = 5;
1307  string Disable = "Disable";
1308  int Disable_ID = 6;
1309}
1310
1311def DefaultAMDGPUAsmParserVariant : AsmParserVariant {
1312  let Variant = AMDGPUAsmVariants.Default_ID;
1313  let Name = AMDGPUAsmVariants.Default;
1314}
1315
1316def VOP3AsmParserVariant : AsmParserVariant {
1317  let Variant = AMDGPUAsmVariants.VOP3_ID;
1318  let Name = AMDGPUAsmVariants.VOP3;
1319}
1320
1321def SDWAAsmParserVariant : AsmParserVariant {
1322  let Variant = AMDGPUAsmVariants.SDWA_ID;
1323  let Name = AMDGPUAsmVariants.SDWA;
1324}
1325
1326def SDWA9AsmParserVariant : AsmParserVariant {
1327  let Variant = AMDGPUAsmVariants.SDWA9_ID;
1328  let Name = AMDGPUAsmVariants.SDWA9;
1329}
1330
1331def DPPAsmParserVariant : AsmParserVariant {
1332  let Variant = AMDGPUAsmVariants.DPP_ID;
1333  let Name = AMDGPUAsmVariants.DPP;
1334}
1335
1336def VOP3_DPPAsmParserVariant : AsmParserVariant {
1337  let Variant = AMDGPUAsmVariants.VOP3_DPP_ID;
1338  let Name = AMDGPUAsmVariants.VOP3_DPP;
1339}
1340
1341def AMDGPU : Target {
1342  // Pull in Instruction Info:
1343  let InstructionSet = AMDGPUInstrInfo;
1344  let AssemblyParsers = [AMDGPUAsmParser];
1345  let AssemblyParserVariants = [DefaultAMDGPUAsmParserVariant,
1346                                VOP3AsmParserVariant,
1347                                SDWAAsmParserVariant,
1348                                SDWA9AsmParserVariant,
1349                                DPPAsmParserVariant,
1350                                VOP3_DPPAsmParserVariant];
1351  let AssemblyWriters = [AMDGPUAsmWriter];
1352  let AllowRegisterRenaming = 1;
1353}
1354
1355// Dummy Instruction itineraries for pseudo instructions
1356def ALU_NULL : FuncUnit;
1357def NullALU : InstrItinClass;
1358
1359//===----------------------------------------------------------------------===//
1360// Predicate helper class
1361//===----------------------------------------------------------------------===//
1362
1363def isGFX6 :
1364  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS">,
1365  AssemblerPredicate<(all_of FeatureSouthernIslands)>;
1366
1367def isGFX6GFX7 :
1368  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1369            "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS">,
1370  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), (not FeatureGFX10Insts))>;
1371
1372def isGFX6GFX7GFX10 :
1373  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1374            "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1375            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1376  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), (not FeatureGFX11Insts))>;
1377
1378def isGFX6GFX7GFX10Plus :
1379  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1380            "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1381            "Subtarget->getGeneration() >= AMDGPUSubtarget::GFX10">,
1382  AssemblerPredicate<(all_of (not FeatureGCN3Encoding))>;
1383
1384def isGFX7Only :
1385  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS">,
1386  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureCIInsts, (not FeatureGFX10Insts))>;
1387
1388def isGFX7GFX10 :
1389  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1390            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1391  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureCIInsts, (not FeatureGFX11Insts))>;
1392
1393def isGFX7GFX10GFX11 :
1394  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1395            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10 ||"
1396            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX11">,
1397  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureCIInsts)>;
1398
1399def isGFX7GFX8GFX9 :
1400  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1401            "Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1402            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9">,
1403  AssemblerPredicate<(all_of FeatureGFX7GFX8GFX9Insts)>;
1404
1405def isGFX6GFX7GFX8GFX9 :
1406  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1407            "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1408            "Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1409            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9">,
1410  AssemblerPredicate<(all_of (not FeatureGFX10Insts))>;
1411
1412def isGFX6GFX7GFX8GFX9NotGFX90A :
1413  Predicate<"!Subtarget->hasGFX90AInsts() &&"
1414            "(Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1415            " Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1416            " Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1417            " Subtarget->getGeneration() == AMDGPUSubtarget::GFX9)">,
1418  AssemblerPredicate<(all_of (not FeatureGFX10Insts), (not FeatureGFX90AInsts))>;
1419
1420def isGFX6GFX7GFX8GFX9GFX10 :
1421  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1422            "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1423            "Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1424            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9 ||"
1425            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1426  AssemblerPredicate<(all_of (not FeatureGFX11Insts))>;
1427
1428def isGFX7GFX8GFX9GFX10 :
1429  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1430            "Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1431            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9 ||"
1432            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1433  AssemblerPredicate<(all_of FeatureCIInsts, (not FeatureGFX11Insts))>;
1434
1435def isGFX7Plus :
1436  Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::SEA_ISLANDS">,
1437  AssemblerPredicate<(all_of FeatureCIInsts)>;
1438
1439def isGFX8Plus :
1440  Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::VOLCANIC_ISLANDS">,
1441  AssemblerPredicate<(all_of FeatureGFX8Insts)>;
1442
1443def isGFX8Only : Predicate<"Subtarget->getGeneration() =="
1444                           "AMDGPUSubtarget::VOLCANIC_ISLANDS">,
1445  AssemblerPredicate <(all_of FeatureVolcanicIslands)>;
1446
1447def isGFX9Plus :
1448  Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX9">,
1449  AssemblerPredicate<(all_of FeatureGFX9Insts)>;
1450
1451def isGFX9Only : Predicate <
1452  "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9">,
1453  AssemblerPredicate<(all_of FeatureGCN3Encoding, FeatureGFX9Insts)>;
1454
1455def isGCN3ExcludingGFX90A :
1456  Predicate<"Subtarget->isGCN3Encoding() && !Subtarget->hasGFX90AInsts()">,
1457  AssemblerPredicate<(all_of FeatureGCN3Encoding, (not FeatureGFX90AInsts))>;
1458
1459def isGFX90APlus :
1460  Predicate<"Subtarget->hasGFX90AInsts()">,
1461  AssemblerPredicate<(all_of FeatureGFX90AInsts)>;
1462
1463def isNotGFX90APlus :
1464  Predicate<"!Subtarget->hasGFX90AInsts()">,
1465  AssemblerPredicate<(all_of (not FeatureGFX90AInsts))>;
1466
1467def isGFX8GFX9NotGFX90A :
1468  Predicate<"!Subtarget->hasGFX90AInsts() &&"
1469            "(Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1470            " Subtarget->getGeneration() == AMDGPUSubtarget::GFX9)">,
1471  AssemblerPredicate<(all_of FeatureGFX8Insts, FeatureGCN3Encoding, (not FeatureGFX90AInsts))>;
1472
1473def isGFX90AOnly :
1474  Predicate<"Subtarget->hasGFX90AInsts() && !Subtarget->hasGFX940Insts()">,
1475  AssemblerPredicate<(all_of FeatureGFX90AInsts, (not FeatureGFX940Insts))>;
1476
1477def isGFX908orGFX90A :
1478  Predicate<"Subtarget->hasMAIInsts() && !Subtarget->hasGFX940Insts()">,
1479  AssemblerPredicate<(all_of FeatureMAIInsts, (not FeatureGFX940Insts))>;
1480
1481def isGFX940Plus :
1482  Predicate<"Subtarget->hasGFX940Insts()">,
1483  AssemblerPredicate<(all_of FeatureGFX940Insts)>;
1484
1485def isGFX940GFX11Plus :
1486  Predicate<"Subtarget->hasGFX940Insts() ||"
1487            "Subtarget->getGeneration() >= AMDGPUSubtarget::GFX11">,
1488  AssemblerPredicate<(any_of FeatureGFX940Insts, FeatureGFX11Insts)>;
1489
1490def isGFX8GFX9NotGFX940 :
1491  Predicate<"!Subtarget->hasGFX940Insts() &&"
1492            "(Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1493            " Subtarget->getGeneration() == AMDGPUSubtarget::GFX9)">,
1494  AssemblerPredicate<(all_of FeatureGFX8Insts, FeatureGCN3Encoding, (not FeatureGFX940Insts))>;
1495
1496def isGFX8GFX9 :
1497  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1498            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9">,
1499  AssemblerPredicate<(all_of FeatureGFX8Insts, FeatureGCN3Encoding)>;
1500
1501def isGFX10Only :
1502  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1503  AssemblerPredicate<(all_of FeatureGFX10Insts, (not FeatureGFX11Insts))>;
1504
1505def isGFX10Plus :
1506  Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX10">,
1507  AssemblerPredicate<(all_of FeatureGFX10Insts)>;
1508
1509def isGFX10Before1030 :
1510  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::GFX10 &&"
1511            "!Subtarget->hasGFX10_3Insts()">,
1512  AssemblerPredicate<(all_of FeatureGFX10Insts,(not FeatureGFX10_3Insts))>;
1513
1514def isGFX9GFX10 :
1515  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::GFX9 ||"
1516            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1517  AssemblerPredicate<(all_of FeatureGFX9Insts, (not FeatureGFX11Insts))>;
1518
1519def isGFX8GFX9GFX10 :
1520  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1521            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9 ||"
1522            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1523  AssemblerPredicate<(all_of FeatureGFX8Insts, (not FeatureGFX11Insts))>;
1524
1525def isGFX11Only :
1526  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::GFX11">,
1527  AssemblerPredicate<(all_of FeatureGFX11Insts)>;
1528
1529def isGFX11Plus :
1530  Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX11">,
1531  AssemblerPredicate<(all_of FeatureGFX11Insts)>;
1532
1533def HasFlatAddressSpace : Predicate<"Subtarget->hasFlatAddressSpace()">,
1534  AssemblerPredicate<(all_of FeatureFlatAddressSpace)>;
1535
1536def HasFlatGlobalInsts : Predicate<"Subtarget->hasFlatGlobalInsts()">,
1537  AssemblerPredicate<(all_of FeatureFlatGlobalInsts)>;
1538def HasFlatScratchInsts : Predicate<"Subtarget->hasFlatScratchInsts()">,
1539  AssemblerPredicate<(all_of FeatureFlatScratchInsts)>;
1540def HasScalarFlatScratchInsts : Predicate<"Subtarget->hasScalarFlatScratchInsts()">,
1541  AssemblerPredicate<(all_of FeatureScalarFlatScratchInsts)>;
1542def HasD16LoadStore : Predicate<"Subtarget->hasD16LoadStore()">,
1543  AssemblerPredicate<(all_of FeatureGFX9Insts)>;
1544
1545def HasFlatScratchSTMode : Predicate<"Subtarget->hasFlatScratchSTMode()">,
1546  AssemblerPredicate<(any_of FeatureGFX10_3Insts, FeatureGFX940Insts)>;
1547def HasFlatScratchSVSMode : Predicate<"Subtarget->hasFlatScratchSVSMode()">,
1548  AssemblerPredicate<(any_of FeatureGFX940Insts, FeatureGFX11Insts)>;
1549
1550def HasGFX10_AEncoding : Predicate<"Subtarget->hasGFX10_AEncoding()">,
1551  AssemblerPredicate<(all_of FeatureGFX10_AEncoding)>;
1552
1553def HasGFX10_BEncoding : Predicate<"Subtarget->hasGFX10_BEncoding()">,
1554  AssemblerPredicate<(all_of FeatureGFX10_BEncoding)>;
1555
1556def HasUnpackedD16VMem : Predicate<"Subtarget->hasUnpackedD16VMem()">,
1557  AssemblerPredicate<(all_of FeatureUnpackedD16VMem)>;
1558def HasPackedD16VMem : Predicate<"!Subtarget->hasUnpackedD16VMem()">,
1559  AssemblerPredicate<(all_of (not FeatureUnpackedD16VMem))>;
1560
1561def D16PreservesUnusedBits :
1562  Predicate<"Subtarget->d16PreservesUnusedBits()">,
1563  AssemblerPredicate<(all_of FeatureGFX9Insts, (not FeatureSRAMECC))>;
1564
1565def LDSRequiresM0Init : Predicate<"Subtarget->ldsRequiresM0Init()">;
1566def NotLDSRequiresM0Init : Predicate<"!Subtarget->ldsRequiresM0Init()">;
1567
1568def HasDSAddTid : Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX9">,
1569  AssemblerPredicate<(all_of FeatureGFX9Insts)>;
1570
1571def HasLDSFPAtomicAdd : Predicate<"Subtarget->hasLDSFPAtomicAdd()">,
1572  AssemblerPredicate<(all_of FeatureGFX8Insts)>;
1573
1574def HasAddNoCarryInsts : Predicate<"Subtarget->hasAddNoCarry()">,
1575  AssemblerPredicate<(all_of FeatureAddNoCarryInsts)>;
1576
1577def NotHasAddNoCarryInsts : Predicate<"!Subtarget->hasAddNoCarry()">;
1578
1579def Has16BitInsts : Predicate<"Subtarget->has16BitInsts()">,
1580  AssemblerPredicate<(all_of Feature16BitInsts)>;
1581
1582def HasTrue16BitInsts : Predicate<"Subtarget->hasTrue16BitInsts()">,
1583  AssemblerPredicate<(all_of FeatureTrue16BitInsts)>;
1584def NotHasTrue16BitInsts : Predicate<"!Subtarget->hasTrue16BitInsts()">;
1585
1586def HasVOP3PInsts : Predicate<"Subtarget->hasVOP3PInsts()">,
1587  AssemblerPredicate<(all_of FeatureVOP3P)>;
1588
1589def HasMinMaxDenormModes : Predicate<"Subtarget->supportsMinMaxDenormModes()">;
1590def NotHasMinMaxDenormModes : Predicate<"!Subtarget->supportsMinMaxDenormModes()">;
1591
1592def HasSDWA : Predicate<"Subtarget->hasSDWA()">,
1593  AssemblerPredicate<(all_of FeatureSDWA, FeatureVolcanicIslands)>;
1594
1595def HasSDWA9 :
1596  Predicate<"Subtarget->hasSDWA()">,
1597  AssemblerPredicate<(all_of FeatureGCN3Encoding, FeatureGFX9Insts,FeatureSDWA)>;
1598
1599def HasSDWA10 :
1600  Predicate<"Subtarget->hasSDWA()">,
1601  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureGFX10Insts, FeatureSDWA)>;
1602
1603def HasDPP : Predicate<"Subtarget->hasDPP()">,
1604  AssemblerPredicate<(all_of FeatureGCN3Encoding, FeatureDPP)>;
1605
1606def HasDPP8 : Predicate<"Subtarget->hasDPP8()">,
1607  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureGFX10Insts, FeatureDPP8)>;
1608
1609def Has64BitDPP : Predicate<"Subtarget->has64BitDPP()">,
1610  AssemblerPredicate<(all_of Feature64BitDPP)>;
1611
1612def HasPackedFP32Ops : Predicate<"Subtarget->hasPackedFP32Ops()">,
1613  AssemblerPredicate<(all_of FeaturePackedFP32Ops)>;
1614
1615def HasFmaakFmamkF32Insts :
1616  Predicate<"Subtarget->hasFmaakFmamkF32Insts()">,
1617  AssemblerPredicate<(any_of FeatureGFX10Insts, FeatureGFX940Insts)>;
1618
1619def HasImageInsts : Predicate<"Subtarget->hasImageInsts()">,
1620  AssemblerPredicate<(all_of FeatureImageInsts)>;
1621
1622def HasExtendedImageInsts : Predicate<"Subtarget->hasExtendedImageInsts()">,
1623  AssemblerPredicate<(all_of FeatureExtendedImageInsts)>;
1624
1625def HasR128A16 : Predicate<"Subtarget->hasR128A16()">,
1626  AssemblerPredicate<(all_of FeatureR128A16)>;
1627
1628def HasGFX10A16 : Predicate<"Subtarget->hasGFX10A16()">,
1629  AssemblerPredicate<(all_of FeatureGFX10A16)>;
1630
1631def HasG16 : Predicate<"Subtarget->hasG16()">,
1632  AssemblerPredicate<(all_of FeatureG16)>;
1633
1634def HasDPP16 : Predicate<"Subtarget->hasDPP()">,
1635  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureGFX10Insts, FeatureDPP)>;
1636
1637def HasIntClamp : Predicate<"Subtarget->hasIntClamp()">,
1638  AssemblerPredicate<(all_of FeatureIntClamp)>;
1639
1640def HasMadMixInsts : Predicate<"Subtarget->hasMadMixInsts()">,
1641  AssemblerPredicate<(all_of FeatureMadMixInsts)>;
1642
1643def HasScalarStores : Predicate<"Subtarget->hasScalarStores()">,
1644  AssemblerPredicate<(all_of FeatureScalarStores)>;
1645
1646def HasScalarAtomics : Predicate<"Subtarget->hasScalarAtomics()">,
1647  AssemblerPredicate<(all_of FeatureScalarAtomics)>;
1648
1649def HasNoSdstCMPX : Predicate<"Subtarget->hasNoSdstCMPX()">,
1650  AssemblerPredicate<(all_of FeatureNoSdstCMPX)>;
1651
1652def HasSdstCMPX : Predicate<"!Subtarget->hasNoSdstCMPX()">,
1653  AssemblerPredicate<(all_of (not FeatureNoSdstCMPX))>;
1654
1655def has16BankLDS : Predicate<"Subtarget->getLDSBankCount() == 16">;
1656def has32BankLDS : Predicate<"Subtarget->getLDSBankCount() == 32">;
1657def HasVGPRIndexMode : Predicate<"Subtarget->hasVGPRIndexMode()">,
1658                      AssemblerPredicate<(all_of FeatureVGPRIndexMode)>;
1659def HasMovrel : Predicate<"Subtarget->hasMovrel()">,
1660                AssemblerPredicate<(all_of FeatureMovrel)>;
1661
1662def HasFmaMixInsts : Predicate<"Subtarget->hasFmaMixInsts()">,
1663  AssemblerPredicate<(all_of FeatureFmaMixInsts)>;
1664
1665def HasDLInsts : Predicate<"Subtarget->hasDLInsts()">,
1666  AssemblerPredicate<(all_of FeatureDLInsts)>;
1667
1668def HasDot1Insts : Predicate<"Subtarget->hasDot1Insts()">,
1669  AssemblerPredicate<(all_of FeatureDot1Insts)>;
1670
1671def HasDot2Insts : Predicate<"Subtarget->hasDot2Insts()">,
1672  AssemblerPredicate<(all_of FeatureDot2Insts)>;
1673
1674def HasDot3Insts : Predicate<"Subtarget->hasDot3Insts()">,
1675  AssemblerPredicate<(all_of FeatureDot3Insts)>;
1676
1677def HasDot4Insts : Predicate<"Subtarget->hasDot4Insts()">,
1678  AssemblerPredicate<(all_of FeatureDot4Insts)>;
1679
1680def HasDot5Insts : Predicate<"Subtarget->hasDot5Insts()">,
1681  AssemblerPredicate<(all_of FeatureDot5Insts)>;
1682
1683def HasDot6Insts : Predicate<"Subtarget->hasDot6Insts()">,
1684  AssemblerPredicate<(all_of FeatureDot6Insts)>;
1685
1686def HasDot7Insts : Predicate<"Subtarget->hasDot7Insts()">,
1687  AssemblerPredicate<(all_of FeatureDot7Insts)>;
1688
1689def HasDot8Insts : Predicate<"Subtarget->hasDot8Insts()">,
1690  AssemblerPredicate<(all_of FeatureDot8Insts)>;
1691
1692def HasGetWaveIdInst : Predicate<"Subtarget->hasGetWaveIdInst()">,
1693  AssemblerPredicate<(all_of FeatureGetWaveIdInst)>;
1694
1695def HasMAIInsts : Predicate<"Subtarget->hasMAIInsts()">,
1696  AssemblerPredicate<(all_of FeatureMAIInsts)>;
1697
1698def HasSMemRealTime : Predicate<"Subtarget->hasSMemRealTime()">,
1699  AssemblerPredicate<(all_of FeatureSMemRealTime)>;
1700
1701def HasSMemTimeInst : Predicate<"Subtarget->hasSMemTimeInst()">,
1702  AssemblerPredicate<(all_of FeatureSMemTimeInst)>;
1703
1704def HasShaderCyclesRegister : Predicate<"Subtarget->hasShaderCyclesRegister()">,
1705  AssemblerPredicate<(all_of FeatureShaderCyclesRegister)>;
1706
1707def HasPkFmacF16Inst : Predicate<"Subtarget->hasPkFmacF16Inst()">,
1708  AssemblerPredicate<(all_of FeaturePkFmacF16Inst)>;
1709
1710def HasMadMacF32Insts : Predicate<"Subtarget->hasMadMacF32Insts()">,
1711  AssemblerPredicate<(all_of FeatureMadMacF32Insts)>;
1712
1713def HasFmaLegacy32 : Predicate<"Subtarget->hasGFX10_3Insts()">,
1714  AssemblerPredicate<(any_of FeatureGFX10_3Insts)>;
1715
1716def HasAtomicFaddRtnInsts : Predicate<"Subtarget->hasAtomicFaddRtnInsts()">,
1717  AssemblerPredicate<(all_of FeatureAtomicFaddRtnInsts)>;
1718def HasAtomicFaddNoRtnInsts : Predicate<"Subtarget->hasAtomicFaddNoRtnInsts()">,
1719  AssemblerPredicate<(all_of FeatureAtomicFaddNoRtnInsts)>;
1720def HasAtomicPkFaddNoRtnInsts
1721  : Predicate<"Subtarget->hasAtomicPkFaddNoRtnInsts()">,
1722  AssemblerPredicate<(all_of FeatureAtomicPkFaddNoRtnInsts)>;
1723
1724def HasDsSrc2Insts : Predicate<"!Subtarget->hasDsSrc2Insts()">,
1725  AssemblerPredicate<(all_of FeatureDsSrc2Insts)>;
1726
1727def EnableLateCFGStructurize : Predicate<
1728  "EnableLateStructurizeCFG">;
1729
1730def EnableFlatScratch : Predicate<"Subtarget->enableFlatScratch()">;
1731
1732def DisableFlatScratch : Predicate<"!Subtarget->enableFlatScratch()">;
1733
1734def HasUnalignedAccessMode : Predicate<"Subtarget->hasUnalignedAccessMode()">,
1735  AssemblerPredicate<(all_of FeatureUnalignedAccessMode)>;
1736
1737// Include AMDGPU TD files
1738include "SISchedule.td"
1739include "GCNProcessors.td"
1740include "AMDGPUInstrInfo.td"
1741include "SIRegisterInfo.td"
1742include "AMDGPURegisterBanks.td"
1743include "AMDGPUInstructions.td"
1744include "SIInstrInfo.td"
1745include "AMDGPUCallingConv.td"
1746include "AMDGPUSearchableTables.td"
1747