194a420b1SStefan Hajnoczi# Trace events for debugging and performance instrumentation 294a420b1SStefan Hajnoczi# 394a420b1SStefan Hajnoczi# This file is processed by the tracetool script during the build. 494a420b1SStefan Hajnoczi# 594a420b1SStefan Hajnoczi# To add a new trace event: 694a420b1SStefan Hajnoczi# 794a420b1SStefan Hajnoczi# 1. Choose a name for the trace event. Declare its arguments and format 894a420b1SStefan Hajnoczi# string. 994a420b1SStefan Hajnoczi# 1094a420b1SStefan Hajnoczi# 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() -> 1194a420b1SStefan Hajnoczi# trace_multiwrite_cb(). The source file must #include "trace.h". 1294a420b1SStefan Hajnoczi# 1394a420b1SStefan Hajnoczi# Format of a trace event: 1494a420b1SStefan Hajnoczi# 151e2cf2bcSStefan Hajnoczi# [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>" 1694a420b1SStefan Hajnoczi# 1794a420b1SStefan Hajnoczi# Example: qemu_malloc(size_t size) "size %zu" 1894a420b1SStefan Hajnoczi# 191e2cf2bcSStefan Hajnoczi# The "disable" keyword will build without the trace event. 201e2cf2bcSStefan Hajnoczi# In case of 'simple' trace backend, it will allow the trace event to be 211e2cf2bcSStefan Hajnoczi# compiled, but this would be turned off by default. It can be toggled on via 221e2cf2bcSStefan Hajnoczi# the monitor. 231e2cf2bcSStefan Hajnoczi# 2494a420b1SStefan Hajnoczi# The <name> must be a valid as a C function name. 2594a420b1SStefan Hajnoczi# 2694a420b1SStefan Hajnoczi# Types should be standard C types. Use void * for pointers because the trace 2794a420b1SStefan Hajnoczi# system may not have the necessary headers included. 2894a420b1SStefan Hajnoczi# 2994a420b1SStefan Hajnoczi# The <format-string> should be a sprintf()-compatible format string. 30cd245a19SStefan Hajnoczi 31cd245a19SStefan Hajnoczi# qemu-malloc.c 32cd245a19SStefan Hajnoczidisable qemu_malloc(size_t size, void *ptr) "size %zu ptr %p" 33cd245a19SStefan Hajnoczidisable qemu_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p" 34cd245a19SStefan Hajnoczidisable qemu_free(void *ptr) "ptr %p" 35cd245a19SStefan Hajnoczi 36cd245a19SStefan Hajnoczi# osdep.c 37cd245a19SStefan Hajnoczidisable qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p" 38dda85211SBlue Swirldisable qemu_vmalloc(size_t size, void *ptr) "size %zu ptr %p" 39cd245a19SStefan Hajnoczidisable qemu_vfree(void *ptr) "ptr %p" 406d519a5fSStefan Hajnoczi 4164979a4dSStefan Hajnoczi# hw/virtio.c 4264979a4dSStefan Hajnoczidisable virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u" 4364979a4dSStefan Hajnoczidisable virtqueue_flush(void *vq, unsigned int count) "vq %p count %u" 4464979a4dSStefan Hajnoczidisable virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u" 4564979a4dSStefan Hajnoczidisable virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p" 4664979a4dSStefan Hajnoczidisable virtio_irq(void *vq) "vq %p" 4764979a4dSStefan Hajnoczidisable virtio_notify(void *vdev, void *vq) "vdev %p vq %p" 4864979a4dSStefan Hajnoczi 496d519a5fSStefan Hajnoczi# block.c 506d519a5fSStefan Hajnoczidisable multiwrite_cb(void *mcb, int ret) "mcb %p ret %d" 516d519a5fSStefan Hajnoczidisable bdrv_aio_multiwrite(void *mcb, int num_callbacks, int num_reqs) "mcb %p num_callbacks %d num_reqs %d" 526d519a5fSStefan Hajnoczidisable bdrv_aio_multiwrite_earlyfail(void *mcb) "mcb %p" 536d519a5fSStefan Hajnoczidisable bdrv_aio_multiwrite_latefail(void *mcb, int i) "mcb %p i %d" 54a13aac04SStefan Hajnoczidisable bdrv_aio_flush(void *bs, void *opaque) "bs %p opaque %p" 55bbf0a440SStefan Hajnoczidisable bdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" 56bbf0a440SStefan Hajnoczidisable bdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" 576d519a5fSStefan Hajnoczi 586d519a5fSStefan Hajnoczi# hw/virtio-blk.c 596d519a5fSStefan Hajnoczidisable virtio_blk_req_complete(void *req, int status) "req %p status %d" 606d519a5fSStefan Hajnoczidisable virtio_blk_rw_complete(void *req, int ret) "req %p ret %d" 619a85d394SStefan Hajnoczidisable virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu" 626d519a5fSStefan Hajnoczi 636d519a5fSStefan Hajnoczi# posix-aio-compat.c 649a85d394SStefan Hajnoczidisable paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d" 65ddca9fb2SStefan Hajnoczidisable paio_complete(void *acb, void *opaque, int ret) "acb %p opaque %p ret %d" 66ddca9fb2SStefan Hajnoczidisable paio_cancel(void *acb, void *opaque) "acb %p opaque %p" 67bd3c9aa5SPrerna Saxena 68bd3c9aa5SPrerna Saxena# ioport.c 69bd3c9aa5SPrerna Saxenadisable cpu_in(unsigned int addr, unsigned int val) "addr %#x value %u" 70bd3c9aa5SPrerna Saxenadisable cpu_out(unsigned int addr, unsigned int val) "addr %#x value %u" 7162dd89deSPrerna Saxena 7262dd89deSPrerna Saxena# balloon.c 7362dd89deSPrerna Saxena# Since requests are raised via monitor, not many tracepoints are needed. 7462dd89deSPrerna Saxenadisable balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu" 75d8023f31SBlue Swirl 76d8023f31SBlue Swirl# hw/apic.c 77d8023f31SBlue Swirldisable apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d" 78d8023f31SBlue Swirldisable apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t polarity, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d polarity %d trigger_mode %d" 79d8023f31SBlue Swirldisable cpu_set_apic_base(uint64_t val) "%016"PRIx64"" 80d8023f31SBlue Swirldisable cpu_get_apic_base(uint64_t val) "%016"PRIx64"" 81d8023f31SBlue Swirldisable apic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x" 82d8023f31SBlue Swirldisable apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x" 83d8023f31SBlue Swirl# coalescing 84d8023f31SBlue Swirldisable apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d" 85d8023f31SBlue Swirldisable apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d" 86d8023f31SBlue Swirldisable apic_set_irq(int apic_irq_delivered) "coalescing %d" 8797bf4851SBlue Swirl 8897bf4851SBlue Swirl# hw/cs4231.c 8997bf4851SBlue Swirldisable cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x" 9097bf4851SBlue Swirldisable cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x" 9197bf4851SBlue Swirldisable cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x" 9297bf4851SBlue Swirldisable cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x" 9397bf4851SBlue Swirl 9497bf4851SBlue Swirl# hw/eccmemctl.c 9597bf4851SBlue Swirldisable ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x" 9697bf4851SBlue Swirldisable ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x" 9797bf4851SBlue Swirldisable ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x" 9897bf4851SBlue Swirldisable ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x" 9997bf4851SBlue Swirldisable ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x" 10097bf4851SBlue Swirldisable ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x" 10197bf4851SBlue Swirldisable ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x" 10297bf4851SBlue Swirldisable ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x" 10397bf4851SBlue Swirldisable ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x" 10497bf4851SBlue Swirldisable ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x" 10597bf4851SBlue Swirldisable ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x" 10697bf4851SBlue Swirldisable ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x" 10797bf4851SBlue Swirldisable ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x" 10897bf4851SBlue Swirldisable ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x" 10997bf4851SBlue Swirldisable ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x" 11097bf4851SBlue Swirldisable ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x" 11197bf4851SBlue Swirldisable ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x" 11297bf4851SBlue Swirldisable ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x" 11397bf4851SBlue Swirl 11497bf4851SBlue Swirl# hw/lance.c 11597bf4851SBlue Swirldisable lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x" 11697bf4851SBlue Swirldisable lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x" 11797bf4851SBlue Swirl 11897bf4851SBlue Swirl# hw/slavio_intctl.c 11997bf4851SBlue Swirldisable slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x" 12097bf4851SBlue Swirldisable slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x" 12197bf4851SBlue Swirldisable slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x" 12297bf4851SBlue Swirldisable slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x" 12397bf4851SBlue Swirldisable slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x" 12497bf4851SBlue Swirldisable slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x" 12597bf4851SBlue Swirldisable slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x" 12697bf4851SBlue Swirldisable slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x" 12797bf4851SBlue Swirldisable slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d" 12897bf4851SBlue Swirldisable slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x" 12997bf4851SBlue Swirldisable slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d" 13097bf4851SBlue Swirldisable slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d" 13197bf4851SBlue Swirl 13297bf4851SBlue Swirl# hw/slavio_misc.c 13397bf4851SBlue Swirldisable slavio_misc_update_irq_raise(void) "Raise IRQ" 13497bf4851SBlue Swirldisable slavio_misc_update_irq_lower(void) "Lower IRQ" 13597bf4851SBlue Swirldisable slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d" 13697bf4851SBlue Swirldisable slavio_cfg_mem_writeb(uint32_t val) "Write config %02x" 13797bf4851SBlue Swirldisable slavio_cfg_mem_readb(uint32_t ret) "Read config %02x" 13897bf4851SBlue Swirldisable slavio_diag_mem_writeb(uint32_t val) "Write diag %02x" 13997bf4851SBlue Swirldisable slavio_diag_mem_readb(uint32_t ret) "Read diag %02x" 14097bf4851SBlue Swirldisable slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x" 14197bf4851SBlue Swirldisable slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x" 14297bf4851SBlue Swirldisable slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x" 14397bf4851SBlue Swirldisable slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x" 14497bf4851SBlue Swirldisable slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x" 14597bf4851SBlue Swirldisable slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x" 14697bf4851SBlue Swirldisable apc_mem_writeb(uint32_t val) "Write power management %02x" 14797bf4851SBlue Swirldisable apc_mem_readb(uint32_t ret) "Read power management %02x" 14897bf4851SBlue Swirldisable slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x" 14997bf4851SBlue Swirldisable slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x" 15097bf4851SBlue Swirldisable slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x" 15197bf4851SBlue Swirldisable slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x" 15297bf4851SBlue Swirl 15397bf4851SBlue Swirl# hw/slavio_timer.c 15497bf4851SBlue Swirldisable slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x" 15597bf4851SBlue Swirldisable slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x" 15697bf4851SBlue Swirldisable slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64"" 15797bf4851SBlue Swirldisable slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x" 15897bf4851SBlue Swirldisable slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x" 15997bf4851SBlue Swirldisable slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64"" 16097bf4851SBlue Swirldisable slavio_timer_mem_writel_counter_invalid(void) "not user timer" 16197bf4851SBlue Swirldisable slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started" 16297bf4851SBlue Swirldisable slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped" 16397bf4851SBlue Swirldisable slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer" 16497bf4851SBlue Swirldisable slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter" 16597bf4851SBlue Swirldisable slavio_timer_mem_writel_mode_invalid(void) "not system timer" 16697bf4851SBlue Swirldisable slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64"" 16797bf4851SBlue Swirl 16897bf4851SBlue Swirl# hw/sparc32_dma.c 16997bf4851SBlue Swirldisable ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64"" 17097bf4851SBlue Swirldisable ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64"" 17197bf4851SBlue Swirldisable sparc32_dma_set_irq_raise(void) "Raise IRQ" 17297bf4851SBlue Swirldisable sparc32_dma_set_irq_lower(void) "Lower IRQ" 17397bf4851SBlue Swirldisable espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x" 17497bf4851SBlue Swirldisable espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x" 17597bf4851SBlue Swirldisable sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x" 17697bf4851SBlue Swirldisable sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x" 17797bf4851SBlue Swirldisable sparc32_dma_enable_raise(void) "Raise DMA enable" 17897bf4851SBlue Swirldisable sparc32_dma_enable_lower(void) "Lower DMA enable" 17997bf4851SBlue Swirl 18097bf4851SBlue Swirl# hw/sun4m.c 18197bf4851SBlue Swirldisable sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d" 18297bf4851SBlue Swirldisable sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d" 18397bf4851SBlue Swirldisable sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d" 18497bf4851SBlue Swirldisable sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d" 18597bf4851SBlue Swirl 18697bf4851SBlue Swirl# hw/sun4m_iommu.c 18797bf4851SBlue Swirldisable sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x" 18897bf4851SBlue Swirldisable sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x" 18997bf4851SBlue Swirldisable sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64"" 19097bf4851SBlue Swirldisable sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x" 19197bf4851SBlue Swirldisable sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x" 19297bf4851SBlue Swirldisable sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x" 19397bf4851SBlue Swirldisable sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x" 19497bf4851SBlue Swirldisable sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64"" 19594b0b5ffSStefan Hajnoczi 19637fb59d3SGerd Hoffmann# hw/usb-desc.c 19737fb59d3SGerd Hoffmanndisable usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d" 19825620cbaSGerd Hoffmanndisable usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d" 19937fb59d3SGerd Hoffmanndisable usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" 20025620cbaSGerd Hoffmanndisable usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" 20137fb59d3SGerd Hoffmanndisable usb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d" 20241c6abbdSGerd Hoffmanndisable usb_set_addr(int addr) "dev %d" 203a980a065SGerd Hoffmanndisable usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d" 204ed5a83ddSGerd Hoffmanndisable usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" 205ed5a83ddSGerd Hoffmanndisable usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" 20637fb59d3SGerd Hoffmann 20794b0b5ffSStefan Hajnoczi# vl.c 20894b0b5ffSStefan Hajnoczidisable vm_state_notify(int running, int reason) "running %d reason %d" 209298800caSStefan Hajnoczi 210298800caSStefan Hajnoczi# block/qed-l2-cache.c 211298800caSStefan Hajnoczidisable qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p" 212298800caSStefan Hajnoczidisable qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d" 213298800caSStefan Hajnoczidisable qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d" 214298800caSStefan Hajnoczi 215298800caSStefan Hajnoczi# block/qed-table.c 216298800caSStefan Hajnoczidisable qed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p" 217298800caSStefan Hajnoczidisable qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d" 218298800caSStefan Hajnoczidisable qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u" 219298800caSStefan Hajnoczidisable qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d" 220eabba580SStefan Hajnoczi 221eabba580SStefan Hajnoczi# block/qed.c 222eabba580SStefan Hajnoczidisable qed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d" 223eabba580SStefan Hajnoczidisable qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int is_write) "s %p acb %p sector_num %"PRId64" nb_sectors %d opaque %p is_write %d" 224eabba580SStefan Hajnoczidisable qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p acb %p ret %d cur_pos %"PRIu64"" 225eabba580SStefan Hajnoczidisable qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" 226eabba580SStefan Hajnoczidisable qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" 227eabba580SStefan Hajnoczidisable qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64"" 228eabba580SStefan Hajnoczidisable qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64"" 229eabba580SStefan Hajnoczidisable qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" 2300f3a4a01SFabien Chouteau 2310f3a4a01SFabien Chouteau# hw/grlib_gptimer.c 2320f3a4a01SFabien Chouteaudisable grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run" 2330f3a4a01SFabien Chouteaudisable grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x" 2340f3a4a01SFabien Chouteaudisable grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x" 2350f3a4a01SFabien Chouteaudisable grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x" 2360f3a4a01SFabien Chouteaudisable grlib_gptimer_hit(int id) "timer:%d HIT" 2370f3a4a01SFabien Chouteaudisable grlib_gptimer_readl(int id, const char *s, uint32_t val) "timer:%d %s 0x%x" 2380f3a4a01SFabien Chouteaudisable grlib_gptimer_writel(int id, const char *s, uint32_t val) "timer:%d %s 0x%x" 2390f3a4a01SFabien Chouteaudisable grlib_gptimer_unknown_register(const char *op, uint64_t val) "%s unknown register 0x%"PRIx64"" 2403f10bcbbSFabien Chouteau 2413f10bcbbSFabien Chouteau# hw/grlib_irqmp.c 2423f10bcbbSFabien Chouteaudisable grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x\n" 2433f10bcbbSFabien Chouteaudisable grlib_irqmp_ack(int intno) "interrupt:%d" 2443f10bcbbSFabien Chouteaudisable grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d" 2453f10bcbbSFabien Chouteaudisable grlib_irqmp_unknown_register(const char *op, uint64_t val) "%s unknown register 0x%"PRIx64"" 2468b1e1320SFabien Chouteau 2478b1e1320SFabien Chouteau# hw/grlib_apbuart.c 2488b1e1320SFabien Chouteaudisable grlib_apbuart_event(int event) "event:%d" 2498b1e1320SFabien Chouteaudisable grlib_apbuart_unknown_register(const char *op, uint64_t val) "%s unknown register 0x%"PRIx64"" 250b04d9890SFabien Chouteau 251b04d9890SFabien Chouteau# hw/leon3.c 252b04d9890SFabien Chouteaudisable leon3_set_irq(int intno) "Set CPU IRQ %d" 253b04d9890SFabien Chouteaudisable leon3_reset_irq(int intno) "Reset CPU IRQ %d" 2549363ee31SAnthony Liguori 255cbcc6336SAlon Levy# spice-qemu-char.c 256cbcc6336SAlon Levydisable spice_vmc_write(ssize_t out, int len) "spice wrottn %lu of requested %zd" 257cbcc6336SAlon Levydisable spice_vmc_read(int bytes, int len) "spice read %lu of requested %zd" 258cbcc6336SAlon Levydisable spice_vmc_register_interface(void *scd) "spice vmc registered interface %p" 259cbcc6336SAlon Levydisable spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p" 2604ef66fa7SMichael Walle 2614ef66fa7SMichael Walle# hw/lm32_pic.c 2624ef66fa7SMichael Walledisable lm32_pic_raise_irq(void) "Raise CPU interrupt" 2634ef66fa7SMichael Walledisable lm32_pic_lower_irq(void) "Lower CPU interrupt" 2644ef66fa7SMichael Walledisable lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d" 2654ef66fa7SMichael Walledisable lm32_pic_set_im(uint32_t im) "im 0x%08x" 2664ef66fa7SMichael Walledisable lm32_pic_set_ip(uint32_t ip) "ip 0x%08x" 2674ef66fa7SMichael Walledisable lm32_pic_get_im(uint32_t im) "im 0x%08x" 2684ef66fa7SMichael Walledisable lm32_pic_get_ip(uint32_t ip) "ip 0x%08x" 26915d7dc4fSMichael Walle 27015d7dc4fSMichael Walle# hw/lm32_juart.c 27115d7dc4fSMichael Walledisable lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x" 27215d7dc4fSMichael Walledisable lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x" 27315d7dc4fSMichael Walledisable lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x" 27415d7dc4fSMichael Walledisable lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x" 275ea7924dcSMichael Walle 276ea7924dcSMichael Walle# hw/lm32_timer.c 277ea7924dcSMichael Walledisable lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 278ea7924dcSMichael Walledisable lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 279ea7924dcSMichael Walledisable lm32_timer_hit(void) "timer hit" 280ea7924dcSMichael Walledisable lm32_timer_irq_state(int level) "irq state %d" 281770ae571SMichael Walle 282770ae571SMichael Walle# hw/lm32_uart.c 283770ae571SMichael Walledisable lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 284770ae571SMichael Walledisable lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 285770ae571SMichael Walledisable lm32_uart_irq_state(int level) "irq state %d" 286f19410caSMichael Walle 287f19410caSMichael Walle# hw/lm32_sys.c 288f19410caSMichael Walledisable lm32_sys_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 28925a8bb96SMichael Walle 29025a8bb96SMichael Walle# hw/milkymist-ac97.c 29125a8bb96SMichael Walledisable milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 29225a8bb96SMichael Walledisable milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 29325a8bb96SMichael Walledisable milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request" 29425a8bb96SMichael Walledisable milkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply" 29525a8bb96SMichael Walledisable milkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write" 29625a8bb96SMichael Walledisable milkymist_ac97_pulse_irq_dmar(void) "Pulse IRQ DMA read" 29725a8bb96SMichael Walledisable milkymist_ac97_in_cb(int avail, uint32_t remaining) "avail %d remaining %u" 29825a8bb96SMichael Walledisable milkymist_ac97_in_cb_transferred(int transferred) "transferred %d" 29925a8bb96SMichael Walledisable milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u" 30025a8bb96SMichael Walledisable milkymist_ac97_out_cb_transferred(int transferred) "transferred %d" 301*e4dc6d2cSMichael Walle 302*e4dc6d2cSMichael Walle# hw/milkymist-hpdmc.c 303*e4dc6d2cSMichael Walledisable milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 304*e4dc6d2cSMichael Walledisable milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 305