xref: /qemu/trace-events (revision b213b37072e2eb3e3d13f2a3064e8876f00ce1a0)
194a420b1SStefan Hajnoczi# Trace events for debugging and performance instrumentation
294a420b1SStefan Hajnoczi#
394a420b1SStefan Hajnoczi# This file is processed by the tracetool script during the build.
494a420b1SStefan Hajnoczi#
594a420b1SStefan Hajnoczi# To add a new trace event:
694a420b1SStefan Hajnoczi#
794a420b1SStefan Hajnoczi# 1. Choose a name for the trace event.  Declare its arguments and format
894a420b1SStefan Hajnoczi#    string.
994a420b1SStefan Hajnoczi#
1094a420b1SStefan Hajnoczi# 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() ->
1194a420b1SStefan Hajnoczi#    trace_multiwrite_cb().  The source file must #include "trace.h".
1294a420b1SStefan Hajnoczi#
1394a420b1SStefan Hajnoczi# Format of a trace event:
1494a420b1SStefan Hajnoczi#
151e2cf2bcSStefan Hajnoczi# [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>"
1694a420b1SStefan Hajnoczi#
1794a420b1SStefan Hajnoczi# Example: qemu_malloc(size_t size) "size %zu"
1894a420b1SStefan Hajnoczi#
191e2cf2bcSStefan Hajnoczi# The "disable" keyword will build without the trace event.
201e2cf2bcSStefan Hajnoczi# In case of 'simple' trace backend, it will allow the trace event to be
211e2cf2bcSStefan Hajnoczi# compiled, but this would be turned off by default. It can be toggled on via
221e2cf2bcSStefan Hajnoczi# the monitor.
231e2cf2bcSStefan Hajnoczi#
2494a420b1SStefan Hajnoczi# The <name> must be a valid as a C function name.
2594a420b1SStefan Hajnoczi#
2694a420b1SStefan Hajnoczi# Types should be standard C types.  Use void * for pointers because the trace
2794a420b1SStefan Hajnoczi# system may not have the necessary headers included.
2894a420b1SStefan Hajnoczi#
2994a420b1SStefan Hajnoczi# The <format-string> should be a sprintf()-compatible format string.
30cd245a19SStefan Hajnoczi
31cd245a19SStefan Hajnoczi# qemu-malloc.c
32cd245a19SStefan Hajnoczidisable qemu_malloc(size_t size, void *ptr) "size %zu ptr %p"
33cd245a19SStefan Hajnoczidisable qemu_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p"
34cd245a19SStefan Hajnoczidisable qemu_free(void *ptr) "ptr %p"
35cd245a19SStefan Hajnoczi
36cd245a19SStefan Hajnoczi# osdep.c
37cd245a19SStefan Hajnoczidisable qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p"
38dda85211SBlue Swirldisable qemu_vmalloc(size_t size, void *ptr) "size %zu ptr %p"
39cd245a19SStefan Hajnoczidisable qemu_vfree(void *ptr) "ptr %p"
406d519a5fSStefan Hajnoczi
4164979a4dSStefan Hajnoczi# hw/virtio.c
4264979a4dSStefan Hajnoczidisable virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u"
4364979a4dSStefan Hajnoczidisable virtqueue_flush(void *vq, unsigned int count) "vq %p count %u"
4464979a4dSStefan Hajnoczidisable virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u"
4564979a4dSStefan Hajnoczidisable virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p"
4664979a4dSStefan Hajnoczidisable virtio_irq(void *vq) "vq %p"
4764979a4dSStefan Hajnoczidisable virtio_notify(void *vdev, void *vq) "vdev %p vq %p"
4864979a4dSStefan Hajnoczi
4949e3fdd7SAmit Shah# hw/virtio-serial-bus.c
5049e3fdd7SAmit Shahdisable virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u"
5149e3fdd7SAmit Shahdisable virtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d"
5249e3fdd7SAmit Shahdisable virtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u"
5349e3fdd7SAmit Shahdisable virtio_serial_handle_control_message_port(unsigned int port) "port %u"
5449e3fdd7SAmit Shah
55d02e4fa4SAmit Shah# hw/virtio-console.c
56d02e4fa4SAmit Shahdisable virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd"
57d02e4fa4SAmit Shahdisable virtio_console_chr_read(unsigned int port, int size) "port %u, size %d"
58d02e4fa4SAmit Shahdisable virtio_console_chr_event(unsigned int port, int event) "port %u, event %d"
59d02e4fa4SAmit Shah
606d519a5fSStefan Hajnoczi# block.c
616d519a5fSStefan Hajnoczidisable multiwrite_cb(void *mcb, int ret) "mcb %p ret %d"
626d519a5fSStefan Hajnoczidisable bdrv_aio_multiwrite(void *mcb, int num_callbacks, int num_reqs) "mcb %p num_callbacks %d num_reqs %d"
636d519a5fSStefan Hajnoczidisable bdrv_aio_multiwrite_earlyfail(void *mcb) "mcb %p"
646d519a5fSStefan Hajnoczidisable bdrv_aio_multiwrite_latefail(void *mcb, int i) "mcb %p i %d"
65a13aac04SStefan Hajnoczidisable bdrv_aio_flush(void *bs, void *opaque) "bs %p opaque %p"
66bbf0a440SStefan Hajnoczidisable bdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
67bbf0a440SStefan Hajnoczidisable bdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
68b8c6d095SStefan Hajnoczidisable bdrv_set_locked(void *bs, int locked) "bs %p locked %d"
69da1fa91dSKevin Wolfdisable bdrv_co_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
70da1fa91dSKevin Wolfdisable bdrv_co_writev(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
71f9f05dc5SKevin Wolfdisable bdrv_co_io(int is_write, void *acb) "is_write %d acb %p"
726d519a5fSStefan Hajnoczi
736d519a5fSStefan Hajnoczi# hw/virtio-blk.c
746d519a5fSStefan Hajnoczidisable virtio_blk_req_complete(void *req, int status) "req %p status %d"
756d519a5fSStefan Hajnoczidisable virtio_blk_rw_complete(void *req, int ret) "req %p ret %d"
769a85d394SStefan Hajnoczidisable virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu"
776d519a5fSStefan Hajnoczi
786d519a5fSStefan Hajnoczi# posix-aio-compat.c
799a85d394SStefan Hajnoczidisable paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d"
80ddca9fb2SStefan Hajnoczidisable paio_complete(void *acb, void *opaque, int ret) "acb %p opaque %p ret %d"
81ddca9fb2SStefan Hajnoczidisable paio_cancel(void *acb, void *opaque) "acb %p opaque %p"
82bd3c9aa5SPrerna Saxena
83bd3c9aa5SPrerna Saxena# ioport.c
84bd3c9aa5SPrerna Saxenadisable cpu_in(unsigned int addr, unsigned int val) "addr %#x value %u"
85bd3c9aa5SPrerna Saxenadisable cpu_out(unsigned int addr, unsigned int val) "addr %#x value %u"
8662dd89deSPrerna Saxena
8762dd89deSPrerna Saxena# balloon.c
8862dd89deSPrerna Saxena# Since requests are raised via monitor, not many tracepoints are needed.
8962dd89deSPrerna Saxenadisable balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu"
90d8023f31SBlue Swirl
91d8023f31SBlue Swirl# hw/apic.c
92d8023f31SBlue Swirldisable apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d"
931f6f408cSJan Kiszkadisable apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d"
94d8023f31SBlue Swirldisable cpu_set_apic_base(uint64_t val) "%016"PRIx64""
95d8023f31SBlue Swirldisable cpu_get_apic_base(uint64_t val) "%016"PRIx64""
96d8023f31SBlue Swirldisable apic_mem_readl(uint64_t addr, uint32_t val)  "%"PRIx64" = %08x"
97d8023f31SBlue Swirldisable apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
98d8023f31SBlue Swirl# coalescing
99d8023f31SBlue Swirldisable apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d"
100d8023f31SBlue Swirldisable apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d"
101d8023f31SBlue Swirldisable apic_set_irq(int apic_irq_delivered) "coalescing %d"
10297bf4851SBlue Swirl
10397bf4851SBlue Swirl# hw/cs4231.c
10497bf4851SBlue Swirldisable cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x"
10597bf4851SBlue Swirldisable cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x"
10697bf4851SBlue Swirldisable cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x"
10797bf4851SBlue Swirldisable cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x"
10897bf4851SBlue Swirl
109d43ed9ecSHervé Poussineau# hw/ds1225y.c
110d43ed9ecSHervé Poussineaudisable nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x"
111d43ed9ecSHervé Poussineaudisable nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x"
112d43ed9ecSHervé Poussineau
11397bf4851SBlue Swirl# hw/eccmemctl.c
11497bf4851SBlue Swirldisable ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x"
11597bf4851SBlue Swirldisable ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x"
11697bf4851SBlue Swirldisable ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x"
11797bf4851SBlue Swirldisable ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x"
11897bf4851SBlue Swirldisable ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x"
11997bf4851SBlue Swirldisable ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x"
12097bf4851SBlue Swirldisable ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x"
12197bf4851SBlue Swirldisable ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x"
12297bf4851SBlue Swirldisable ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x"
12397bf4851SBlue Swirldisable ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x"
12497bf4851SBlue Swirldisable ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x"
12597bf4851SBlue Swirldisable ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x"
12697bf4851SBlue Swirldisable ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x"
12797bf4851SBlue Swirldisable ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x"
12897bf4851SBlue Swirldisable ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x"
12997bf4851SBlue Swirldisable ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x"
13097bf4851SBlue Swirldisable ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x"
13197bf4851SBlue Swirldisable ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x"
13297bf4851SBlue Swirl
13397bf4851SBlue Swirl# hw/lance.c
13497bf4851SBlue Swirldisable lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x"
13597bf4851SBlue Swirldisable lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x"
13697bf4851SBlue Swirl
13797bf4851SBlue Swirl# hw/slavio_intctl.c
13897bf4851SBlue Swirldisable slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x"
13997bf4851SBlue Swirldisable slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x"
14097bf4851SBlue Swirldisable slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x"
14197bf4851SBlue Swirldisable slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x"
14297bf4851SBlue Swirldisable slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x"
14397bf4851SBlue Swirldisable slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x"
14497bf4851SBlue Swirldisable slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x"
14597bf4851SBlue Swirldisable slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x"
14697bf4851SBlue Swirldisable slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d"
14797bf4851SBlue Swirldisable slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x"
14897bf4851SBlue Swirldisable slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d"
14997bf4851SBlue Swirldisable slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d"
15097bf4851SBlue Swirl
15197bf4851SBlue Swirl# hw/slavio_misc.c
15297bf4851SBlue Swirldisable slavio_misc_update_irq_raise(void) "Raise IRQ"
15397bf4851SBlue Swirldisable slavio_misc_update_irq_lower(void) "Lower IRQ"
15497bf4851SBlue Swirldisable slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
15597bf4851SBlue Swirldisable slavio_cfg_mem_writeb(uint32_t val) "Write config %02x"
15697bf4851SBlue Swirldisable slavio_cfg_mem_readb(uint32_t ret) "Read config %02x"
15797bf4851SBlue Swirldisable slavio_diag_mem_writeb(uint32_t val) "Write diag %02x"
15897bf4851SBlue Swirldisable slavio_diag_mem_readb(uint32_t ret) "Read diag %02x"
15997bf4851SBlue Swirldisable slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x"
16097bf4851SBlue Swirldisable slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x"
16197bf4851SBlue Swirldisable slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x"
16297bf4851SBlue Swirldisable slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x"
16397bf4851SBlue Swirldisable slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x"
16497bf4851SBlue Swirldisable slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x"
16597bf4851SBlue Swirldisable apc_mem_writeb(uint32_t val) "Write power management %02x"
16697bf4851SBlue Swirldisable apc_mem_readb(uint32_t ret) "Read power management %02x"
16797bf4851SBlue Swirldisable slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x"
16897bf4851SBlue Swirldisable slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x"
16997bf4851SBlue Swirldisable slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x"
17097bf4851SBlue Swirldisable slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x"
17197bf4851SBlue Swirl
17297bf4851SBlue Swirl# hw/slavio_timer.c
17397bf4851SBlue Swirldisable slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x"
17497bf4851SBlue Swirldisable slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x"
17597bf4851SBlue Swirldisable slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64""
17697bf4851SBlue Swirldisable slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x"
17797bf4851SBlue Swirldisable slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x"
17897bf4851SBlue Swirldisable slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64""
17997bf4851SBlue Swirldisable slavio_timer_mem_writel_counter_invalid(void) "not user timer"
18097bf4851SBlue Swirldisable slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started"
18197bf4851SBlue Swirldisable slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped"
18297bf4851SBlue Swirldisable slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer"
18397bf4851SBlue Swirldisable slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter"
18497bf4851SBlue Swirldisable slavio_timer_mem_writel_mode_invalid(void) "not system timer"
18597bf4851SBlue Swirldisable slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64""
18697bf4851SBlue Swirl
18797bf4851SBlue Swirl# hw/sparc32_dma.c
18897bf4851SBlue Swirldisable ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64""
18997bf4851SBlue Swirldisable ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64""
19097bf4851SBlue Swirldisable sparc32_dma_set_irq_raise(void) "Raise IRQ"
19197bf4851SBlue Swirldisable sparc32_dma_set_irq_lower(void) "Lower IRQ"
19297bf4851SBlue Swirldisable espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x"
19397bf4851SBlue Swirldisable espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x"
19497bf4851SBlue Swirldisable sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x"
19597bf4851SBlue Swirldisable sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x"
19697bf4851SBlue Swirldisable sparc32_dma_enable_raise(void) "Raise DMA enable"
19797bf4851SBlue Swirldisable sparc32_dma_enable_lower(void) "Lower DMA enable"
19897bf4851SBlue Swirl
19997bf4851SBlue Swirl# hw/sun4m.c
20097bf4851SBlue Swirldisable sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d"
20197bf4851SBlue Swirldisable sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d"
20297bf4851SBlue Swirldisable sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d"
20397bf4851SBlue Swirldisable sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d"
20497bf4851SBlue Swirl
20597bf4851SBlue Swirl# hw/sun4m_iommu.c
20697bf4851SBlue Swirldisable sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x"
20797bf4851SBlue Swirldisable sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x"
20897bf4851SBlue Swirldisable sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64""
20997bf4851SBlue Swirldisable sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x"
21097bf4851SBlue Swirldisable sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x"
21197bf4851SBlue Swirldisable sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x"
21297bf4851SBlue Swirldisable sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x"
21397bf4851SBlue Swirldisable sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64""
21494b0b5ffSStefan Hajnoczi
215439a97ccSGerd Hoffmann# hw/usb-ehci.c
216439a97ccSGerd Hoffmanndisable usb_ehci_reset(void) "=== RESET ==="
217439a97ccSGerd Hoffmanndisable usb_ehci_mmio_readl(uint32_t addr, const char *str, uint32_t val) "rd mmio %04x [%s] = %x"
218c4f8e211SGerd Hoffmanndisable usb_ehci_mmio_writel(uint32_t addr, const char *str, uint32_t val) "wr mmio %04x [%s] = %x"
219c4f8e211SGerd Hoffmanndisable usb_ehci_mmio_change(uint32_t addr, const char *str, uint32_t new, uint32_t old) "ch mmio %04x [%s] = %x (old: %x)"
220439a97ccSGerd Hoffmanndisable usb_ehci_usbsts(const char *sts, int state) "usbsts %s %d"
22126d53979SGerd Hoffmanndisable usb_ehci_state(const char *schedule, const char *state) "%s schedule %s"
2222e97f03eSGerd Hoffmanndisable usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ %08x: next %08x qtds %08x,%08x,%08x"
223025b168cSGerd Hoffmanndisable usb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int devaddr) "QH @ %08x - rl %d, mplen %d, eps %d, ep %d, dev %d"
224025b168cSGerd Hoffmanndisable usb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ %08x - c %d, h %d, dtc %d, i %d"
2252e97f03eSGerd Hoffmanndisable usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) "q %p - QTD @ %08x: next %08x altnext %08x"
226025b168cSGerd Hoffmanndisable usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) "QTD @ %08x - tbytes %d, cpage %d, cerr %d, pid %d"
227025b168cSGerd Hoffmanndisable usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, int xacterr) "QTD @ %08x - ioc %d, active %d, halt %d, babble %d, xacterr %d"
2282e97f03eSGerd Hoffmanndisable usb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) "ITD @ %08x: next %08x - mplen %d, mult %d, ep %d, dev %d"
229dcbd0b5cSGerd Hoffmanndisable usb_ehci_port_attach(uint32_t port, const char *device) "attach port #%d - %s"
230dcbd0b5cSGerd Hoffmanndisable usb_ehci_port_detach(uint32_t port) "detach port #%d"
231dcbd0b5cSGerd Hoffmanndisable usb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d"
232f2c88dc1SGerd Hoffmanndisable usb_ehci_data(int rw, uint32_t cpage, uint32_t offset, uint32_t addr, uint32_t len, uint32_t bufpos) "write %d, cpage %d, offset 0x%03x, addr 0x%08x, len %d, bufpos %d"
2338ac6d699SGerd Hoffmanndisable usb_ehci_queue_action(void *q, const char *action) "q %p: %s"
234439a97ccSGerd Hoffmann
23537fb59d3SGerd Hoffmann# hw/usb-desc.c
23637fb59d3SGerd Hoffmanndisable usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d"
23725620cbaSGerd Hoffmanndisable usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d"
23837fb59d3SGerd Hoffmanndisable usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
23925620cbaSGerd Hoffmanndisable usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
24037fb59d3SGerd Hoffmanndisable usb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d"
24141c6abbdSGerd Hoffmanndisable usb_set_addr(int addr) "dev %d"
242a980a065SGerd Hoffmanndisable usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d"
243ed5a83ddSGerd Hoffmanndisable usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
244ed5a83ddSGerd Hoffmanndisable usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
24537fb59d3SGerd Hoffmann
2465138efecSPaolo Bonzini# hw/scsi-bus.c
2475138efecSPaolo Bonzinidisable scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d"
248ab9adc88SPaolo Bonzinidisable scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d"
2495138efecSPaolo Bonzinidisable scsi_req_dequeue(int target, int lun, int tag) "target %d lun %d tag %d"
250ad3376ccSPaolo Bonzinidisable scsi_req_continue(int target, int lun, int tag) "target %d lun %d tag %d"
251d800040fSPaolo Bonzinidisable scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) "target %d lun %d tag %d command %d dir %d length %d"
252d800040fSPaolo Bonzinidisable scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) "target %d lun %d tag %d command %d lba %"PRIu64""
2535138efecSPaolo Bonzinidisable scsi_req_parse_bad(int target, int lun, int tag, int cmd) "target %d lun %d tag %d command %d"
254b45ef674SPaolo Bonzinidisable scsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) "target %d lun %d tag %d key %#02x asc %#02x ascq %#02x"
25598254542SPaolo Bonzinidisable scsi_report_luns(int target, int lun, int tag) "target %d lun %d tag %d"
25698254542SPaolo Bonzinidisable scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) "target %d lun %d tag %d page %#02x/%#02x"
25798254542SPaolo Bonzinidisable scsi_test_unit_ready(int target, int lun, int tag) "target %d lun %d tag %d"
25898254542SPaolo Bonzinidisable scsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d"
2595138efecSPaolo Bonzini
26094b0b5ffSStefan Hajnoczi# vl.c
26194b0b5ffSStefan Hajnoczidisable vm_state_notify(int running, int reason) "running %d reason %d"
262298800caSStefan Hajnoczi
263298800caSStefan Hajnoczi# block/qed-l2-cache.c
264298800caSStefan Hajnoczidisable qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p"
265298800caSStefan Hajnoczidisable qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d"
266298800caSStefan Hajnoczidisable qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d"
267298800caSStefan Hajnoczi
268298800caSStefan Hajnoczi# block/qed-table.c
269298800caSStefan Hajnoczidisable qed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p"
270298800caSStefan Hajnoczidisable qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d"
271298800caSStefan Hajnoczidisable qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u"
272298800caSStefan Hajnoczidisable qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d"
273eabba580SStefan Hajnoczi
274eabba580SStefan Hajnoczi# block/qed.c
2756f321e93SStefan Hajnoczidisable qed_need_check_timer_cb(void *s) "s %p"
2766f321e93SStefan Hajnoczidisable qed_start_need_check_timer(void *s) "s %p"
2776f321e93SStefan Hajnoczidisable qed_cancel_need_check_timer(void *s) "s %p"
278eabba580SStefan Hajnoczidisable qed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d"
279eabba580SStefan Hajnoczidisable qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int is_write) "s %p acb %p sector_num %"PRId64" nb_sectors %d opaque %p is_write %d"
280eabba580SStefan Hajnoczidisable qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p acb %p ret %d cur_pos %"PRIu64""
281eabba580SStefan Hajnoczidisable qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
282eabba580SStefan Hajnoczidisable qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
283eabba580SStefan Hajnoczidisable qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64""
284eabba580SStefan Hajnoczidisable qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64""
285eabba580SStefan Hajnoczidisable qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
2860f3a4a01SFabien Chouteau
287*b213b370SHervé Poussineau# hw/g364fb.c
288*b213b370SHervé Poussineaudisable g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x"
289*b213b370SHervé Poussineaudisable g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x"
290*b213b370SHervé Poussineau
2910f3a4a01SFabien Chouteau# hw/grlib_gptimer.c
2920f3a4a01SFabien Chouteaudisable grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run"
2930f3a4a01SFabien Chouteaudisable grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x"
2940f3a4a01SFabien Chouteaudisable grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x"
2950f3a4a01SFabien Chouteaudisable grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x"
2960f3a4a01SFabien Chouteaudisable grlib_gptimer_hit(int id) "timer:%d HIT"
297b4548fccSStefan Hajnoczidisable grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
298b4548fccSStefan Hajnoczidisable grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
2993f10bcbbSFabien Chouteau
3003f10bcbbSFabien Chouteau# hw/grlib_irqmp.c
3013f10bcbbSFabien Chouteaudisable grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x\n"
3023f10bcbbSFabien Chouteaudisable grlib_irqmp_ack(int intno) "interrupt:%d"
3033f10bcbbSFabien Chouteaudisable grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d"
304b4548fccSStefan Hajnoczidisable grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64""
305b4548fccSStefan Hajnoczidisable grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
3068b1e1320SFabien Chouteau
3078b1e1320SFabien Chouteau# hw/grlib_apbuart.c
3088b1e1320SFabien Chouteaudisable grlib_apbuart_event(int event) "event:%d"
309b4548fccSStefan Hajnoczidisable grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
310b04d9890SFabien Chouteau
311b04d9890SFabien Chouteau# hw/leon3.c
312b04d9890SFabien Chouteaudisable leon3_set_irq(int intno) "Set CPU IRQ %d"
313b04d9890SFabien Chouteaudisable leon3_reset_irq(int intno) "Reset CPU IRQ %d"
3149363ee31SAnthony Liguori
315cbcc6336SAlon Levy# spice-qemu-char.c
3162b287af6SLluísdisable spice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested %d"
3172b287af6SLluísdisable spice_vmc_read(int bytes, int len) "spice read %d of requested %d"
318cbcc6336SAlon Levydisable spice_vmc_register_interface(void *scd) "spice vmc registered interface %p"
319cbcc6336SAlon Levydisable spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p"
3204ef66fa7SMichael Walle
3214ef66fa7SMichael Walle# hw/lm32_pic.c
3224ef66fa7SMichael Walledisable lm32_pic_raise_irq(void) "Raise CPU interrupt"
3234ef66fa7SMichael Walledisable lm32_pic_lower_irq(void) "Lower CPU interrupt"
3244ef66fa7SMichael Walledisable lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d"
3254ef66fa7SMichael Walledisable lm32_pic_set_im(uint32_t im) "im 0x%08x"
3264ef66fa7SMichael Walledisable lm32_pic_set_ip(uint32_t ip) "ip 0x%08x"
3274ef66fa7SMichael Walledisable lm32_pic_get_im(uint32_t im) "im 0x%08x"
3284ef66fa7SMichael Walledisable lm32_pic_get_ip(uint32_t ip) "ip 0x%08x"
32915d7dc4fSMichael Walle
33015d7dc4fSMichael Walle# hw/lm32_juart.c
33115d7dc4fSMichael Walledisable lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x"
33215d7dc4fSMichael Walledisable lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x"
33315d7dc4fSMichael Walledisable lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x"
33415d7dc4fSMichael Walledisable lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x"
335ea7924dcSMichael Walle
336ea7924dcSMichael Walle# hw/lm32_timer.c
337ea7924dcSMichael Walledisable lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
338ea7924dcSMichael Walledisable lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
339ea7924dcSMichael Walledisable lm32_timer_hit(void) "timer hit"
340ea7924dcSMichael Walledisable lm32_timer_irq_state(int level) "irq state %d"
341770ae571SMichael Walle
342770ae571SMichael Walle# hw/lm32_uart.c
343770ae571SMichael Walledisable lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
344770ae571SMichael Walledisable lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
345770ae571SMichael Walledisable lm32_uart_irq_state(int level) "irq state %d"
346f19410caSMichael Walle
347f19410caSMichael Walle# hw/lm32_sys.c
348f19410caSMichael Walledisable lm32_sys_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
34925a8bb96SMichael Walle
35025a8bb96SMichael Walle# hw/milkymist-ac97.c
35125a8bb96SMichael Walledisable milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
35225a8bb96SMichael Walledisable milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
35325a8bb96SMichael Walledisable milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request"
35425a8bb96SMichael Walledisable milkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply"
35525a8bb96SMichael Walledisable milkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write"
35625a8bb96SMichael Walledisable milkymist_ac97_pulse_irq_dmar(void) "Pulse IRQ DMA read"
35725a8bb96SMichael Walledisable milkymist_ac97_in_cb(int avail, uint32_t remaining) "avail %d remaining %u"
35825a8bb96SMichael Walledisable milkymist_ac97_in_cb_transferred(int transferred) "transferred %d"
35925a8bb96SMichael Walledisable milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u"
36025a8bb96SMichael Walledisable milkymist_ac97_out_cb_transferred(int transferred) "transferred %d"
361e4dc6d2cSMichael Walle
362e4dc6d2cSMichael Walle# hw/milkymist-hpdmc.c
363b4e37d98SMichael Walledisable milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
364b4e37d98SMichael Walledisable milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
365b4e37d98SMichael Walle
366b4e37d98SMichael Walle# hw/milkymist-memcard.c
367b4e37d98SMichael Walledisable milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
368b4e37d98SMichael Walledisable milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
36907424544SMichael Walle
37057aa265dSMichael Walle# hw/milkymist-minimac2.c
37157aa265dSMichael Walledisable milkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
37257aa265dSMichael Walledisable milkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
37357aa265dSMichael Walledisable milkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
37457aa265dSMichael Walledisable milkymist_minimac2_mdio_read(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
37557aa265dSMichael Walledisable milkymist_minimac2_tx_frame(uint32_t length) "length %u"
37657aa265dSMichael Walledisable milkymist_minimac2_rx_frame(const void *buf, uint32_t length) "buf %p length %u"
37757aa265dSMichael Walledisable milkymist_minimac2_drop_rx_frame(const void *buf) "buf %p"
37857aa265dSMichael Walledisable milkymist_minimac2_rx_transfer(const void *buf, uint32_t length) "buf %p length %d"
37957aa265dSMichael Walledisable milkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX"
38057aa265dSMichael Walledisable milkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX"
38157aa265dSMichael Walledisable milkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX"
3825ee18b9cSMichael Walle
3835ee18b9cSMichael Walle# hw/milkymist-pfpu.c
3845ee18b9cSMichael Walledisable milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
3855ee18b9cSMichael Walledisable milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
3865ee18b9cSMichael Walledisable milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x"
3875ee18b9cSMichael Walledisable milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
38887a381ecSMichael Walle
38987a381ecSMichael Walle# hw/milkymist-softusb.c
39087a381ecSMichael Walledisable milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
39187a381ecSMichael Walledisable milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
39287a381ecSMichael Walledisable milkymist_softusb_mevt(uint8_t m) "m %d"
39387a381ecSMichael Walledisable milkymist_softusb_kevt(uint8_t m) "m %d"
39487a381ecSMichael Walledisable milkymist_softusb_mouse_event(int dx, int dy, int dz, int bs) "dx %d dy %d dz %d bs %02x"
39587a381ecSMichael Walledisable milkymist_softusb_pulse_irq(void) "Pulse IRQ"
39696832424SMichael Walle
39796832424SMichael Walle# hw/milkymist-sysctl.c
39896832424SMichael Walledisable milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
39996832424SMichael Walledisable milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
40096832424SMichael Walledisable milkymist_sysctl_icap_write(uint32_t value) "value %08x"
40196832424SMichael Walledisable milkymist_sysctl_start_timer0(void) "Start timer0"
40296832424SMichael Walledisable milkymist_sysctl_stop_timer0(void) "Stop timer0"
40396832424SMichael Walledisable milkymist_sysctl_start_timer1(void) "Start timer1"
40496832424SMichael Walledisable milkymist_sysctl_stop_timer1(void) "Stop timer1"
40596832424SMichael Walledisable milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0"
40696832424SMichael Walledisable milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1"
4070670daddSMichael Walle
4080670daddSMichael Walle# hw/milkymist-tmu2.c
4090670daddSMichael Walledisable milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
4100670daddSMichael Walledisable milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
4110670daddSMichael Walledisable milkymist_tmu2_start(void) "Start TMU"
4120670daddSMichael Walledisable milkymist_tmu2_pulse_irq(void) "Pulse IRQ"
413883de16bSMichael Walle
414883de16bSMichael Walle# hw/milkymist-uart.c
415883de16bSMichael Walledisable milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
416883de16bSMichael Walledisable milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
417883de16bSMichael Walledisable milkymist_uart_pulse_irq_rx(void) "Pulse IRQ RX"
418883de16bSMichael Walledisable milkymist_uart_pulse_irq_tx(void) "Pulse IRQ TX"
419d23948b1SMichael Walle
420d23948b1SMichael Walle# hw/milkymist-vgafb.c
421d23948b1SMichael Walledisable milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
422d23948b1SMichael Walledisable milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
423432d268cSJun Nakajima
424432d268cSJun Nakajima# xen-all.c
425432d268cSJun Nakajimadisable xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx"
426b4dd7802SAnthony PERARDdisable xen_client_set_memory(uint64_t start_addr, unsigned long size, unsigned long phys_offset, bool log_dirty) "%#"PRIx64" size %#lx, offset %#lx, log_dirty %i"
427432d268cSJun Nakajima
428432d268cSJun Nakajima# xen-mapcache.c
429e41d7c69SJan Kiszkadisable xen_map_cache(uint64_t phys_addr) "want %#"PRIx64""
430e41d7c69SJan Kiszkadisable xen_remap_bucket(uint64_t index) "index %#"PRIx64""
431e41d7c69SJan Kiszkadisable xen_map_cache_return(void* ptr) "%p"
432432d268cSJun Nakajimadisable xen_map_block(uint64_t phys_addr, uint64_t size) "%#"PRIx64", size %#"PRIx64""
433432d268cSJun Nakajimadisable xen_unmap_block(void* addr, unsigned long size) "%p, size %#lx"
434050a0ddfSAnthony PERARD
435050a0ddfSAnthony PERARD# exec.c
436050a0ddfSAnthony PERARDdisable qemu_put_ram_ptr(void* addr) "%p"
43701195b73SSteven Smith
43801195b73SSteven Smith# hw/xen_platform.c
43901195b73SSteven Smithdisable xen_platform_log(char *s) "xen platform: %s"
44000dccaf1SKevin Wolf
44100dccaf1SKevin Wolf# qemu-coroutine.c
44200dccaf1SKevin Wolfdisable qemu_coroutine_enter(void *from, void *to, void *opaque) "from %p to %p opaque %p"
44300dccaf1SKevin Wolfdisable qemu_coroutine_yield(void *from, void *to) "from %p to %p"
44400dccaf1SKevin Wolfdisable qemu_coroutine_terminate(void *co) "self %p"
445b96e9247SKevin Wolf
446b96e9247SKevin Wolf# qemu-coroutine-lock.c
447b96e9247SKevin Wolfdisable qemu_co_queue_next_bh(void) ""
448b96e9247SKevin Wolfdisable qemu_co_queue_next(void *next) "next %p"
449b96e9247SKevin Wolfdisable qemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p"
450b96e9247SKevin Wolfdisable qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p"
451b96e9247SKevin Wolfdisable qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p"
452b96e9247SKevin Wolfdisable qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p"
45330c2f238SBlue Swirl
45430c2f238SBlue Swirl# hw/escc.c
45530c2f238SBlue Swirldisable escc_put_queue(char channel, int b) "channel %c put: 0x%02x"
45630c2f238SBlue Swirldisable escc_get_queue(char channel, int val) "channel %c get 0x%02x"
45730c2f238SBlue Swirldisable escc_update_irq(int irq) "IRQ = %d"
45830c2f238SBlue Swirldisable escc_update_parameters(char channel, int speed, int parity, int data_bits, int stop_bits) "channel %c: speed=%d parity=%c data=%d stop=%d"
45930c2f238SBlue Swirldisable escc_mem_writeb_ctrl(char channel, uint32_t reg, uint32_t val) "Write channel %c, reg[%d] = %2.2x"
46030c2f238SBlue Swirldisable escc_mem_writeb_data(char channel, uint32_t val) "Write channel %c, ch %d"
46130c2f238SBlue Swirldisable escc_mem_readb_ctrl(char channel, uint32_t reg, uint8_t val) "Read channel %c, reg[%d] = %2.2x"
46230c2f238SBlue Swirldisable escc_mem_readb_data(char channel, uint32_t ret) "Read channel %c, ch %d"
46330c2f238SBlue Swirldisable escc_serial_receive_byte(char channel, int ch) "channel %c put ch %d"
46430c2f238SBlue Swirldisable escc_sunkbd_event_in(int ch) "Untranslated keycode %2.2x"
46530c2f238SBlue Swirldisable escc_sunkbd_event_out(int ch) "Translated keycode %2.2x"
46630c2f238SBlue Swirldisable escc_kbd_command(int val) "Command %d"
46730c2f238SBlue Swirldisable escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=%01x"
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