194a420b1SStefan Hajnoczi# Trace events for debugging and performance instrumentation 294a420b1SStefan Hajnoczi# 394a420b1SStefan Hajnoczi# This file is processed by the tracetool script during the build. 494a420b1SStefan Hajnoczi# 594a420b1SStefan Hajnoczi# To add a new trace event: 694a420b1SStefan Hajnoczi# 794a420b1SStefan Hajnoczi# 1. Choose a name for the trace event. Declare its arguments and format 894a420b1SStefan Hajnoczi# string. 994a420b1SStefan Hajnoczi# 1094a420b1SStefan Hajnoczi# 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() -> 1194a420b1SStefan Hajnoczi# trace_multiwrite_cb(). The source file must #include "trace.h". 1294a420b1SStefan Hajnoczi# 1394a420b1SStefan Hajnoczi# Format of a trace event: 1494a420b1SStefan Hajnoczi# 151e2cf2bcSStefan Hajnoczi# [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>" 1694a420b1SStefan Hajnoczi# 17*a74cd8ccSFrediano Ziglio# Example: g_malloc(size_t size) "size %zu" 1894a420b1SStefan Hajnoczi# 191e2cf2bcSStefan Hajnoczi# The "disable" keyword will build without the trace event. 201e2cf2bcSStefan Hajnoczi# 2194a420b1SStefan Hajnoczi# The <name> must be a valid as a C function name. 2294a420b1SStefan Hajnoczi# 2394a420b1SStefan Hajnoczi# Types should be standard C types. Use void * for pointers because the trace 2494a420b1SStefan Hajnoczi# system may not have the necessary headers included. 2594a420b1SStefan Hajnoczi# 2694a420b1SStefan Hajnoczi# The <format-string> should be a sprintf()-compatible format string. 27cd245a19SStefan Hajnoczi 28cd245a19SStefan Hajnoczi# qemu-malloc.c 29*a74cd8ccSFrediano Zigliog_malloc(size_t size, void *ptr) "size %zu ptr %p" 30*a74cd8ccSFrediano Zigliog_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p" 31*a74cd8ccSFrediano Zigliog_free(void *ptr) "ptr %p" 32cd245a19SStefan Hajnoczi 33cd245a19SStefan Hajnoczi# osdep.c 3447f08d7aSLluísqemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p" 3547f08d7aSLluísqemu_vmalloc(size_t size, void *ptr) "size %zu ptr %p" 3647f08d7aSLluísqemu_vfree(void *ptr) "ptr %p" 376d519a5fSStefan Hajnoczi 3864979a4dSStefan Hajnoczi# hw/virtio.c 3947f08d7aSLluísvirtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u" 4047f08d7aSLluísvirtqueue_flush(void *vq, unsigned int count) "vq %p count %u" 4147f08d7aSLluísvirtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u" 4247f08d7aSLluísvirtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p" 4347f08d7aSLluísvirtio_irq(void *vq) "vq %p" 4447f08d7aSLluísvirtio_notify(void *vdev, void *vq) "vdev %p vq %p" 4564979a4dSStefan Hajnoczi 4649e3fdd7SAmit Shah# hw/virtio-serial-bus.c 4747f08d7aSLluísvirtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u" 4847f08d7aSLluísvirtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d" 4947f08d7aSLluísvirtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u" 5047f08d7aSLluísvirtio_serial_handle_control_message_port(unsigned int port) "port %u" 5149e3fdd7SAmit Shah 52d02e4fa4SAmit Shah# hw/virtio-console.c 5347f08d7aSLluísvirtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd" 5447f08d7aSLluísvirtio_console_chr_read(unsigned int port, int size) "port %u, size %d" 5547f08d7aSLluísvirtio_console_chr_event(unsigned int port, int event) "port %u, event %d" 56d02e4fa4SAmit Shah 576d519a5fSStefan Hajnoczi# block.c 5847f08d7aSLluísmultiwrite_cb(void *mcb, int ret) "mcb %p ret %d" 5947f08d7aSLluísbdrv_aio_multiwrite(void *mcb, int num_callbacks, int num_reqs) "mcb %p num_callbacks %d num_reqs %d" 6047f08d7aSLluísbdrv_aio_multiwrite_earlyfail(void *mcb) "mcb %p" 6147f08d7aSLluísbdrv_aio_multiwrite_latefail(void *mcb, int i) "mcb %p i %d" 6247f08d7aSLluísbdrv_aio_flush(void *bs, void *opaque) "bs %p opaque %p" 6347f08d7aSLluísbdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" 6447f08d7aSLluísbdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" 6547f08d7aSLluísbdrv_set_locked(void *bs, int locked) "bs %p locked %d" 6647f08d7aSLluísbdrv_co_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d" 6747f08d7aSLluísbdrv_co_writev(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d" 6847f08d7aSLluísbdrv_co_io(int is_write, void *acb) "is_write %d acb %p" 696d519a5fSStefan Hajnoczi 706d519a5fSStefan Hajnoczi# hw/virtio-blk.c 7147f08d7aSLluísvirtio_blk_req_complete(void *req, int status) "req %p status %d" 7247f08d7aSLluísvirtio_blk_rw_complete(void *req, int ret) "req %p ret %d" 7347f08d7aSLluísvirtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu" 746d519a5fSStefan Hajnoczi 756d519a5fSStefan Hajnoczi# posix-aio-compat.c 7647f08d7aSLluíspaio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d" 7747f08d7aSLluíspaio_complete(void *acb, void *opaque, int ret) "acb %p opaque %p ret %d" 7847f08d7aSLluíspaio_cancel(void *acb, void *opaque) "acb %p opaque %p" 79bd3c9aa5SPrerna Saxena 80bd3c9aa5SPrerna Saxena# ioport.c 8147f08d7aSLluíscpu_in(unsigned int addr, unsigned int val) "addr %#x value %u" 8247f08d7aSLluíscpu_out(unsigned int addr, unsigned int val) "addr %#x value %u" 8362dd89deSPrerna Saxena 8462dd89deSPrerna Saxena# balloon.c 8562dd89deSPrerna Saxena# Since requests are raised via monitor, not many tracepoints are needed. 8647f08d7aSLluísballoon_event(void *opaque, unsigned long addr) "opaque %p addr %lu" 87d8023f31SBlue Swirl 88d8023f31SBlue Swirl# hw/apic.c 8947f08d7aSLluísapic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d" 9047f08d7aSLluísapic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d" 9147f08d7aSLluíscpu_set_apic_base(uint64_t val) "%016"PRIx64"" 9247f08d7aSLluíscpu_get_apic_base(uint64_t val) "%016"PRIx64"" 9347f08d7aSLluísapic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x" 9447f08d7aSLluísapic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x" 95d8023f31SBlue Swirl# coalescing 9647f08d7aSLluísapic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d" 9747f08d7aSLluísapic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d" 9847f08d7aSLluísapic_set_irq(int apic_irq_delivered) "coalescing %d" 9997bf4851SBlue Swirl 10097bf4851SBlue Swirl# hw/cs4231.c 10147f08d7aSLluíscs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x" 10247f08d7aSLluíscs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x" 10347f08d7aSLluíscs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x" 10447f08d7aSLluíscs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x" 10597bf4851SBlue Swirl 106d43ed9ecSHervé Poussineau# hw/ds1225y.c 10747f08d7aSLluísnvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x" 10847f08d7aSLluísnvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x" 109d43ed9ecSHervé Poussineau 11097bf4851SBlue Swirl# hw/eccmemctl.c 11147f08d7aSLluísecc_mem_writel_mer(uint32_t val) "Write memory enable %08x" 11247f08d7aSLluísecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x" 11347f08d7aSLluísecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x" 11447f08d7aSLluísecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x" 11547f08d7aSLluísecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x" 11647f08d7aSLluísecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x" 11747f08d7aSLluísecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x" 11847f08d7aSLluísecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x" 11947f08d7aSLluísecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x" 12047f08d7aSLluísecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x" 12147f08d7aSLluísecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x" 12247f08d7aSLluísecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x" 12347f08d7aSLluísecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x" 12447f08d7aSLluísecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x" 12547f08d7aSLluísecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x" 12647f08d7aSLluísecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x" 12747f08d7aSLluísecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x" 12847f08d7aSLluísecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x" 12997bf4851SBlue Swirl 13097bf4851SBlue Swirl# hw/lance.c 13147f08d7aSLluíslance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x" 13247f08d7aSLluíslance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x" 13397bf4851SBlue Swirl 13497bf4851SBlue Swirl# hw/slavio_intctl.c 13547f08d7aSLluísslavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x" 13647f08d7aSLluísslavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x" 13747f08d7aSLluísslavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x" 13847f08d7aSLluísslavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x" 13947f08d7aSLluísslavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x" 14047f08d7aSLluísslavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x" 14147f08d7aSLluísslavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x" 14247f08d7aSLluísslavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x" 14347f08d7aSLluísslavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d" 14447f08d7aSLluísslavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x" 14547f08d7aSLluísslavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d" 14647f08d7aSLluísslavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d" 14797bf4851SBlue Swirl 14897bf4851SBlue Swirl# hw/slavio_misc.c 14947f08d7aSLluísslavio_misc_update_irq_raise(void) "Raise IRQ" 15047f08d7aSLluísslavio_misc_update_irq_lower(void) "Lower IRQ" 15147f08d7aSLluísslavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d" 15247f08d7aSLluísslavio_cfg_mem_writeb(uint32_t val) "Write config %02x" 15347f08d7aSLluísslavio_cfg_mem_readb(uint32_t ret) "Read config %02x" 15447f08d7aSLluísslavio_diag_mem_writeb(uint32_t val) "Write diag %02x" 15547f08d7aSLluísslavio_diag_mem_readb(uint32_t ret) "Read diag %02x" 15647f08d7aSLluísslavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x" 15747f08d7aSLluísslavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x" 15847f08d7aSLluísslavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x" 15947f08d7aSLluísslavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x" 16047f08d7aSLluísslavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x" 16147f08d7aSLluísslavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x" 16247f08d7aSLluísapc_mem_writeb(uint32_t val) "Write power management %02x" 16347f08d7aSLluísapc_mem_readb(uint32_t ret) "Read power management %02x" 16447f08d7aSLluísslavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x" 16547f08d7aSLluísslavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x" 16647f08d7aSLluísslavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x" 16747f08d7aSLluísslavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x" 16897bf4851SBlue Swirl 16997bf4851SBlue Swirl# hw/slavio_timer.c 17047f08d7aSLluísslavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x" 17147f08d7aSLluísslavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x" 17247f08d7aSLluísslavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64"" 17347f08d7aSLluísslavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x" 17447f08d7aSLluísslavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x" 17547f08d7aSLluísslavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64"" 17647f08d7aSLluísslavio_timer_mem_writel_counter_invalid(void) "not user timer" 17747f08d7aSLluísslavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started" 17847f08d7aSLluísslavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped" 17947f08d7aSLluísslavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer" 18047f08d7aSLluísslavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter" 18147f08d7aSLluísslavio_timer_mem_writel_mode_invalid(void) "not system timer" 18247f08d7aSLluísslavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64"" 18397bf4851SBlue Swirl 18497bf4851SBlue Swirl# hw/sparc32_dma.c 18547f08d7aSLluísledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64"" 18647f08d7aSLluísledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64"" 18747f08d7aSLluíssparc32_dma_set_irq_raise(void) "Raise IRQ" 18847f08d7aSLluíssparc32_dma_set_irq_lower(void) "Lower IRQ" 18947f08d7aSLluísespdma_memory_read(uint32_t addr) "DMA read addr 0x%08x" 19047f08d7aSLluísespdma_memory_write(uint32_t addr) "DMA write addr 0x%08x" 19147f08d7aSLluíssparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x" 19247f08d7aSLluíssparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x" 19347f08d7aSLluíssparc32_dma_enable_raise(void) "Raise DMA enable" 19447f08d7aSLluíssparc32_dma_enable_lower(void) "Lower DMA enable" 19597bf4851SBlue Swirl 19697bf4851SBlue Swirl# hw/sun4m.c 19747f08d7aSLluíssun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d" 19847f08d7aSLluíssun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d" 19947f08d7aSLluíssun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d" 20047f08d7aSLluíssun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d" 20197bf4851SBlue Swirl 20297bf4851SBlue Swirl# hw/sun4m_iommu.c 20347f08d7aSLluíssun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x" 20447f08d7aSLluíssun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x" 20547f08d7aSLluíssun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64"" 20647f08d7aSLluíssun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x" 20747f08d7aSLluíssun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x" 20847f08d7aSLluíssun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x" 20947f08d7aSLluíssun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x" 21047f08d7aSLluíssun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64"" 21194b0b5ffSStefan Hajnoczi 212439a97ccSGerd Hoffmann# hw/usb-ehci.c 21347f08d7aSLluísusb_ehci_reset(void) "=== RESET ===" 21447f08d7aSLluísusb_ehci_mmio_readl(uint32_t addr, const char *str, uint32_t val) "rd mmio %04x [%s] = %x" 21547f08d7aSLluísusb_ehci_mmio_writel(uint32_t addr, const char *str, uint32_t val) "wr mmio %04x [%s] = %x" 21647f08d7aSLluísusb_ehci_mmio_change(uint32_t addr, const char *str, uint32_t new, uint32_t old) "ch mmio %04x [%s] = %x (old: %x)" 21747f08d7aSLluísusb_ehci_usbsts(const char *sts, int state) "usbsts %s %d" 21847f08d7aSLluísusb_ehci_state(const char *schedule, const char *state) "%s schedule %s" 21947f08d7aSLluísusb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ %08x: next %08x qtds %08x,%08x,%08x" 22047f08d7aSLluísusb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int devaddr) "QH @ %08x - rl %d, mplen %d, eps %d, ep %d, dev %d" 22147f08d7aSLluísusb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ %08x - c %d, h %d, dtc %d, i %d" 22247f08d7aSLluísusb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) "q %p - QTD @ %08x: next %08x altnext %08x" 22347f08d7aSLluísusb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) "QTD @ %08x - tbytes %d, cpage %d, cerr %d, pid %d" 22447f08d7aSLluísusb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, int xacterr) "QTD @ %08x - ioc %d, active %d, halt %d, babble %d, xacterr %d" 22547f08d7aSLluísusb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) "ITD @ %08x: next %08x - mplen %d, mult %d, ep %d, dev %d" 22647f08d7aSLluísusb_ehci_port_attach(uint32_t port, const char *device) "attach port #%d - %s" 22747f08d7aSLluísusb_ehci_port_detach(uint32_t port) "detach port #%d" 22847f08d7aSLluísusb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d" 22947f08d7aSLluísusb_ehci_data(int rw, uint32_t cpage, uint32_t offset, uint32_t addr, uint32_t len, uint32_t bufpos) "write %d, cpage %d, offset 0x%03x, addr 0x%08x, len %d, bufpos %d" 23047f08d7aSLluísusb_ehci_queue_action(void *q, const char *action) "q %p: %s" 231439a97ccSGerd Hoffmann 23237fb59d3SGerd Hoffmann# hw/usb-desc.c 23347f08d7aSLluísusb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d" 23447f08d7aSLluísusb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d" 23547f08d7aSLluísusb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" 23647f08d7aSLluísusb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" 23747f08d7aSLluísusb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d" 23847f08d7aSLluísusb_set_addr(int addr) "dev %d" 23947f08d7aSLluísusb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d" 24047f08d7aSLluísusb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" 24147f08d7aSLluísusb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" 24237fb59d3SGerd Hoffmann 2435138efecSPaolo Bonzini# hw/scsi-bus.c 24447f08d7aSLluísscsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d" 24547f08d7aSLluísscsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d" 24647f08d7aSLluísscsi_req_dequeue(int target, int lun, int tag) "target %d lun %d tag %d" 24747f08d7aSLluísscsi_req_continue(int target, int lun, int tag) "target %d lun %d tag %d" 24847f08d7aSLluísscsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) "target %d lun %d tag %d command %d dir %d length %d" 24947f08d7aSLluísscsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) "target %d lun %d tag %d command %d lba %"PRIu64"" 25047f08d7aSLluísscsi_req_parse_bad(int target, int lun, int tag, int cmd) "target %d lun %d tag %d command %d" 25147f08d7aSLluísscsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) "target %d lun %d tag %d key %#02x asc %#02x ascq %#02x" 25247f08d7aSLluísscsi_report_luns(int target, int lun, int tag) "target %d lun %d tag %d" 25347f08d7aSLluísscsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) "target %d lun %d tag %d page %#02x/%#02x" 25447f08d7aSLluísscsi_test_unit_ready(int target, int lun, int tag) "target %d lun %d tag %d" 25547f08d7aSLluísscsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d" 2565138efecSPaolo Bonzini 25794b0b5ffSStefan Hajnoczi# vl.c 25847f08d7aSLluísvm_state_notify(int running, int reason) "running %d reason %d" 259298800caSStefan Hajnoczi 260298800caSStefan Hajnoczi# block/qed-l2-cache.c 26147f08d7aSLluísqed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p" 26247f08d7aSLluísqed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d" 26347f08d7aSLluísqed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d" 264298800caSStefan Hajnoczi 265298800caSStefan Hajnoczi# block/qed-table.c 26647f08d7aSLluísqed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p" 26747f08d7aSLluísqed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d" 26847f08d7aSLluísqed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u" 26947f08d7aSLluísqed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d" 270eabba580SStefan Hajnoczi 271eabba580SStefan Hajnoczi# block/qed.c 27247f08d7aSLluísqed_need_check_timer_cb(void *s) "s %p" 27347f08d7aSLluísqed_start_need_check_timer(void *s) "s %p" 27447f08d7aSLluísqed_cancel_need_check_timer(void *s) "s %p" 27547f08d7aSLluísqed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d" 27647f08d7aSLluísqed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int is_write) "s %p acb %p sector_num %"PRId64" nb_sectors %d opaque %p is_write %d" 27747f08d7aSLluísqed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p acb %p ret %d cur_pos %"PRIu64"" 27847f08d7aSLluísqed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" 27947f08d7aSLluísqed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" 28047f08d7aSLluísqed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64"" 28147f08d7aSLluísqed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64"" 28247f08d7aSLluísqed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" 2830f3a4a01SFabien Chouteau 284b213b370SHervé Poussineau# hw/g364fb.c 28547f08d7aSLluísg364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x" 28647f08d7aSLluísg364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x" 287b213b370SHervé Poussineau 2880f3a4a01SFabien Chouteau# hw/grlib_gptimer.c 28947f08d7aSLluísgrlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run" 29047f08d7aSLluísgrlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x" 29147f08d7aSLluísgrlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x" 29247f08d7aSLluísgrlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x" 29347f08d7aSLluísgrlib_gptimer_hit(int id) "timer:%d HIT" 29447f08d7aSLluísgrlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x" 29547f08d7aSLluísgrlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x" 2963f10bcbbSFabien Chouteau 2973f10bcbbSFabien Chouteau# hw/grlib_irqmp.c 29847f08d7aSLluísgrlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x\n" 29947f08d7aSLluísgrlib_irqmp_ack(int intno) "interrupt:%d" 30047f08d7aSLluísgrlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d" 30147f08d7aSLluísgrlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64"" 30247f08d7aSLluísgrlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x" 3038b1e1320SFabien Chouteau 3048b1e1320SFabien Chouteau# hw/grlib_apbuart.c 30547f08d7aSLluísgrlib_apbuart_event(int event) "event:%d" 30647f08d7aSLluísgrlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x" 307b04d9890SFabien Chouteau 308b04d9890SFabien Chouteau# hw/leon3.c 30947f08d7aSLluísleon3_set_irq(int intno) "Set CPU IRQ %d" 31047f08d7aSLluísleon3_reset_irq(int intno) "Reset CPU IRQ %d" 3119363ee31SAnthony Liguori 312cbcc6336SAlon Levy# spice-qemu-char.c 31347f08d7aSLluísspice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested %d" 31447f08d7aSLluísspice_vmc_read(int bytes, int len) "spice read %d of requested %d" 31547f08d7aSLluísspice_vmc_register_interface(void *scd) "spice vmc registered interface %p" 31647f08d7aSLluísspice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p" 3174ef66fa7SMichael Walle 3184ef66fa7SMichael Walle# hw/lm32_pic.c 31947f08d7aSLluíslm32_pic_raise_irq(void) "Raise CPU interrupt" 32047f08d7aSLluíslm32_pic_lower_irq(void) "Lower CPU interrupt" 32147f08d7aSLluíslm32_pic_interrupt(int irq, int level) "Set IRQ%d %d" 32247f08d7aSLluíslm32_pic_set_im(uint32_t im) "im 0x%08x" 32347f08d7aSLluíslm32_pic_set_ip(uint32_t ip) "ip 0x%08x" 32447f08d7aSLluíslm32_pic_get_im(uint32_t im) "im 0x%08x" 32547f08d7aSLluíslm32_pic_get_ip(uint32_t ip) "ip 0x%08x" 32615d7dc4fSMichael Walle 32715d7dc4fSMichael Walle# hw/lm32_juart.c 32847f08d7aSLluíslm32_juart_get_jtx(uint32_t value) "jtx 0x%08x" 32947f08d7aSLluíslm32_juart_set_jtx(uint32_t value) "jtx 0x%08x" 33047f08d7aSLluíslm32_juart_get_jrx(uint32_t value) "jrx 0x%08x" 33147f08d7aSLluíslm32_juart_set_jrx(uint32_t value) "jrx 0x%08x" 332ea7924dcSMichael Walle 333ea7924dcSMichael Walle# hw/lm32_timer.c 33447f08d7aSLluíslm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 33547f08d7aSLluíslm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 33647f08d7aSLluíslm32_timer_hit(void) "timer hit" 33747f08d7aSLluíslm32_timer_irq_state(int level) "irq state %d" 338770ae571SMichael Walle 339770ae571SMichael Walle# hw/lm32_uart.c 34047f08d7aSLluíslm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 34147f08d7aSLluíslm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 34247f08d7aSLluíslm32_uart_irq_state(int level) "irq state %d" 343f19410caSMichael Walle 344f19410caSMichael Walle# hw/lm32_sys.c 34547f08d7aSLluíslm32_sys_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 34625a8bb96SMichael Walle 34725a8bb96SMichael Walle# hw/milkymist-ac97.c 34847f08d7aSLluísmilkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 34947f08d7aSLluísmilkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 35047f08d7aSLluísmilkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request" 35147f08d7aSLluísmilkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply" 35247f08d7aSLluísmilkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write" 35347f08d7aSLluísmilkymist_ac97_pulse_irq_dmar(void) "Pulse IRQ DMA read" 35447f08d7aSLluísmilkymist_ac97_in_cb(int avail, uint32_t remaining) "avail %d remaining %u" 35547f08d7aSLluísmilkymist_ac97_in_cb_transferred(int transferred) "transferred %d" 35647f08d7aSLluísmilkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u" 35747f08d7aSLluísmilkymist_ac97_out_cb_transferred(int transferred) "transferred %d" 358e4dc6d2cSMichael Walle 359e4dc6d2cSMichael Walle# hw/milkymist-hpdmc.c 36047f08d7aSLluísmilkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x" 36147f08d7aSLluísmilkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x" 362b4e37d98SMichael Walle 363b4e37d98SMichael Walle# hw/milkymist-memcard.c 36447f08d7aSLluísmilkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 36547f08d7aSLluísmilkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 36607424544SMichael Walle 36757aa265dSMichael Walle# hw/milkymist-minimac2.c 36847f08d7aSLluísmilkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 36947f08d7aSLluísmilkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 37047f08d7aSLluísmilkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x" 37147f08d7aSLluísmilkymist_minimac2_mdio_read(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x" 37247f08d7aSLluísmilkymist_minimac2_tx_frame(uint32_t length) "length %u" 37347f08d7aSLluísmilkymist_minimac2_rx_frame(const void *buf, uint32_t length) "buf %p length %u" 37447f08d7aSLluísmilkymist_minimac2_drop_rx_frame(const void *buf) "buf %p" 37547f08d7aSLluísmilkymist_minimac2_rx_transfer(const void *buf, uint32_t length) "buf %p length %d" 37647f08d7aSLluísmilkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX" 37747f08d7aSLluísmilkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX" 37847f08d7aSLluísmilkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX" 3795ee18b9cSMichael Walle 3805ee18b9cSMichael Walle# hw/milkymist-pfpu.c 38147f08d7aSLluísmilkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 38247f08d7aSLluísmilkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 38347f08d7aSLluísmilkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x" 38447f08d7aSLluísmilkymist_pfpu_pulse_irq(void) "Pulse IRQ" 38587a381ecSMichael Walle 38687a381ecSMichael Walle# hw/milkymist-softusb.c 38747f08d7aSLluísmilkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 38847f08d7aSLluísmilkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 38947f08d7aSLluísmilkymist_softusb_mevt(uint8_t m) "m %d" 39047f08d7aSLluísmilkymist_softusb_kevt(uint8_t m) "m %d" 39147f08d7aSLluísmilkymist_softusb_mouse_event(int dx, int dy, int dz, int bs) "dx %d dy %d dz %d bs %02x" 39247f08d7aSLluísmilkymist_softusb_pulse_irq(void) "Pulse IRQ" 39396832424SMichael Walle 39496832424SMichael Walle# hw/milkymist-sysctl.c 39547f08d7aSLluísmilkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 39647f08d7aSLluísmilkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 39747f08d7aSLluísmilkymist_sysctl_icap_write(uint32_t value) "value %08x" 39847f08d7aSLluísmilkymist_sysctl_start_timer0(void) "Start timer0" 39947f08d7aSLluísmilkymist_sysctl_stop_timer0(void) "Stop timer0" 40047f08d7aSLluísmilkymist_sysctl_start_timer1(void) "Start timer1" 40147f08d7aSLluísmilkymist_sysctl_stop_timer1(void) "Stop timer1" 40247f08d7aSLluísmilkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0" 40347f08d7aSLluísmilkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1" 4040670daddSMichael Walle 4050670daddSMichael Walle# hw/milkymist-tmu2.c 40647f08d7aSLluísmilkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 40747f08d7aSLluísmilkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 40847f08d7aSLluísmilkymist_tmu2_start(void) "Start TMU" 40947f08d7aSLluísmilkymist_tmu2_pulse_irq(void) "Pulse IRQ" 410883de16bSMichael Walle 411883de16bSMichael Walle# hw/milkymist-uart.c 41247f08d7aSLluísmilkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 41347f08d7aSLluísmilkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 41447f08d7aSLluísmilkymist_uart_pulse_irq_rx(void) "Pulse IRQ RX" 41547f08d7aSLluísmilkymist_uart_pulse_irq_tx(void) "Pulse IRQ TX" 416d23948b1SMichael Walle 417d23948b1SMichael Walle# hw/milkymist-vgafb.c 41847f08d7aSLluísmilkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 41947f08d7aSLluísmilkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 420432d268cSJun Nakajima 421432d268cSJun Nakajima# xen-all.c 42247f08d7aSLluísxen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx" 42347f08d7aSLluísxen_client_set_memory(uint64_t start_addr, unsigned long size, unsigned long phys_offset, bool log_dirty) "%#"PRIx64" size %#lx, offset %#lx, log_dirty %i" 424432d268cSJun Nakajima 425432d268cSJun Nakajima# xen-mapcache.c 42647f08d7aSLluísxen_map_cache(uint64_t phys_addr) "want %#"PRIx64"" 42747f08d7aSLluísxen_remap_bucket(uint64_t index) "index %#"PRIx64"" 42847f08d7aSLluísxen_map_cache_return(void* ptr) "%p" 42947f08d7aSLluísxen_map_block(uint64_t phys_addr, uint64_t size) "%#"PRIx64", size %#"PRIx64"" 43047f08d7aSLluísxen_unmap_block(void* addr, unsigned long size) "%p, size %#lx" 431050a0ddfSAnthony PERARD 432050a0ddfSAnthony PERARD# exec.c 43347f08d7aSLluísqemu_put_ram_ptr(void* addr) "%p" 43401195b73SSteven Smith 43501195b73SSteven Smith# hw/xen_platform.c 43647f08d7aSLluísxen_platform_log(char *s) "xen platform: %s" 43700dccaf1SKevin Wolf 43800dccaf1SKevin Wolf# qemu-coroutine.c 43947f08d7aSLluísqemu_coroutine_enter(void *from, void *to, void *opaque) "from %p to %p opaque %p" 44047f08d7aSLluísqemu_coroutine_yield(void *from, void *to) "from %p to %p" 44147f08d7aSLluísqemu_coroutine_terminate(void *co) "self %p" 442b96e9247SKevin Wolf 443b96e9247SKevin Wolf# qemu-coroutine-lock.c 44447f08d7aSLluísqemu_co_queue_next_bh(void) "" 44547f08d7aSLluísqemu_co_queue_next(void *next) "next %p" 44647f08d7aSLluísqemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p" 44747f08d7aSLluísqemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p" 44847f08d7aSLluísqemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p" 44947f08d7aSLluísqemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p" 45030c2f238SBlue Swirl 45130c2f238SBlue Swirl# hw/escc.c 45247f08d7aSLluísescc_put_queue(char channel, int b) "channel %c put: 0x%02x" 45347f08d7aSLluísescc_get_queue(char channel, int val) "channel %c get 0x%02x" 45447f08d7aSLluísescc_update_irq(int irq) "IRQ = %d" 45547f08d7aSLluísescc_update_parameters(char channel, int speed, int parity, int data_bits, int stop_bits) "channel %c: speed=%d parity=%c data=%d stop=%d" 45647f08d7aSLluísescc_mem_writeb_ctrl(char channel, uint32_t reg, uint32_t val) "Write channel %c, reg[%d] = %2.2x" 45747f08d7aSLluísescc_mem_writeb_data(char channel, uint32_t val) "Write channel %c, ch %d" 45847f08d7aSLluísescc_mem_readb_ctrl(char channel, uint32_t reg, uint8_t val) "Read channel %c, reg[%d] = %2.2x" 45947f08d7aSLluísescc_mem_readb_data(char channel, uint32_t ret) "Read channel %c, ch %d" 46047f08d7aSLluísescc_serial_receive_byte(char channel, int ch) "channel %c put ch %d" 46147f08d7aSLluísescc_sunkbd_event_in(int ch) "Untranslated keycode %2.2x" 46247f08d7aSLluísescc_sunkbd_event_out(int ch) "Translated keycode %2.2x" 46347f08d7aSLluísescc_kbd_command(int val) "Command %d" 46447f08d7aSLluísescc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=%01x" 465