xref: /qemu/tests/tcg/ppc64/bcdsub.c (revision 37b0dba45c4e44a02000a4170f25af0110f501d5)
1936fda4dSFabiano Rosas #include <assert.h>
2936fda4dSFabiano Rosas #include <unistd.h>
3936fda4dSFabiano Rosas #include <signal.h>
48189cb85SMatheus Ferst #include <stdint.h>
5936fda4dSFabiano Rosas 
6936fda4dSFabiano Rosas #define CRF_LT  (1 << 3)
7936fda4dSFabiano Rosas #define CRF_GT  (1 << 2)
8936fda4dSFabiano Rosas #define CRF_EQ  (1 << 1)
9936fda4dSFabiano Rosas #define CRF_SO  (1 << 0)
10936fda4dSFabiano Rosas #define UNDEF   0
11936fda4dSFabiano Rosas 
1263c2b746SMatheus Ferst #ifdef __has_builtin
1363c2b746SMatheus Ferst #if !__has_builtin(__builtin_bcdsub)
1463c2b746SMatheus Ferst #define NO_BUILTIN_BCDSUB
1563c2b746SMatheus Ferst #endif
1663c2b746SMatheus Ferst #endif
1763c2b746SMatheus Ferst 
1863c2b746SMatheus Ferst #ifdef NO_BUILTIN_BCDSUB
1963c2b746SMatheus Ferst #define BCDSUB(T, A, B, PS) \
2063c2b746SMatheus Ferst     ".long 4 << 26 | (" #T ") << 21 | (" #A ") << 16 | (" #B ") << 11"  \
2163c2b746SMatheus Ferst     " | 1 << 10 | (" #PS ") << 9 | 65\n\t"
2263c2b746SMatheus Ferst #else
2363c2b746SMatheus Ferst #define BCDSUB(T, A, B, PS) "bcdsub. " #T ", " #A ", " #B ", " #PS "\n\t"
2463c2b746SMatheus Ferst #endif
2563c2b746SMatheus Ferst 
2663c2b746SMatheus Ferst #define TEST(AH, AL, BH, BL, PS, TH, TL, CR6)                                  \
2763c2b746SMatheus Ferst     do {                                                                       \
2863c2b746SMatheus Ferst         int cr = 0;                                                            \
2963c2b746SMatheus Ferst         uint64_t th, tl;                                                       \
3063c2b746SMatheus Ferst         /*                                                                     \
3163c2b746SMatheus Ferst          * Use GPR pairs to load the VSR values and place the resulting VSR and\
3263c2b746SMatheus Ferst          * CR6 in th, tl, and cr. Note that we avoid newer instructions (e.g., \
3363c2b746SMatheus Ferst          * mtvsrdd/mfvsrld) so we can run this test on POWER8 machines.        \
3463c2b746SMatheus Ferst          */                                                                    \
358189cb85SMatheus Ferst         asm ("mtvsrd 32, %3\n\t"                                               \
368189cb85SMatheus Ferst              "mtvsrd 33, %4\n\t"                                               \
378189cb85SMatheus Ferst              "xxmrghd 32, 32, 33\n\t"                                          \
388189cb85SMatheus Ferst              "mtvsrd 33, %5\n\t"                                               \
398189cb85SMatheus Ferst              "mtvsrd 34, %6\n\t"                                               \
408189cb85SMatheus Ferst              "xxmrghd 33, 33, 34\n\t"                                          \
4163c2b746SMatheus Ferst              BCDSUB(0, 0, 1, PS)                                               \
428189cb85SMatheus Ferst              "mfocrf %0, 0b10\n\t"                                             \
438189cb85SMatheus Ferst              "mfvsrd %1, 32\n\t"                                               \
448189cb85SMatheus Ferst              "xxswapd 32, 32\n\t"                                              \
458189cb85SMatheus Ferst              "mfvsrd %2, 32\n\t"                                               \
468189cb85SMatheus Ferst              : "=r" (cr), "=r" (th), "=r" (tl)                                 \
4763c2b746SMatheus Ferst              : "r" (AH), "r" (AL), "r" (BH), "r" (BL)                          \
4863c2b746SMatheus Ferst              : "v0", "v1", "v2");                                              \
498189cb85SMatheus Ferst         if (TH != UNDEF || TL != UNDEF) {                                      \
508189cb85SMatheus Ferst             assert(tl == TL);                                                  \
518189cb85SMatheus Ferst             assert(th == TH);                                                  \
528189cb85SMatheus Ferst         }                                                                      \
538189cb85SMatheus Ferst         assert((cr >> 4) == CR6);                                              \
54936fda4dSFabiano Rosas     } while (0)
55936fda4dSFabiano Rosas 
56936fda4dSFabiano Rosas /*
57936fda4dSFabiano Rosas  * Unbounded result is equal to zero:
58936fda4dSFabiano Rosas  *   sign = (PS) ? 0b1111 : 0b1100
59936fda4dSFabiano Rosas  *   CR6 = 0b0010
60936fda4dSFabiano Rosas  */
test_bcdsub_eq(void)61936fda4dSFabiano Rosas void test_bcdsub_eq(void)
62936fda4dSFabiano Rosas {
63936fda4dSFabiano Rosas     /* maximum positive BCD value */
648189cb85SMatheus Ferst     TEST(0x9999999999999999, 0x999999999999999c,
658189cb85SMatheus Ferst          0x9999999999999999, 0x999999999999999c,
668189cb85SMatheus Ferst          0, 0x0, 0xc, CRF_EQ);
678189cb85SMatheus Ferst     TEST(0x9999999999999999, 0x999999999999999c,
688189cb85SMatheus Ferst          0x9999999999999999, 0x999999999999999c,
698189cb85SMatheus Ferst          1, 0x0, 0xf, CRF_EQ);
70936fda4dSFabiano Rosas }
71936fda4dSFabiano Rosas 
72936fda4dSFabiano Rosas /*
73936fda4dSFabiano Rosas  * Unbounded result is greater than zero:
74936fda4dSFabiano Rosas  *   sign = (PS) ? 0b1111 : 0b1100
75936fda4dSFabiano Rosas  *   CR6 = (overflow) ? 0b0101 : 0b0100
76936fda4dSFabiano Rosas  */
test_bcdsub_gt(void)77936fda4dSFabiano Rosas void test_bcdsub_gt(void)
78936fda4dSFabiano Rosas {
798189cb85SMatheus Ferst     /* maximum positive and negative one BCD values */
808189cb85SMatheus Ferst     TEST(0x9999999999999999, 0x999999999999999c, 0x0, 0x1d, 0,
818189cb85SMatheus Ferst          0x0, 0xc, (CRF_GT | CRF_SO));
828189cb85SMatheus Ferst     TEST(0x9999999999999999, 0x999999999999999c, 0x0, 0x1d, 1,
838189cb85SMatheus Ferst          0x0, 0xf, (CRF_GT | CRF_SO));
84936fda4dSFabiano Rosas 
858189cb85SMatheus Ferst     TEST(0x9999999999999999, 0x999999999999998c, 0x0, 0x1d, 0,
868189cb85SMatheus Ferst          0x9999999999999999, 0x999999999999999c, CRF_GT);
878189cb85SMatheus Ferst     TEST(0x9999999999999999, 0x999999999999998c, 0x0, 0x1d, 1,
888189cb85SMatheus Ferst          0x9999999999999999, 0x999999999999999f, CRF_GT);
89936fda4dSFabiano Rosas }
90936fda4dSFabiano Rosas 
91936fda4dSFabiano Rosas /*
92936fda4dSFabiano Rosas  * Unbounded result is less than zero:
93936fda4dSFabiano Rosas  *   sign = 0b1101
94936fda4dSFabiano Rosas  *   CR6 = (overflow) ? 0b1001 : 0b1000
95936fda4dSFabiano Rosas  */
test_bcdsub_lt(void)96936fda4dSFabiano Rosas void test_bcdsub_lt(void)
97936fda4dSFabiano Rosas {
988189cb85SMatheus Ferst     /* positive zero and positive one BCD values */
998189cb85SMatheus Ferst     TEST(0x0, 0xc, 0x0, 0x1c, 0, 0x0, 0x1d, CRF_LT);
1008189cb85SMatheus Ferst     TEST(0x0, 0xc, 0x0, 0x1c, 1, 0x0, 0x1d, CRF_LT);
101936fda4dSFabiano Rosas 
1028189cb85SMatheus Ferst     /* maximum negative and positive one BCD values */
1038189cb85SMatheus Ferst     TEST(0x9999999999999999, 0x999999999999999d, 0x0, 0x1c, 0,
1048189cb85SMatheus Ferst          0x0, 0xd, (CRF_LT | CRF_SO));
1058189cb85SMatheus Ferst     TEST(0x9999999999999999, 0x999999999999999d, 0x0, 0x1c, 1,
1068189cb85SMatheus Ferst          0x0, 0xd, (CRF_LT | CRF_SO));
107936fda4dSFabiano Rosas }
108936fda4dSFabiano Rosas 
test_bcdsub_invalid(void)109936fda4dSFabiano Rosas void test_bcdsub_invalid(void)
110936fda4dSFabiano Rosas {
1118189cb85SMatheus Ferst     TEST(0x0, 0x1c, 0x0, 0xf00, 0, UNDEF, UNDEF, CRF_SO);
1128189cb85SMatheus Ferst     TEST(0x0, 0x1c, 0x0, 0xf00, 1, UNDEF, UNDEF, CRF_SO);
113936fda4dSFabiano Rosas 
1148189cb85SMatheus Ferst     TEST(0x0, 0xf00, 0x0, 0x1c, 0, UNDEF, UNDEF, CRF_SO);
1158189cb85SMatheus Ferst     TEST(0x0, 0xf00, 0x0, 0x1c, 1, UNDEF, UNDEF, CRF_SO);
116936fda4dSFabiano Rosas 
1178189cb85SMatheus Ferst     TEST(0x0, 0xbad, 0x0, 0xf00, 0, UNDEF, UNDEF, CRF_SO);
1188189cb85SMatheus Ferst     TEST(0x0, 0xbad, 0x0, 0xf00, 1, UNDEF, UNDEF, CRF_SO);
119936fda4dSFabiano Rosas }
120936fda4dSFabiano Rosas 
main(void)121936fda4dSFabiano Rosas int main(void)
122936fda4dSFabiano Rosas {
123936fda4dSFabiano Rosas     struct sigaction action;
124936fda4dSFabiano Rosas 
125936fda4dSFabiano Rosas     action.sa_handler = _exit;
126936fda4dSFabiano Rosas     sigaction(SIGABRT, &action, NULL);
127936fda4dSFabiano Rosas 
128936fda4dSFabiano Rosas     test_bcdsub_eq();
129936fda4dSFabiano Rosas     test_bcdsub_gt();
130936fda4dSFabiano Rosas     test_bcdsub_lt();
131936fda4dSFabiano Rosas     test_bcdsub_invalid();
132936fda4dSFabiano Rosas 
133936fda4dSFabiano Rosas     return 0;
134936fda4dSFabiano Rosas }
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