xref: /qemu/tests/tcg/mips/user/ase/dsp/test_dsp_r1_mult.c (revision 073d9f2ce051d7a4bad9aa7bfdacf97394c57c05)
1*d70080c4SJia Liu #include<stdio.h>
2*d70080c4SJia Liu #include<assert.h>
3*d70080c4SJia Liu 
main()4*d70080c4SJia Liu int main()
5*d70080c4SJia Liu {
6*d70080c4SJia Liu     int rs, rt, ach, acl;
7*d70080c4SJia Liu     int result, resulth, resultl;
8*d70080c4SJia Liu 
9*d70080c4SJia Liu     rs  = 0x00FFBBAA;
10*d70080c4SJia Liu     rt  = 0x4B231000;
11*d70080c4SJia Liu     resulth = 0x4b0f01;
12*d70080c4SJia Liu     resultl = 0x71f8a000;
13*d70080c4SJia Liu     __asm
14*d70080c4SJia Liu         ("mult $ac1, %2, %3\n\t"
15*d70080c4SJia Liu          "mfhi %0, $ac1\n\t"
16*d70080c4SJia Liu          "mflo %1, $ac1\n\t"
17*d70080c4SJia Liu          : "=r"(ach), "=r"(acl)
18*d70080c4SJia Liu          : "r"(rs), "r"(rt)
19*d70080c4SJia Liu         );
20*d70080c4SJia Liu     assert(ach == resulth);
21*d70080c4SJia Liu     assert(acl == resultl);
22*d70080c4SJia Liu 
23*d70080c4SJia Liu     return 0;
24*d70080c4SJia Liu }
25