xref: /qemu/tests/tcg/mips/user/ase/dsp/test_dsp_r1_insv.c (revision 073d9f2ce051d7a4bad9aa7bfdacf97394c57c05)
1d70080c4SJia Liu #include<stdio.h>
2d70080c4SJia Liu #include<assert.h>
3d70080c4SJia Liu 
main()4d70080c4SJia Liu int main()
5d70080c4SJia Liu {
6d70080c4SJia Liu     int rt, rs, dsp;
7d70080c4SJia Liu     int result;
8d70080c4SJia Liu 
9d70080c4SJia Liu     /* msb = 10, lsb = 5 */
10d70080c4SJia Liu     dsp    = 0x305;
11d70080c4SJia Liu     rt     = 0x12345678;
12d70080c4SJia Liu     rs     = 0x87654321;
1334f5606eSPetar Jovanovic     result = 0x12345438;
14d70080c4SJia Liu     __asm
15d70080c4SJia Liu         ("wrdsp %2, 0x03\n\t"
16d70080c4SJia Liu          "insv  %0, %1\n\t"
17d70080c4SJia Liu          : "+r"(rt)
18d70080c4SJia Liu          : "r"(rs), "r"(dsp)
19d70080c4SJia Liu         );
20d70080c4SJia Liu     assert(rt == result);
21d70080c4SJia Liu 
22*c0f5f9ceSPetar Jovanovic     dsp    = 0x1000;
23*c0f5f9ceSPetar Jovanovic     rt     = 0xF0F0F0F0;
24*c0f5f9ceSPetar Jovanovic     rs     = 0xA5A5A5A5;
25*c0f5f9ceSPetar Jovanovic     result = 0xA5A5A5A5;
26*c0f5f9ceSPetar Jovanovic 
27*c0f5f9ceSPetar Jovanovic     __asm
28*c0f5f9ceSPetar Jovanovic         ("wrdsp %2\n\t"
29*c0f5f9ceSPetar Jovanovic          "insv  %0, %1\n\t"
30*c0f5f9ceSPetar Jovanovic          : "+r"(rt)
31*c0f5f9ceSPetar Jovanovic          : "r"(rs), "r"(dsp)
32*c0f5f9ceSPetar Jovanovic         );
33*c0f5f9ceSPetar Jovanovic     assert(rt == result);
34*c0f5f9ceSPetar Jovanovic 
35d70080c4SJia Liu     return 0;
36d70080c4SJia Liu }
37