xref: /qemu/tests/tcg/mips/user/ase/dsp/test_dsp_r1_extpdp.c (revision 073d9f2ce051d7a4bad9aa7bfdacf97394c57c05)
1d70080c4SJia Liu #include<stdio.h>
2d70080c4SJia Liu #include<assert.h>
3d70080c4SJia Liu 
main()4d70080c4SJia Liu int main()
5d70080c4SJia Liu {
6d70080c4SJia Liu     int rt, ach, acl, dsp, pos, efi;
7d70080c4SJia Liu     int result;
8d70080c4SJia Liu 
9d70080c4SJia Liu     ach = 0x05;
10d70080c4SJia Liu     acl = 0xB4CB;
11d70080c4SJia Liu     dsp = 0x07;
12d70080c4SJia Liu     result = 0x000C;
13d70080c4SJia Liu 
14d70080c4SJia Liu     __asm
15d70080c4SJia Liu         ("wrdsp %1, 0x01\n\t"
16d70080c4SJia Liu          "mthi %2, $ac1\n\t"
17d70080c4SJia Liu          "mtlo %3, $ac1\n\t"
18d70080c4SJia Liu          "extpdp %0, $ac1, 0x03\n\t"
19d70080c4SJia Liu          "rddsp %1\n\t"
20d70080c4SJia Liu          : "=r"(rt), "+r"(dsp)
21d70080c4SJia Liu          : "r"(ach), "r"(acl)
22d70080c4SJia Liu         );
23d70080c4SJia Liu     pos =  dsp & 0x3F;
24d70080c4SJia Liu     efi = (dsp >> 14) & 0x01;
25d70080c4SJia Liu     assert(pos == 3);
26d70080c4SJia Liu     assert(efi == 0);
27d70080c4SJia Liu     assert(result == rt);
28d70080c4SJia Liu 
29d70080c4SJia Liu     ach = 0x05;
30d70080c4SJia Liu     acl = 0xB4CB;
31d70080c4SJia Liu     dsp = 0x01;
32d70080c4SJia Liu 
33d70080c4SJia Liu     __asm
34d70080c4SJia Liu         ("wrdsp %1, 0x01\n\t"
35d70080c4SJia Liu          "mthi %2, $ac1\n\t"
36d70080c4SJia Liu          "mtlo %3, $ac1\n\t"
37d70080c4SJia Liu          "extpdp %0, $ac1, 0x03\n\t"
38d70080c4SJia Liu          "rddsp %1\n\t"
39d70080c4SJia Liu          : "=r"(rt), "+r"(dsp)
40d70080c4SJia Liu          : "r"(ach), "r"(acl)
41d70080c4SJia Liu         );
42d70080c4SJia Liu     efi = (dsp >> 14) & 0x01;
43d70080c4SJia Liu     assert(efi == 1);
44d70080c4SJia Liu 
45*0ba365f4SPetar Jovanovic 
46*0ba365f4SPetar Jovanovic     ach = 0;
47*0ba365f4SPetar Jovanovic     acl = 0;
48*0ba365f4SPetar Jovanovic     dsp = 0;
49*0ba365f4SPetar Jovanovic     result = 0;
50*0ba365f4SPetar Jovanovic 
51*0ba365f4SPetar Jovanovic     __asm
52*0ba365f4SPetar Jovanovic         ("wrdsp %1\n\t"
53*0ba365f4SPetar Jovanovic          "mthi %2, $ac1\n\t"
54*0ba365f4SPetar Jovanovic          "mtlo %3, $ac1\n\t"
55*0ba365f4SPetar Jovanovic          "extpdp %0, $ac1, 0x00\n\t"
56*0ba365f4SPetar Jovanovic          "rddsp %1\n\t"
57*0ba365f4SPetar Jovanovic          : "=r"(rt), "+r"(dsp)
58*0ba365f4SPetar Jovanovic          : "r"(ach), "r"(acl)
59*0ba365f4SPetar Jovanovic         );
60*0ba365f4SPetar Jovanovic     assert(dsp == 0x3F);
61*0ba365f4SPetar Jovanovic     assert(result == rt);
62*0ba365f4SPetar Jovanovic 
63d70080c4SJia Liu     return 0;
64d70080c4SJia Liu }
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