1 /* 2 * QTest testcase for SDHCI controllers 3 * 4 * Written by Philippe Mathieu-Daudé <f4bug@amsat.org> 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2 or later. 7 * See the COPYING file in the top-level directory. 8 * SPDX-License-Identifier: GPL-2.0-or-later 9 */ 10 #include "qemu/osdep.h" 11 #include "hw/registerfields.h" 12 #include "libqtest.h" 13 #include "libqos/pci-pc.h" 14 #include "hw/pci/pci.h" 15 16 #define SDHC_CAPAB 0x40 17 FIELD(SDHC_CAPAB, BASECLKFREQ, 8, 8); /* since v2 */ 18 #define SDHC_HCVER 0xFE 19 20 static const struct sdhci_t { 21 const char *arch, *machine; 22 struct { 23 uintptr_t addr; 24 uint8_t version; 25 uint8_t baseclock; 26 struct { 27 bool sdma; 28 uint64_t reg; 29 } capab; 30 } sdhci; 31 struct { 32 uint16_t vendor_id, device_id; 33 } pci; 34 } models[] = { 35 /* PC via PCI */ 36 { "x86_64", "pc", 37 {-1, 2, 0, {1, 0x057834b4} }, 38 .pci = { PCI_VENDOR_ID_REDHAT, PCI_DEVICE_ID_REDHAT_SDHCI } }, 39 40 /* Exynos4210 */ 41 { "arm", "smdkc210", 42 {0x12510000, 2, 0, {1, 0x5e80080} } }, 43 }; 44 45 typedef struct QSDHCI { 46 struct { 47 QPCIBus *bus; 48 QPCIDevice *dev; 49 } pci; 50 union { 51 QPCIBar mem_bar; 52 uint64_t addr; 53 }; 54 } QSDHCI; 55 56 static uint64_t sdhci_readq(QSDHCI *s, uint32_t reg) 57 { 58 uint64_t val; 59 60 if (s->pci.dev) { 61 val = qpci_io_readq(s->pci.dev, s->mem_bar, reg); 62 } else { 63 val = qtest_readq(global_qtest, s->addr + reg); 64 } 65 66 return val; 67 } 68 69 static void sdhci_writeq(QSDHCI *s, uint32_t reg, uint64_t val) 70 { 71 if (s->pci.dev) { 72 qpci_io_writeq(s->pci.dev, s->mem_bar, reg, val); 73 } else { 74 qtest_writeq(global_qtest, s->addr + reg, val); 75 } 76 } 77 78 static void check_capab_capareg(QSDHCI *s, uint64_t expec_capab) 79 { 80 uint64_t capab; 81 82 capab = sdhci_readq(s, SDHC_CAPAB); 83 g_assert_cmphex(capab, ==, expec_capab); 84 } 85 86 static void check_capab_readonly(QSDHCI *s) 87 { 88 const uint64_t vrand = 0x123456789abcdef; 89 uint64_t capab0, capab1; 90 91 capab0 = sdhci_readq(s, SDHC_CAPAB); 92 g_assert_cmpuint(capab0, !=, vrand); 93 94 sdhci_writeq(s, SDHC_CAPAB, vrand); 95 capab1 = sdhci_readq(s, SDHC_CAPAB); 96 g_assert_cmpuint(capab1, !=, vrand); 97 g_assert_cmpuint(capab1, ==, capab0); 98 } 99 100 static void check_capab_baseclock(QSDHCI *s, uint8_t expec_freq) 101 { 102 uint64_t capab, capab_freq; 103 104 if (!expec_freq) { 105 return; 106 } 107 capab = sdhci_readq(s, SDHC_CAPAB); 108 capab_freq = FIELD_EX64(capab, SDHC_CAPAB, BASECLKFREQ); 109 g_assert_cmpuint(capab_freq, ==, expec_freq); 110 } 111 112 static QSDHCI *machine_start(const struct sdhci_t *test) 113 { 114 QSDHCI *s = g_new0(QSDHCI, 1); 115 116 if (test->pci.vendor_id) { 117 /* PCI */ 118 uint16_t vendor_id, device_id; 119 uint64_t barsize; 120 121 global_qtest = qtest_startf("-machine %s -device sdhci-pci", 122 test->machine); 123 124 s->pci.bus = qpci_init_pc(NULL); 125 126 /* Find PCI device and verify it's the right one */ 127 s->pci.dev = qpci_device_find(s->pci.bus, QPCI_DEVFN(4, 0)); 128 g_assert_nonnull(s->pci.dev); 129 vendor_id = qpci_config_readw(s->pci.dev, PCI_VENDOR_ID); 130 device_id = qpci_config_readw(s->pci.dev, PCI_DEVICE_ID); 131 g_assert(vendor_id == test->pci.vendor_id); 132 g_assert(device_id == test->pci.device_id); 133 s->mem_bar = qpci_iomap(s->pci.dev, 0, &barsize); 134 qpci_device_enable(s->pci.dev); 135 } else { 136 /* SysBus */ 137 global_qtest = qtest_startf("-machine %s", test->machine); 138 s->addr = test->sdhci.addr; 139 } 140 141 return s; 142 } 143 144 static void machine_stop(QSDHCI *s) 145 { 146 g_free(s->pci.dev); 147 qtest_quit(global_qtest); 148 } 149 150 static void test_machine(const void *data) 151 { 152 const struct sdhci_t *test = data; 153 QSDHCI *s; 154 155 s = machine_start(test); 156 157 check_capab_capareg(s, test->sdhci.capab.reg); 158 check_capab_readonly(s); 159 check_capab_baseclock(s, test->sdhci.baseclock); 160 161 machine_stop(s); 162 } 163 164 int main(int argc, char *argv[]) 165 { 166 const char *arch = qtest_get_arch(); 167 char *name; 168 int i; 169 170 g_test_init(&argc, &argv, NULL); 171 for (i = 0; i < ARRAY_SIZE(models); i++) { 172 if (strcmp(arch, models[i].arch)) { 173 continue; 174 } 175 name = g_strdup_printf("sdhci/%s", models[i].machine); 176 qtest_add_data_func(name, &models[i], test_machine); 177 g_free(name); 178 } 179 180 return g_test_run(); 181 } 182