1 /* 2 * libqos PCI bindings 3 * 4 * Copyright IBM, Corp. 2012-2013 5 * 6 * Authors: 7 * Anthony Liguori <aliguori@us.ibm.com> 8 * 9 * This work is licensed under the terms of the GNU GPL, version 2 or later. 10 * See the COPYING file in the top-level directory. 11 */ 12 13 #ifndef LIBQOS_PCI_H 14 #define LIBQOS_PCI_H 15 16 #include "libqtest.h" 17 18 #define QPCI_DEVFN(dev, fn) (((dev) << 3) | (fn)) 19 20 typedef struct QPCIDevice QPCIDevice; 21 typedef struct QPCIBus QPCIBus; 22 23 struct QPCIBus 24 { 25 uint8_t (*io_readb)(QPCIBus *bus, void *addr); 26 uint16_t (*io_readw)(QPCIBus *bus, void *addr); 27 uint32_t (*io_readl)(QPCIBus *bus, void *addr); 28 29 void (*io_writeb)(QPCIBus *bus, void *addr, uint8_t value); 30 void (*io_writew)(QPCIBus *bus, void *addr, uint16_t value); 31 void (*io_writel)(QPCIBus *bus, void *addr, uint32_t value); 32 33 uint8_t (*config_readb)(QPCIBus *bus, int devfn, uint8_t offset); 34 uint16_t (*config_readw)(QPCIBus *bus, int devfn, uint8_t offset); 35 uint32_t (*config_readl)(QPCIBus *bus, int devfn, uint8_t offset); 36 37 void (*config_writeb)(QPCIBus *bus, int devfn, 38 uint8_t offset, uint8_t value); 39 void (*config_writew)(QPCIBus *bus, int devfn, 40 uint8_t offset, uint16_t value); 41 void (*config_writel)(QPCIBus *bus, int devfn, 42 uint8_t offset, uint32_t value); 43 44 void *(*iomap)(QPCIBus *bus, QPCIDevice *dev, int barno, uint64_t *sizeptr); 45 void (*iounmap)(QPCIBus *bus, void *data); 46 }; 47 48 struct QPCIDevice 49 { 50 QPCIBus *bus; 51 int devfn; 52 bool msix_enabled; 53 void *msix_table; 54 void *msix_pba; 55 }; 56 57 void qpci_device_foreach(QPCIBus *bus, int vendor_id, int device_id, 58 void (*func)(QPCIDevice *dev, int devfn, void *data), 59 void *data); 60 QPCIDevice *qpci_device_find(QPCIBus *bus, int devfn); 61 62 void qpci_device_enable(QPCIDevice *dev); 63 uint8_t qpci_find_capability(QPCIDevice *dev, uint8_t id); 64 void qpci_msix_enable(QPCIDevice *dev); 65 void qpci_msix_disable(QPCIDevice *dev); 66 bool qpci_msix_pending(QPCIDevice *dev, uint16_t entry); 67 bool qpci_msix_masked(QPCIDevice *dev, uint16_t entry); 68 uint16_t qpci_msix_table_size(QPCIDevice *dev); 69 70 uint8_t qpci_config_readb(QPCIDevice *dev, uint8_t offset); 71 uint16_t qpci_config_readw(QPCIDevice *dev, uint8_t offset); 72 uint32_t qpci_config_readl(QPCIDevice *dev, uint8_t offset); 73 74 void qpci_config_writeb(QPCIDevice *dev, uint8_t offset, uint8_t value); 75 void qpci_config_writew(QPCIDevice *dev, uint8_t offset, uint16_t value); 76 void qpci_config_writel(QPCIDevice *dev, uint8_t offset, uint32_t value); 77 78 uint8_t qpci_io_readb(QPCIDevice *dev, void *data); 79 uint16_t qpci_io_readw(QPCIDevice *dev, void *data); 80 uint32_t qpci_io_readl(QPCIDevice *dev, void *data); 81 82 void qpci_io_writeb(QPCIDevice *dev, void *data, uint8_t value); 83 void qpci_io_writew(QPCIDevice *dev, void *data, uint16_t value); 84 void qpci_io_writel(QPCIDevice *dev, void *data, uint32_t value); 85 86 void *qpci_iomap(QPCIDevice *dev, int barno, uint64_t *sizeptr); 87 void qpci_iounmap(QPCIDevice *dev, void *data); 88 89 void qpci_plug_device_test(const char *driver, const char *id, 90 uint8_t slot, const char *opts); 91 void qpci_unplug_acpi_device_test(const char *id, uint8_t slot); 92 #endif 93