1c4efe1caSAnthony Liguori /* 2c4efe1caSAnthony Liguori * libqos PCI bindings 3c4efe1caSAnthony Liguori * 4c4efe1caSAnthony Liguori * Copyright IBM, Corp. 2012-2013 5c4efe1caSAnthony Liguori * 6c4efe1caSAnthony Liguori * Authors: 7c4efe1caSAnthony Liguori * Anthony Liguori <aliguori@us.ibm.com> 8c4efe1caSAnthony Liguori * 9c4efe1caSAnthony Liguori * This work is licensed under the terms of the GNU GPL, version 2 or later. 10c4efe1caSAnthony Liguori * See the COPYING file in the top-level directory. 11c4efe1caSAnthony Liguori */ 12c4efe1caSAnthony Liguori 13c4efe1caSAnthony Liguori #ifndef LIBQOS_PCI_H 14c4efe1caSAnthony Liguori #define LIBQOS_PCI_H 15c4efe1caSAnthony Liguori 1658368113SMarc Marí #include "libqtest.h" 17c4efe1caSAnthony Liguori 18*a795fc08SDavid Gibson #define QPCI_PIO_LIMIT 0x10000 19*a795fc08SDavid Gibson 20c4efe1caSAnthony Liguori #define QPCI_DEVFN(dev, fn) (((dev) << 3) | (fn)) 21c4efe1caSAnthony Liguori 22c4efe1caSAnthony Liguori typedef struct QPCIDevice QPCIDevice; 23c4efe1caSAnthony Liguori typedef struct QPCIBus QPCIBus; 24c4efe1caSAnthony Liguori 25c4efe1caSAnthony Liguori struct QPCIBus 26c4efe1caSAnthony Liguori { 27*a795fc08SDavid Gibson uint8_t (*pio_readb)(QPCIBus *bus, uint32_t addr); 28*a795fc08SDavid Gibson uint16_t (*pio_readw)(QPCIBus *bus, uint32_t addr); 29*a795fc08SDavid Gibson uint32_t (*pio_readl)(QPCIBus *bus, uint32_t addr); 30c4efe1caSAnthony Liguori 31*a795fc08SDavid Gibson uint8_t (*mmio_readb)(QPCIBus *bus, uint32_t addr); 32*a795fc08SDavid Gibson uint16_t (*mmio_readw)(QPCIBus *bus, uint32_t addr); 33*a795fc08SDavid Gibson uint32_t (*mmio_readl)(QPCIBus *bus, uint32_t addr); 34*a795fc08SDavid Gibson 35*a795fc08SDavid Gibson void (*pio_writeb)(QPCIBus *bus, uint32_t addr, uint8_t value); 36*a795fc08SDavid Gibson void (*pio_writew)(QPCIBus *bus, uint32_t addr, uint16_t value); 37*a795fc08SDavid Gibson void (*pio_writel)(QPCIBus *bus, uint32_t addr, uint32_t value); 38*a795fc08SDavid Gibson 39*a795fc08SDavid Gibson void (*mmio_writeb)(QPCIBus *bus, uint32_t addr, uint8_t value); 40*a795fc08SDavid Gibson void (*mmio_writew)(QPCIBus *bus, uint32_t addr, uint16_t value); 41*a795fc08SDavid Gibson void (*mmio_writel)(QPCIBus *bus, uint32_t addr, uint32_t value); 42c4efe1caSAnthony Liguori 43c4efe1caSAnthony Liguori uint8_t (*config_readb)(QPCIBus *bus, int devfn, uint8_t offset); 44c4efe1caSAnthony Liguori uint16_t (*config_readw)(QPCIBus *bus, int devfn, uint8_t offset); 45c4efe1caSAnthony Liguori uint32_t (*config_readl)(QPCIBus *bus, int devfn, uint8_t offset); 46c4efe1caSAnthony Liguori 47c4efe1caSAnthony Liguori void (*config_writeb)(QPCIBus *bus, int devfn, 48c4efe1caSAnthony Liguori uint8_t offset, uint8_t value); 49c4efe1caSAnthony Liguori void (*config_writew)(QPCIBus *bus, int devfn, 50c4efe1caSAnthony Liguori uint8_t offset, uint16_t value); 51c4efe1caSAnthony Liguori void (*config_writel)(QPCIBus *bus, int devfn, 52c4efe1caSAnthony Liguori uint8_t offset, uint32_t value); 53c4efe1caSAnthony Liguori 546ce7100eSJohn Snow void *(*iomap)(QPCIBus *bus, QPCIDevice *dev, int barno, uint64_t *sizeptr); 55c4efe1caSAnthony Liguori void (*iounmap)(QPCIBus *bus, void *data); 56c4efe1caSAnthony Liguori }; 57c4efe1caSAnthony Liguori 58c4efe1caSAnthony Liguori struct QPCIDevice 59c4efe1caSAnthony Liguori { 60c4efe1caSAnthony Liguori QPCIBus *bus; 61c4efe1caSAnthony Liguori int devfn; 6258368113SMarc Marí bool msix_enabled; 6358368113SMarc Marí void *msix_table; 6458368113SMarc Marí void *msix_pba; 65c4efe1caSAnthony Liguori }; 66c4efe1caSAnthony Liguori 67c4efe1caSAnthony Liguori void qpci_device_foreach(QPCIBus *bus, int vendor_id, int device_id, 68c4efe1caSAnthony Liguori void (*func)(QPCIDevice *dev, int devfn, void *data), 69c4efe1caSAnthony Liguori void *data); 70c4efe1caSAnthony Liguori QPCIDevice *qpci_device_find(QPCIBus *bus, int devfn); 71c4efe1caSAnthony Liguori 72c4efe1caSAnthony Liguori void qpci_device_enable(QPCIDevice *dev); 7358368113SMarc Marí uint8_t qpci_find_capability(QPCIDevice *dev, uint8_t id); 7458368113SMarc Marí void qpci_msix_enable(QPCIDevice *dev); 7558368113SMarc Marí void qpci_msix_disable(QPCIDevice *dev); 7658368113SMarc Marí bool qpci_msix_pending(QPCIDevice *dev, uint16_t entry); 7758368113SMarc Marí bool qpci_msix_masked(QPCIDevice *dev, uint16_t entry); 7858368113SMarc Marí uint16_t qpci_msix_table_size(QPCIDevice *dev); 79c4efe1caSAnthony Liguori 80c4efe1caSAnthony Liguori uint8_t qpci_config_readb(QPCIDevice *dev, uint8_t offset); 81c4efe1caSAnthony Liguori uint16_t qpci_config_readw(QPCIDevice *dev, uint8_t offset); 82c4efe1caSAnthony Liguori uint32_t qpci_config_readl(QPCIDevice *dev, uint8_t offset); 83c4efe1caSAnthony Liguori 84c4efe1caSAnthony Liguori void qpci_config_writeb(QPCIDevice *dev, uint8_t offset, uint8_t value); 85c4efe1caSAnthony Liguori void qpci_config_writew(QPCIDevice *dev, uint8_t offset, uint16_t value); 86c4efe1caSAnthony Liguori void qpci_config_writel(QPCIDevice *dev, uint8_t offset, uint32_t value); 87c4efe1caSAnthony Liguori 88c4efe1caSAnthony Liguori uint8_t qpci_io_readb(QPCIDevice *dev, void *data); 89c4efe1caSAnthony Liguori uint16_t qpci_io_readw(QPCIDevice *dev, void *data); 90c4efe1caSAnthony Liguori uint32_t qpci_io_readl(QPCIDevice *dev, void *data); 91c4efe1caSAnthony Liguori 92c4efe1caSAnthony Liguori void qpci_io_writeb(QPCIDevice *dev, void *data, uint8_t value); 93c4efe1caSAnthony Liguori void qpci_io_writew(QPCIDevice *dev, void *data, uint16_t value); 94c4efe1caSAnthony Liguori void qpci_io_writel(QPCIDevice *dev, void *data, uint32_t value); 95c4efe1caSAnthony Liguori 966ce7100eSJohn Snow void *qpci_iomap(QPCIDevice *dev, int barno, uint64_t *sizeptr); 97c4efe1caSAnthony Liguori void qpci_iounmap(QPCIDevice *dev, void *data); 98c4efe1caSAnthony Liguori 992f8b2767SIgor Mammedov void qpci_plug_device_test(const char *driver, const char *id, 1002f8b2767SIgor Mammedov uint8_t slot, const char *opts); 1012f8b2767SIgor Mammedov void qpci_unplug_acpi_device_test(const char *id, uint8_t slot); 102c4efe1caSAnthony Liguori #endif 103