1 /* 2 * libqos driver framework 3 * 4 * Copyright (c) 2018 Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com> 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License version 2 as published by the Free Software Foundation. 9 * 10 * This library is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 * Lesser General Public License for more details. 14 * 15 * You should have received a copy of the GNU Lesser General Public 16 * License along with this library; if not, see <http://www.gnu.org/licenses/> 17 */ 18 19 #include "qemu/osdep.h" 20 #include "libqtest.h" 21 #include "libqos/pci-pc.h" 22 #include "qemu/sockets.h" 23 #include "qemu/iov.h" 24 #include "qemu/module.h" 25 #include "qemu/bitops.h" 26 #include "libqos/malloc.h" 27 #include "libqos/qgraph.h" 28 #include "e1000e.h" 29 30 #define E1000E_IMS (0x00d0) 31 32 #define E1000E_STATUS (0x0008) 33 #define E1000E_STATUS_LU BIT(1) 34 #define E1000E_STATUS_ASDV1000 BIT(9) 35 36 #define E1000E_CTRL (0x0000) 37 #define E1000E_CTRL_RESET BIT(26) 38 39 #define E1000E_RCTL (0x0100) 40 #define E1000E_RCTL_EN BIT(1) 41 #define E1000E_RCTL_UPE BIT(3) 42 #define E1000E_RCTL_MPE BIT(4) 43 44 #define E1000E_RFCTL (0x5008) 45 #define E1000E_RFCTL_EXTEN BIT(15) 46 47 #define E1000E_TCTL (0x0400) 48 #define E1000E_TCTL_EN BIT(1) 49 50 #define E1000E_CTRL_EXT (0x0018) 51 #define E1000E_CTRL_EXT_DRV_LOAD BIT(28) 52 #define E1000E_CTRL_EXT_TXLSFLOW BIT(22) 53 54 #define E1000E_IVAR (0x00E4) 55 #define E1000E_IVAR_TEST_CFG ((E1000E_RX0_MSG_ID << 0) | BIT(3) | \ 56 (E1000E_TX0_MSG_ID << 8) | BIT(11) | \ 57 (E1000E_OTHER_MSG_ID << 16) | BIT(19) | \ 58 BIT(31)) 59 60 #define E1000E_RING_LEN (0x1000) 61 62 #define E1000E_TDBAL (0x3800) 63 64 #define E1000E_TDBAH (0x3804) 65 #define E1000E_TDH (0x3810) 66 67 #define E1000E_RDBAL (0x2800) 68 #define E1000E_RDBAH (0x2804) 69 #define E1000E_RDH (0x2810) 70 71 #define E1000E_TXD_LEN (16) 72 #define E1000E_RXD_LEN (16) 73 74 static void e1000e_macreg_write(QE1000E *d, uint32_t reg, uint32_t val) 75 { 76 QE1000E_PCI *d_pci = container_of(d, QE1000E_PCI, e1000e); 77 qpci_io_writel(&d_pci->pci_dev, d_pci->mac_regs, reg, val); 78 } 79 80 static uint32_t e1000e_macreg_read(QE1000E *d, uint32_t reg) 81 { 82 QE1000E_PCI *d_pci = container_of(d, QE1000E_PCI, e1000e); 83 return qpci_io_readl(&d_pci->pci_dev, d_pci->mac_regs, reg); 84 } 85 86 void e1000e_tx_ring_push(QE1000E *d, void *descr) 87 { 88 uint32_t tail = e1000e_macreg_read(d, E1000E_TDT); 89 uint32_t len = e1000e_macreg_read(d, E1000E_TDLEN) / E1000E_TXD_LEN; 90 91 memwrite(d->tx_ring + tail * E1000E_TXD_LEN, descr, E1000E_TXD_LEN); 92 e1000e_macreg_write(d, E1000E_TDT, (tail + 1) % len); 93 94 /* Read WB data for the packet transmitted */ 95 memread(d->tx_ring + tail * E1000E_TXD_LEN, descr, E1000E_TXD_LEN); 96 } 97 98 void e1000e_rx_ring_push(QE1000E *d, void *descr) 99 { 100 uint32_t tail = e1000e_macreg_read(d, E1000E_RDT); 101 uint32_t len = e1000e_macreg_read(d, E1000E_RDLEN) / E1000E_RXD_LEN; 102 103 memwrite(d->rx_ring + tail * E1000E_RXD_LEN, descr, E1000E_RXD_LEN); 104 e1000e_macreg_write(d, E1000E_RDT, (tail + 1) % len); 105 106 /* Read WB data for the packet received */ 107 memread(d->rx_ring + tail * E1000E_RXD_LEN, descr, E1000E_RXD_LEN); 108 } 109 110 static void e1000e_foreach_callback(QPCIDevice *dev, int devfn, void *data) 111 { 112 QPCIDevice *res = data; 113 memcpy(res, dev, sizeof(QPCIDevice)); 114 g_free(dev); 115 } 116 117 void e1000e_wait_isr(QE1000E *d, uint16_t msg_id) 118 { 119 QE1000E_PCI *d_pci = container_of(d, QE1000E_PCI, e1000e); 120 guint64 end_time = g_get_monotonic_time() + 5 * G_TIME_SPAN_SECOND; 121 122 do { 123 if (qpci_msix_pending(&d_pci->pci_dev, msg_id)) { 124 return; 125 } 126 clock_step(10000); 127 } while (g_get_monotonic_time() < end_time); 128 129 g_error("Timeout expired"); 130 } 131 132 static void e1000e_pci_destructor(QOSGraphObject *obj) 133 { 134 QE1000E_PCI *epci = (QE1000E_PCI *) obj; 135 qpci_iounmap(&epci->pci_dev, epci->mac_regs); 136 qpci_msix_disable(&epci->pci_dev); 137 } 138 139 static void e1000e_pci_start_hw(QOSGraphObject *obj) 140 { 141 QE1000E_PCI *d = (QE1000E_PCI *) obj; 142 uint32_t val; 143 144 /* Enable the device */ 145 qpci_device_enable(&d->pci_dev); 146 147 /* Reset the device */ 148 val = e1000e_macreg_read(&d->e1000e, E1000E_CTRL); 149 e1000e_macreg_write(&d->e1000e, E1000E_CTRL, val | E1000E_CTRL_RESET); 150 151 /* Enable and configure MSI-X */ 152 qpci_msix_enable(&d->pci_dev); 153 e1000e_macreg_write(&d->e1000e, E1000E_IVAR, E1000E_IVAR_TEST_CFG); 154 155 /* Check the device status - link and speed */ 156 val = e1000e_macreg_read(&d->e1000e, E1000E_STATUS); 157 g_assert_cmphex(val & (E1000E_STATUS_LU | E1000E_STATUS_ASDV1000), 158 ==, E1000E_STATUS_LU | E1000E_STATUS_ASDV1000); 159 160 /* Initialize TX/RX logic */ 161 e1000e_macreg_write(&d->e1000e, E1000E_RCTL, 0); 162 e1000e_macreg_write(&d->e1000e, E1000E_TCTL, 0); 163 164 /* Notify the device that the driver is ready */ 165 val = e1000e_macreg_read(&d->e1000e, E1000E_CTRL_EXT); 166 e1000e_macreg_write(&d->e1000e, E1000E_CTRL_EXT, 167 val | E1000E_CTRL_EXT_DRV_LOAD | E1000E_CTRL_EXT_TXLSFLOW); 168 169 e1000e_macreg_write(&d->e1000e, E1000E_TDBAL, 170 (uint32_t) d->e1000e.tx_ring); 171 e1000e_macreg_write(&d->e1000e, E1000E_TDBAH, 172 (uint32_t) (d->e1000e.tx_ring >> 32)); 173 e1000e_macreg_write(&d->e1000e, E1000E_TDLEN, E1000E_RING_LEN); 174 e1000e_macreg_write(&d->e1000e, E1000E_TDT, 0); 175 e1000e_macreg_write(&d->e1000e, E1000E_TDH, 0); 176 177 /* Enable transmit */ 178 e1000e_macreg_write(&d->e1000e, E1000E_TCTL, E1000E_TCTL_EN); 179 e1000e_macreg_write(&d->e1000e, E1000E_RDBAL, 180 (uint32_t)d->e1000e.rx_ring); 181 e1000e_macreg_write(&d->e1000e, E1000E_RDBAH, 182 (uint32_t)(d->e1000e.rx_ring >> 32)); 183 e1000e_macreg_write(&d->e1000e, E1000E_RDLEN, E1000E_RING_LEN); 184 e1000e_macreg_write(&d->e1000e, E1000E_RDT, 0); 185 e1000e_macreg_write(&d->e1000e, E1000E_RDH, 0); 186 187 /* Enable receive */ 188 e1000e_macreg_write(&d->e1000e, E1000E_RFCTL, E1000E_RFCTL_EXTEN); 189 e1000e_macreg_write(&d->e1000e, E1000E_RCTL, E1000E_RCTL_EN | 190 E1000E_RCTL_UPE | 191 E1000E_RCTL_MPE); 192 193 /* Enable all interrupts */ 194 e1000e_macreg_write(&d->e1000e, E1000E_IMS, 0xFFFFFFFF); 195 196 } 197 198 static void *e1000e_pci_get_driver(void *obj, const char *interface) 199 { 200 QE1000E_PCI *epci = obj; 201 if (!g_strcmp0(interface, "e1000e-if")) { 202 return &epci->e1000e; 203 } 204 205 /* implicit contains */ 206 if (!g_strcmp0(interface, "pci-device")) { 207 return &epci->pci_dev; 208 } 209 210 fprintf(stderr, "%s not present in e1000e\n", interface); 211 g_assert_not_reached(); 212 } 213 214 static void *e1000e_pci_create(void *pci_bus, QGuestAllocator *alloc, 215 void *addr) 216 { 217 QE1000E_PCI *d = g_new0(QE1000E_PCI, 1); 218 QPCIBus *bus = pci_bus; 219 QPCIAddress *address = addr; 220 221 qpci_device_foreach(bus, address->vendor_id, address->device_id, 222 e1000e_foreach_callback, &d->pci_dev); 223 224 /* Map BAR0 (mac registers) */ 225 d->mac_regs = qpci_iomap(&d->pci_dev, 0, NULL); 226 227 /* Allocate and setup TX ring */ 228 d->e1000e.tx_ring = guest_alloc(alloc, E1000E_RING_LEN); 229 g_assert(d->e1000e.tx_ring != 0); 230 231 /* Allocate and setup RX ring */ 232 d->e1000e.rx_ring = guest_alloc(alloc, E1000E_RING_LEN); 233 g_assert(d->e1000e.rx_ring != 0); 234 235 d->obj.get_driver = e1000e_pci_get_driver; 236 d->obj.start_hw = e1000e_pci_start_hw; 237 d->obj.destructor = e1000e_pci_destructor; 238 239 return &d->obj; 240 } 241 242 static void e1000e_register_nodes(void) 243 { 244 QPCIAddress addr = { 245 .vendor_id = 0x8086, 246 .device_id = 0x10D3, 247 }; 248 249 /* FIXME: every test using this node needs to setup a -netdev socket,id=hs0 250 * otherwise QEMU is not going to start */ 251 QOSGraphEdgeOptions opts = { 252 .extra_device_opts = "netdev=hs0", 253 }; 254 add_qpci_address(&opts, &addr); 255 256 qos_node_create_driver("e1000e", e1000e_pci_create); 257 qos_node_consumes("e1000e", "pci-bus", &opts); 258 } 259 260 libqos_init(e1000e_register_nodes); 261