1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Define target-specific opcode support 4 * Copyright (c) 2009, 2011 Stefan Weil 5 */ 6 7 #ifndef TCG_TARGET_HAS_H 8 #define TCG_TARGET_HAS_H 9 10 #define TCG_TARGET_HAS_bswap16_i32 1 11 #define TCG_TARGET_HAS_bswap32_i32 1 12 #define TCG_TARGET_HAS_div_i32 1 13 #define TCG_TARGET_HAS_rem_i32 1 14 #define TCG_TARGET_HAS_extract2_i32 0 15 #define TCG_TARGET_HAS_clz_i32 1 16 #define TCG_TARGET_HAS_ctz_i32 1 17 #define TCG_TARGET_HAS_ctpop_i32 1 18 #define TCG_TARGET_HAS_rot_i32 1 19 #define TCG_TARGET_HAS_negsetcond_i32 0 20 #define TCG_TARGET_HAS_muls2_i32 1 21 #define TCG_TARGET_HAS_muluh_i32 0 22 #define TCG_TARGET_HAS_mulsh_i32 0 23 #define TCG_TARGET_HAS_qemu_st8_i32 0 24 25 #if TCG_TARGET_REG_BITS == 64 26 #define TCG_TARGET_HAS_extr_i64_i32 0 27 #define TCG_TARGET_HAS_bswap16_i64 1 28 #define TCG_TARGET_HAS_bswap32_i64 1 29 #define TCG_TARGET_HAS_bswap64_i64 1 30 #define TCG_TARGET_HAS_extract2_i64 0 31 #define TCG_TARGET_HAS_div_i64 1 32 #define TCG_TARGET_HAS_rem_i64 1 33 #define TCG_TARGET_HAS_clz_i64 1 34 #define TCG_TARGET_HAS_ctz_i64 1 35 #define TCG_TARGET_HAS_ctpop_i64 1 36 #define TCG_TARGET_HAS_rot_i64 1 37 #define TCG_TARGET_HAS_negsetcond_i64 0 38 #define TCG_TARGET_HAS_muls2_i64 1 39 #define TCG_TARGET_HAS_add2_i32 1 40 #define TCG_TARGET_HAS_sub2_i32 1 41 #define TCG_TARGET_HAS_mulu2_i32 1 42 #define TCG_TARGET_HAS_add2_i64 1 43 #define TCG_TARGET_HAS_sub2_i64 1 44 #define TCG_TARGET_HAS_mulu2_i64 1 45 #define TCG_TARGET_HAS_muluh_i64 0 46 #define TCG_TARGET_HAS_mulsh_i64 0 47 #else 48 #define TCG_TARGET_HAS_mulu2_i32 1 49 #endif /* TCG_TARGET_REG_BITS == 64 */ 50 51 #define TCG_TARGET_HAS_qemu_ldst_i128 0 52 53 #define TCG_TARGET_HAS_tst 1 54 55 #define TCG_TARGET_extract_valid(type, ofs, len) 1 56 #define TCG_TARGET_sextract_valid(type, ofs, len) 1 57 #define TCG_TARGET_deposit_valid(type, ofs, len) 1 58 59 #endif 60