1 /* 2 * Tiny Code Generator for QEMU 3 * 4 * Copyright (c) 2008 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 /* define it to use liveness analysis (better code) */ 26 #define USE_LIVENESS_ANALYSIS 27 #define USE_TCG_OPTIMIZATIONS 28 29 #include "config.h" 30 31 /* Define to jump the ELF file used to communicate with GDB. */ 32 #undef DEBUG_JIT 33 34 #if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG) 35 /* define it to suppress various consistency checks (faster) */ 36 #define NDEBUG 37 #endif 38 39 #include "qemu-common.h" 40 #include "qemu/host-utils.h" 41 #include "qemu/timer.h" 42 43 /* Note: the long term plan is to reduce the dependencies on the QEMU 44 CPU definitions. Currently they are used for qemu_ld/st 45 instructions */ 46 #define NO_CPU_IO_DEFS 47 #include "cpu.h" 48 49 #include "tcg-op.h" 50 51 #if UINTPTR_MAX == UINT32_MAX 52 # define ELF_CLASS ELFCLASS32 53 #else 54 # define ELF_CLASS ELFCLASS64 55 #endif 56 #ifdef HOST_WORDS_BIGENDIAN 57 # define ELF_DATA ELFDATA2MSB 58 #else 59 # define ELF_DATA ELFDATA2LSB 60 #endif 61 62 #include "elf.h" 63 64 /* Forward declarations for functions declared in tcg-target.c and used here. */ 65 static void tcg_target_init(TCGContext *s); 66 static void tcg_target_qemu_prologue(TCGContext *s); 67 static void patch_reloc(tcg_insn_unit *code_ptr, int type, 68 intptr_t value, intptr_t addend); 69 70 /* The CIE and FDE header definitions will be common to all hosts. */ 71 typedef struct { 72 uint32_t len __attribute__((aligned((sizeof(void *))))); 73 uint32_t id; 74 uint8_t version; 75 char augmentation[1]; 76 uint8_t code_align; 77 uint8_t data_align; 78 uint8_t return_column; 79 } DebugFrameCIE; 80 81 typedef struct QEMU_PACKED { 82 uint32_t len __attribute__((aligned((sizeof(void *))))); 83 uint32_t cie_offset; 84 uintptr_t func_start; 85 uintptr_t func_len; 86 } DebugFrameFDEHeader; 87 88 typedef struct QEMU_PACKED { 89 DebugFrameCIE cie; 90 DebugFrameFDEHeader fde; 91 } DebugFrameHeader; 92 93 static void tcg_register_jit_int(void *buf, size_t size, 94 const void *debug_frame, 95 size_t debug_frame_size) 96 __attribute__((unused)); 97 98 /* Forward declarations for functions declared and used in tcg-target.c. */ 99 static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str); 100 static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1, 101 intptr_t arg2); 102 static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg); 103 static void tcg_out_movi(TCGContext *s, TCGType type, 104 TCGReg ret, tcg_target_long arg); 105 static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, 106 const int *const_args); 107 static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1, 108 intptr_t arg2); 109 static void tcg_out_call(TCGContext *s, tcg_insn_unit *target); 110 static int tcg_target_const_match(tcg_target_long val, TCGType type, 111 const TCGArgConstraint *arg_ct); 112 static void tcg_out_tb_init(TCGContext *s); 113 static void tcg_out_tb_finalize(TCGContext *s); 114 115 116 117 static TCGRegSet tcg_target_available_regs[2]; 118 static TCGRegSet tcg_target_call_clobber_regs; 119 120 #if TCG_TARGET_INSN_UNIT_SIZE == 1 121 static __attribute__((unused)) inline void tcg_out8(TCGContext *s, uint8_t v) 122 { 123 *s->code_ptr++ = v; 124 } 125 126 static __attribute__((unused)) inline void tcg_patch8(tcg_insn_unit *p, 127 uint8_t v) 128 { 129 *p = v; 130 } 131 #endif 132 133 #if TCG_TARGET_INSN_UNIT_SIZE <= 2 134 static __attribute__((unused)) inline void tcg_out16(TCGContext *s, uint16_t v) 135 { 136 if (TCG_TARGET_INSN_UNIT_SIZE == 2) { 137 *s->code_ptr++ = v; 138 } else { 139 tcg_insn_unit *p = s->code_ptr; 140 memcpy(p, &v, sizeof(v)); 141 s->code_ptr = p + (2 / TCG_TARGET_INSN_UNIT_SIZE); 142 } 143 } 144 145 static __attribute__((unused)) inline void tcg_patch16(tcg_insn_unit *p, 146 uint16_t v) 147 { 148 if (TCG_TARGET_INSN_UNIT_SIZE == 2) { 149 *p = v; 150 } else { 151 memcpy(p, &v, sizeof(v)); 152 } 153 } 154 #endif 155 156 #if TCG_TARGET_INSN_UNIT_SIZE <= 4 157 static __attribute__((unused)) inline void tcg_out32(TCGContext *s, uint32_t v) 158 { 159 if (TCG_TARGET_INSN_UNIT_SIZE == 4) { 160 *s->code_ptr++ = v; 161 } else { 162 tcg_insn_unit *p = s->code_ptr; 163 memcpy(p, &v, sizeof(v)); 164 s->code_ptr = p + (4 / TCG_TARGET_INSN_UNIT_SIZE); 165 } 166 } 167 168 static __attribute__((unused)) inline void tcg_patch32(tcg_insn_unit *p, 169 uint32_t v) 170 { 171 if (TCG_TARGET_INSN_UNIT_SIZE == 4) { 172 *p = v; 173 } else { 174 memcpy(p, &v, sizeof(v)); 175 } 176 } 177 #endif 178 179 #if TCG_TARGET_INSN_UNIT_SIZE <= 8 180 static __attribute__((unused)) inline void tcg_out64(TCGContext *s, uint64_t v) 181 { 182 if (TCG_TARGET_INSN_UNIT_SIZE == 8) { 183 *s->code_ptr++ = v; 184 } else { 185 tcg_insn_unit *p = s->code_ptr; 186 memcpy(p, &v, sizeof(v)); 187 s->code_ptr = p + (8 / TCG_TARGET_INSN_UNIT_SIZE); 188 } 189 } 190 191 static __attribute__((unused)) inline void tcg_patch64(tcg_insn_unit *p, 192 uint64_t v) 193 { 194 if (TCG_TARGET_INSN_UNIT_SIZE == 8) { 195 *p = v; 196 } else { 197 memcpy(p, &v, sizeof(v)); 198 } 199 } 200 #endif 201 202 /* label relocation processing */ 203 204 static void tcg_out_reloc(TCGContext *s, tcg_insn_unit *code_ptr, int type, 205 TCGLabel *l, intptr_t addend) 206 { 207 TCGRelocation *r; 208 209 if (l->has_value) { 210 /* FIXME: This may break relocations on RISC targets that 211 modify instruction fields in place. The caller may not have 212 written the initial value. */ 213 patch_reloc(code_ptr, type, l->u.value, addend); 214 } else { 215 /* add a new relocation entry */ 216 r = tcg_malloc(sizeof(TCGRelocation)); 217 r->type = type; 218 r->ptr = code_ptr; 219 r->addend = addend; 220 r->next = l->u.first_reloc; 221 l->u.first_reloc = r; 222 } 223 } 224 225 static void tcg_out_label(TCGContext *s, TCGLabel *l, tcg_insn_unit *ptr) 226 { 227 intptr_t value = (intptr_t)ptr; 228 TCGRelocation *r; 229 230 assert(!l->has_value); 231 232 for (r = l->u.first_reloc; r != NULL; r = r->next) { 233 patch_reloc(r->ptr, r->type, value, r->addend); 234 } 235 236 l->has_value = 1; 237 l->u.value_ptr = ptr; 238 } 239 240 TCGLabel *gen_new_label(void) 241 { 242 TCGContext *s = &tcg_ctx; 243 TCGLabel *l = tcg_malloc(sizeof(TCGLabel)); 244 245 *l = (TCGLabel){ 246 .id = s->nb_labels++ 247 }; 248 249 return l; 250 } 251 252 #include "tcg-target.c" 253 254 /* pool based memory allocation */ 255 void *tcg_malloc_internal(TCGContext *s, int size) 256 { 257 TCGPool *p; 258 int pool_size; 259 260 if (size > TCG_POOL_CHUNK_SIZE) { 261 /* big malloc: insert a new pool (XXX: could optimize) */ 262 p = g_malloc(sizeof(TCGPool) + size); 263 p->size = size; 264 p->next = s->pool_first_large; 265 s->pool_first_large = p; 266 return p->data; 267 } else { 268 p = s->pool_current; 269 if (!p) { 270 p = s->pool_first; 271 if (!p) 272 goto new_pool; 273 } else { 274 if (!p->next) { 275 new_pool: 276 pool_size = TCG_POOL_CHUNK_SIZE; 277 p = g_malloc(sizeof(TCGPool) + pool_size); 278 p->size = pool_size; 279 p->next = NULL; 280 if (s->pool_current) 281 s->pool_current->next = p; 282 else 283 s->pool_first = p; 284 } else { 285 p = p->next; 286 } 287 } 288 } 289 s->pool_current = p; 290 s->pool_cur = p->data + size; 291 s->pool_end = p->data + p->size; 292 return p->data; 293 } 294 295 void tcg_pool_reset(TCGContext *s) 296 { 297 TCGPool *p, *t; 298 for (p = s->pool_first_large; p; p = t) { 299 t = p->next; 300 g_free(p); 301 } 302 s->pool_first_large = NULL; 303 s->pool_cur = s->pool_end = NULL; 304 s->pool_current = NULL; 305 } 306 307 typedef struct TCGHelperInfo { 308 void *func; 309 const char *name; 310 unsigned flags; 311 unsigned sizemask; 312 } TCGHelperInfo; 313 314 #include "exec/helper-proto.h" 315 316 static const TCGHelperInfo all_helpers[] = { 317 #include "exec/helper-tcg.h" 318 }; 319 320 void tcg_context_init(TCGContext *s) 321 { 322 int op, total_args, n, i; 323 TCGOpDef *def; 324 TCGArgConstraint *args_ct; 325 int *sorted_args; 326 GHashTable *helper_table; 327 328 memset(s, 0, sizeof(*s)); 329 s->nb_globals = 0; 330 331 /* Count total number of arguments and allocate the corresponding 332 space */ 333 total_args = 0; 334 for(op = 0; op < NB_OPS; op++) { 335 def = &tcg_op_defs[op]; 336 n = def->nb_iargs + def->nb_oargs; 337 total_args += n; 338 } 339 340 args_ct = g_malloc(sizeof(TCGArgConstraint) * total_args); 341 sorted_args = g_malloc(sizeof(int) * total_args); 342 343 for(op = 0; op < NB_OPS; op++) { 344 def = &tcg_op_defs[op]; 345 def->args_ct = args_ct; 346 def->sorted_args = sorted_args; 347 n = def->nb_iargs + def->nb_oargs; 348 sorted_args += n; 349 args_ct += n; 350 } 351 352 /* Register helpers. */ 353 /* Use g_direct_hash/equal for direct pointer comparisons on func. */ 354 s->helpers = helper_table = g_hash_table_new(NULL, NULL); 355 356 for (i = 0; i < ARRAY_SIZE(all_helpers); ++i) { 357 g_hash_table_insert(helper_table, (gpointer)all_helpers[i].func, 358 (gpointer)&all_helpers[i]); 359 } 360 361 tcg_target_init(s); 362 } 363 364 void tcg_prologue_init(TCGContext *s) 365 { 366 /* init global prologue and epilogue */ 367 s->code_buf = s->code_gen_prologue; 368 s->code_ptr = s->code_buf; 369 tcg_target_qemu_prologue(s); 370 flush_icache_range((uintptr_t)s->code_buf, (uintptr_t)s->code_ptr); 371 372 #ifdef DEBUG_DISAS 373 if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) { 374 size_t size = tcg_current_code_size(s); 375 qemu_log("PROLOGUE: [size=%zu]\n", size); 376 log_disas(s->code_buf, size); 377 qemu_log("\n"); 378 qemu_log_flush(); 379 } 380 #endif 381 } 382 383 void tcg_set_frame(TCGContext *s, int reg, intptr_t start, intptr_t size) 384 { 385 s->frame_start = start; 386 s->frame_end = start + size; 387 s->frame_reg = reg; 388 } 389 390 void tcg_func_start(TCGContext *s) 391 { 392 tcg_pool_reset(s); 393 s->nb_temps = s->nb_globals; 394 395 /* No temps have been previously allocated for size or locality. */ 396 memset(s->free_temps, 0, sizeof(s->free_temps)); 397 398 s->nb_labels = 0; 399 s->current_frame_offset = s->frame_start; 400 401 #ifdef CONFIG_DEBUG_TCG 402 s->goto_tb_issue_mask = 0; 403 #endif 404 405 s->gen_first_op_idx = 0; 406 s->gen_last_op_idx = -1; 407 s->gen_next_op_idx = 0; 408 s->gen_next_parm_idx = 0; 409 410 s->be = tcg_malloc(sizeof(TCGBackendData)); 411 } 412 413 static inline void tcg_temp_alloc(TCGContext *s, int n) 414 { 415 if (n > TCG_MAX_TEMPS) 416 tcg_abort(); 417 } 418 419 static inline int tcg_global_reg_new_internal(TCGType type, int reg, 420 const char *name) 421 { 422 TCGContext *s = &tcg_ctx; 423 TCGTemp *ts; 424 int idx; 425 426 #if TCG_TARGET_REG_BITS == 32 427 if (type != TCG_TYPE_I32) 428 tcg_abort(); 429 #endif 430 if (tcg_regset_test_reg(s->reserved_regs, reg)) 431 tcg_abort(); 432 idx = s->nb_globals; 433 tcg_temp_alloc(s, s->nb_globals + 1); 434 ts = &s->temps[s->nb_globals]; 435 ts->base_type = type; 436 ts->type = type; 437 ts->fixed_reg = 1; 438 ts->reg = reg; 439 ts->name = name; 440 s->nb_globals++; 441 tcg_regset_set_reg(s->reserved_regs, reg); 442 return idx; 443 } 444 445 TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name) 446 { 447 int idx; 448 449 idx = tcg_global_reg_new_internal(TCG_TYPE_I32, reg, name); 450 return MAKE_TCGV_I32(idx); 451 } 452 453 TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name) 454 { 455 int idx; 456 457 idx = tcg_global_reg_new_internal(TCG_TYPE_I64, reg, name); 458 return MAKE_TCGV_I64(idx); 459 } 460 461 static inline int tcg_global_mem_new_internal(TCGType type, int reg, 462 intptr_t offset, 463 const char *name) 464 { 465 TCGContext *s = &tcg_ctx; 466 TCGTemp *ts; 467 int idx; 468 469 idx = s->nb_globals; 470 #if TCG_TARGET_REG_BITS == 32 471 if (type == TCG_TYPE_I64) { 472 char buf[64]; 473 tcg_temp_alloc(s, s->nb_globals + 2); 474 ts = &s->temps[s->nb_globals]; 475 ts->base_type = type; 476 ts->type = TCG_TYPE_I32; 477 ts->fixed_reg = 0; 478 ts->mem_allocated = 1; 479 ts->mem_reg = reg; 480 #ifdef HOST_WORDS_BIGENDIAN 481 ts->mem_offset = offset + 4; 482 #else 483 ts->mem_offset = offset; 484 #endif 485 pstrcpy(buf, sizeof(buf), name); 486 pstrcat(buf, sizeof(buf), "_0"); 487 ts->name = strdup(buf); 488 ts++; 489 490 ts->base_type = type; 491 ts->type = TCG_TYPE_I32; 492 ts->fixed_reg = 0; 493 ts->mem_allocated = 1; 494 ts->mem_reg = reg; 495 #ifdef HOST_WORDS_BIGENDIAN 496 ts->mem_offset = offset; 497 #else 498 ts->mem_offset = offset + 4; 499 #endif 500 pstrcpy(buf, sizeof(buf), name); 501 pstrcat(buf, sizeof(buf), "_1"); 502 ts->name = strdup(buf); 503 504 s->nb_globals += 2; 505 } else 506 #endif 507 { 508 tcg_temp_alloc(s, s->nb_globals + 1); 509 ts = &s->temps[s->nb_globals]; 510 ts->base_type = type; 511 ts->type = type; 512 ts->fixed_reg = 0; 513 ts->mem_allocated = 1; 514 ts->mem_reg = reg; 515 ts->mem_offset = offset; 516 ts->name = name; 517 s->nb_globals++; 518 } 519 return idx; 520 } 521 522 TCGv_i32 tcg_global_mem_new_i32(int reg, intptr_t offset, const char *name) 523 { 524 int idx = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name); 525 return MAKE_TCGV_I32(idx); 526 } 527 528 TCGv_i64 tcg_global_mem_new_i64(int reg, intptr_t offset, const char *name) 529 { 530 int idx = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name); 531 return MAKE_TCGV_I64(idx); 532 } 533 534 static inline int tcg_temp_new_internal(TCGType type, int temp_local) 535 { 536 TCGContext *s = &tcg_ctx; 537 TCGTemp *ts; 538 int idx, k; 539 540 k = type + (temp_local ? TCG_TYPE_COUNT : 0); 541 idx = find_first_bit(s->free_temps[k].l, TCG_MAX_TEMPS); 542 if (idx < TCG_MAX_TEMPS) { 543 /* There is already an available temp with the right type. */ 544 clear_bit(idx, s->free_temps[k].l); 545 546 ts = &s->temps[idx]; 547 ts->temp_allocated = 1; 548 assert(ts->base_type == type); 549 assert(ts->temp_local == temp_local); 550 } else { 551 idx = s->nb_temps; 552 #if TCG_TARGET_REG_BITS == 32 553 if (type == TCG_TYPE_I64) { 554 tcg_temp_alloc(s, s->nb_temps + 2); 555 ts = &s->temps[s->nb_temps]; 556 ts->base_type = type; 557 ts->type = TCG_TYPE_I32; 558 ts->temp_allocated = 1; 559 ts->temp_local = temp_local; 560 ts->name = NULL; 561 ts++; 562 ts->base_type = type; 563 ts->type = TCG_TYPE_I32; 564 ts->temp_allocated = 1; 565 ts->temp_local = temp_local; 566 ts->name = NULL; 567 s->nb_temps += 2; 568 } else 569 #endif 570 { 571 tcg_temp_alloc(s, s->nb_temps + 1); 572 ts = &s->temps[s->nb_temps]; 573 ts->base_type = type; 574 ts->type = type; 575 ts->temp_allocated = 1; 576 ts->temp_local = temp_local; 577 ts->name = NULL; 578 s->nb_temps++; 579 } 580 } 581 582 #if defined(CONFIG_DEBUG_TCG) 583 s->temps_in_use++; 584 #endif 585 return idx; 586 } 587 588 TCGv_i32 tcg_temp_new_internal_i32(int temp_local) 589 { 590 int idx; 591 592 idx = tcg_temp_new_internal(TCG_TYPE_I32, temp_local); 593 return MAKE_TCGV_I32(idx); 594 } 595 596 TCGv_i64 tcg_temp_new_internal_i64(int temp_local) 597 { 598 int idx; 599 600 idx = tcg_temp_new_internal(TCG_TYPE_I64, temp_local); 601 return MAKE_TCGV_I64(idx); 602 } 603 604 static void tcg_temp_free_internal(int idx) 605 { 606 TCGContext *s = &tcg_ctx; 607 TCGTemp *ts; 608 int k; 609 610 #if defined(CONFIG_DEBUG_TCG) 611 s->temps_in_use--; 612 if (s->temps_in_use < 0) { 613 fprintf(stderr, "More temporaries freed than allocated!\n"); 614 } 615 #endif 616 617 assert(idx >= s->nb_globals && idx < s->nb_temps); 618 ts = &s->temps[idx]; 619 assert(ts->temp_allocated != 0); 620 ts->temp_allocated = 0; 621 622 k = ts->base_type + (ts->temp_local ? TCG_TYPE_COUNT : 0); 623 set_bit(idx, s->free_temps[k].l); 624 } 625 626 void tcg_temp_free_i32(TCGv_i32 arg) 627 { 628 tcg_temp_free_internal(GET_TCGV_I32(arg)); 629 } 630 631 void tcg_temp_free_i64(TCGv_i64 arg) 632 { 633 tcg_temp_free_internal(GET_TCGV_I64(arg)); 634 } 635 636 TCGv_i32 tcg_const_i32(int32_t val) 637 { 638 TCGv_i32 t0; 639 t0 = tcg_temp_new_i32(); 640 tcg_gen_movi_i32(t0, val); 641 return t0; 642 } 643 644 TCGv_i64 tcg_const_i64(int64_t val) 645 { 646 TCGv_i64 t0; 647 t0 = tcg_temp_new_i64(); 648 tcg_gen_movi_i64(t0, val); 649 return t0; 650 } 651 652 TCGv_i32 tcg_const_local_i32(int32_t val) 653 { 654 TCGv_i32 t0; 655 t0 = tcg_temp_local_new_i32(); 656 tcg_gen_movi_i32(t0, val); 657 return t0; 658 } 659 660 TCGv_i64 tcg_const_local_i64(int64_t val) 661 { 662 TCGv_i64 t0; 663 t0 = tcg_temp_local_new_i64(); 664 tcg_gen_movi_i64(t0, val); 665 return t0; 666 } 667 668 #if defined(CONFIG_DEBUG_TCG) 669 void tcg_clear_temp_count(void) 670 { 671 TCGContext *s = &tcg_ctx; 672 s->temps_in_use = 0; 673 } 674 675 int tcg_check_temp_count(void) 676 { 677 TCGContext *s = &tcg_ctx; 678 if (s->temps_in_use) { 679 /* Clear the count so that we don't give another 680 * warning immediately next time around. 681 */ 682 s->temps_in_use = 0; 683 return 1; 684 } 685 return 0; 686 } 687 #endif 688 689 /* Note: we convert the 64 bit args to 32 bit and do some alignment 690 and endian swap. Maybe it would be better to do the alignment 691 and endian swap in tcg_reg_alloc_call(). */ 692 void tcg_gen_callN(TCGContext *s, void *func, TCGArg ret, 693 int nargs, TCGArg *args) 694 { 695 int i, real_args, nb_rets, pi, pi_first; 696 unsigned sizemask, flags; 697 TCGHelperInfo *info; 698 699 info = g_hash_table_lookup(s->helpers, (gpointer)func); 700 flags = info->flags; 701 sizemask = info->sizemask; 702 703 #if defined(__sparc__) && !defined(__arch64__) \ 704 && !defined(CONFIG_TCG_INTERPRETER) 705 /* We have 64-bit values in one register, but need to pass as two 706 separate parameters. Split them. */ 707 int orig_sizemask = sizemask; 708 int orig_nargs = nargs; 709 TCGv_i64 retl, reth; 710 711 TCGV_UNUSED_I64(retl); 712 TCGV_UNUSED_I64(reth); 713 if (sizemask != 0) { 714 TCGArg *split_args = __builtin_alloca(sizeof(TCGArg) * nargs * 2); 715 for (i = real_args = 0; i < nargs; ++i) { 716 int is_64bit = sizemask & (1 << (i+1)*2); 717 if (is_64bit) { 718 TCGv_i64 orig = MAKE_TCGV_I64(args[i]); 719 TCGv_i32 h = tcg_temp_new_i32(); 720 TCGv_i32 l = tcg_temp_new_i32(); 721 tcg_gen_extr_i64_i32(l, h, orig); 722 split_args[real_args++] = GET_TCGV_I32(h); 723 split_args[real_args++] = GET_TCGV_I32(l); 724 } else { 725 split_args[real_args++] = args[i]; 726 } 727 } 728 nargs = real_args; 729 args = split_args; 730 sizemask = 0; 731 } 732 #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64 733 for (i = 0; i < nargs; ++i) { 734 int is_64bit = sizemask & (1 << (i+1)*2); 735 int is_signed = sizemask & (2 << (i+1)*2); 736 if (!is_64bit) { 737 TCGv_i64 temp = tcg_temp_new_i64(); 738 TCGv_i64 orig = MAKE_TCGV_I64(args[i]); 739 if (is_signed) { 740 tcg_gen_ext32s_i64(temp, orig); 741 } else { 742 tcg_gen_ext32u_i64(temp, orig); 743 } 744 args[i] = GET_TCGV_I64(temp); 745 } 746 } 747 #endif /* TCG_TARGET_EXTEND_ARGS */ 748 749 pi_first = pi = s->gen_next_parm_idx; 750 if (ret != TCG_CALL_DUMMY_ARG) { 751 #if defined(__sparc__) && !defined(__arch64__) \ 752 && !defined(CONFIG_TCG_INTERPRETER) 753 if (orig_sizemask & 1) { 754 /* The 32-bit ABI is going to return the 64-bit value in 755 the %o0/%o1 register pair. Prepare for this by using 756 two return temporaries, and reassemble below. */ 757 retl = tcg_temp_new_i64(); 758 reth = tcg_temp_new_i64(); 759 s->gen_opparam_buf[pi++] = GET_TCGV_I64(reth); 760 s->gen_opparam_buf[pi++] = GET_TCGV_I64(retl); 761 nb_rets = 2; 762 } else { 763 s->gen_opparam_buf[pi++] = ret; 764 nb_rets = 1; 765 } 766 #else 767 if (TCG_TARGET_REG_BITS < 64 && (sizemask & 1)) { 768 #ifdef HOST_WORDS_BIGENDIAN 769 s->gen_opparam_buf[pi++] = ret + 1; 770 s->gen_opparam_buf[pi++] = ret; 771 #else 772 s->gen_opparam_buf[pi++] = ret; 773 s->gen_opparam_buf[pi++] = ret + 1; 774 #endif 775 nb_rets = 2; 776 } else { 777 s->gen_opparam_buf[pi++] = ret; 778 nb_rets = 1; 779 } 780 #endif 781 } else { 782 nb_rets = 0; 783 } 784 real_args = 0; 785 for (i = 0; i < nargs; i++) { 786 int is_64bit = sizemask & (1 << (i+1)*2); 787 if (TCG_TARGET_REG_BITS < 64 && is_64bit) { 788 #ifdef TCG_TARGET_CALL_ALIGN_ARGS 789 /* some targets want aligned 64 bit args */ 790 if (real_args & 1) { 791 s->gen_opparam_buf[pi++] = TCG_CALL_DUMMY_ARG; 792 real_args++; 793 } 794 #endif 795 /* If stack grows up, then we will be placing successive 796 arguments at lower addresses, which means we need to 797 reverse the order compared to how we would normally 798 treat either big or little-endian. For those arguments 799 that will wind up in registers, this still works for 800 HPPA (the only current STACK_GROWSUP target) since the 801 argument registers are *also* allocated in decreasing 802 order. If another such target is added, this logic may 803 have to get more complicated to differentiate between 804 stack arguments and register arguments. */ 805 #if defined(HOST_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP) 806 s->gen_opparam_buf[pi++] = args[i] + 1; 807 s->gen_opparam_buf[pi++] = args[i]; 808 #else 809 s->gen_opparam_buf[pi++] = args[i]; 810 s->gen_opparam_buf[pi++] = args[i] + 1; 811 #endif 812 real_args += 2; 813 continue; 814 } 815 816 s->gen_opparam_buf[pi++] = args[i]; 817 real_args++; 818 } 819 s->gen_opparam_buf[pi++] = (uintptr_t)func; 820 s->gen_opparam_buf[pi++] = flags; 821 822 i = s->gen_next_op_idx; 823 tcg_debug_assert(i < OPC_BUF_SIZE); 824 tcg_debug_assert(pi <= OPPARAM_BUF_SIZE); 825 826 /* Set links for sequential allocation during translation. */ 827 s->gen_op_buf[i] = (TCGOp){ 828 .opc = INDEX_op_call, 829 .callo = nb_rets, 830 .calli = real_args, 831 .args = pi_first, 832 .prev = i - 1, 833 .next = i + 1 834 }; 835 836 /* Make sure the calli field didn't overflow. */ 837 tcg_debug_assert(s->gen_op_buf[i].calli == real_args); 838 839 s->gen_last_op_idx = i; 840 s->gen_next_op_idx = i + 1; 841 s->gen_next_parm_idx = pi; 842 843 #if defined(__sparc__) && !defined(__arch64__) \ 844 && !defined(CONFIG_TCG_INTERPRETER) 845 /* Free all of the parts we allocated above. */ 846 for (i = real_args = 0; i < orig_nargs; ++i) { 847 int is_64bit = orig_sizemask & (1 << (i+1)*2); 848 if (is_64bit) { 849 TCGv_i32 h = MAKE_TCGV_I32(args[real_args++]); 850 TCGv_i32 l = MAKE_TCGV_I32(args[real_args++]); 851 tcg_temp_free_i32(h); 852 tcg_temp_free_i32(l); 853 } else { 854 real_args++; 855 } 856 } 857 if (orig_sizemask & 1) { 858 /* The 32-bit ABI returned two 32-bit pieces. Re-assemble them. 859 Note that describing these as TCGv_i64 eliminates an unnecessary 860 zero-extension that tcg_gen_concat_i32_i64 would create. */ 861 tcg_gen_concat32_i64(MAKE_TCGV_I64(ret), retl, reth); 862 tcg_temp_free_i64(retl); 863 tcg_temp_free_i64(reth); 864 } 865 #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64 866 for (i = 0; i < nargs; ++i) { 867 int is_64bit = sizemask & (1 << (i+1)*2); 868 if (!is_64bit) { 869 TCGv_i64 temp = MAKE_TCGV_I64(args[i]); 870 tcg_temp_free_i64(temp); 871 } 872 } 873 #endif /* TCG_TARGET_EXTEND_ARGS */ 874 } 875 876 static void tcg_reg_alloc_start(TCGContext *s) 877 { 878 int i; 879 TCGTemp *ts; 880 for(i = 0; i < s->nb_globals; i++) { 881 ts = &s->temps[i]; 882 if (ts->fixed_reg) { 883 ts->val_type = TEMP_VAL_REG; 884 } else { 885 ts->val_type = TEMP_VAL_MEM; 886 } 887 } 888 for(i = s->nb_globals; i < s->nb_temps; i++) { 889 ts = &s->temps[i]; 890 if (ts->temp_local) { 891 ts->val_type = TEMP_VAL_MEM; 892 } else { 893 ts->val_type = TEMP_VAL_DEAD; 894 } 895 ts->mem_allocated = 0; 896 ts->fixed_reg = 0; 897 } 898 for(i = 0; i < TCG_TARGET_NB_REGS; i++) { 899 s->reg_to_temp[i] = -1; 900 } 901 } 902 903 static char *tcg_get_arg_str_idx(TCGContext *s, char *buf, int buf_size, 904 int idx) 905 { 906 TCGTemp *ts; 907 908 assert(idx >= 0 && idx < s->nb_temps); 909 ts = &s->temps[idx]; 910 if (idx < s->nb_globals) { 911 pstrcpy(buf, buf_size, ts->name); 912 } else { 913 if (ts->temp_local) 914 snprintf(buf, buf_size, "loc%d", idx - s->nb_globals); 915 else 916 snprintf(buf, buf_size, "tmp%d", idx - s->nb_globals); 917 } 918 return buf; 919 } 920 921 char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg) 922 { 923 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I32(arg)); 924 } 925 926 char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg) 927 { 928 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I64(arg)); 929 } 930 931 /* Find helper name. */ 932 static inline const char *tcg_find_helper(TCGContext *s, uintptr_t val) 933 { 934 const char *ret = NULL; 935 if (s->helpers) { 936 TCGHelperInfo *info = g_hash_table_lookup(s->helpers, (gpointer)val); 937 if (info) { 938 ret = info->name; 939 } 940 } 941 return ret; 942 } 943 944 static const char * const cond_name[] = 945 { 946 [TCG_COND_NEVER] = "never", 947 [TCG_COND_ALWAYS] = "always", 948 [TCG_COND_EQ] = "eq", 949 [TCG_COND_NE] = "ne", 950 [TCG_COND_LT] = "lt", 951 [TCG_COND_GE] = "ge", 952 [TCG_COND_LE] = "le", 953 [TCG_COND_GT] = "gt", 954 [TCG_COND_LTU] = "ltu", 955 [TCG_COND_GEU] = "geu", 956 [TCG_COND_LEU] = "leu", 957 [TCG_COND_GTU] = "gtu" 958 }; 959 960 static const char * const ldst_name[] = 961 { 962 [MO_UB] = "ub", 963 [MO_SB] = "sb", 964 [MO_LEUW] = "leuw", 965 [MO_LESW] = "lesw", 966 [MO_LEUL] = "leul", 967 [MO_LESL] = "lesl", 968 [MO_LEQ] = "leq", 969 [MO_BEUW] = "beuw", 970 [MO_BESW] = "besw", 971 [MO_BEUL] = "beul", 972 [MO_BESL] = "besl", 973 [MO_BEQ] = "beq", 974 }; 975 976 void tcg_dump_ops(TCGContext *s) 977 { 978 char buf[128]; 979 TCGOp *op; 980 int oi; 981 982 for (oi = s->gen_first_op_idx; oi >= 0; oi = op->next) { 983 int i, k, nb_oargs, nb_iargs, nb_cargs; 984 const TCGOpDef *def; 985 const TCGArg *args; 986 TCGOpcode c; 987 988 op = &s->gen_op_buf[oi]; 989 c = op->opc; 990 def = &tcg_op_defs[c]; 991 args = &s->gen_opparam_buf[op->args]; 992 993 if (c == INDEX_op_debug_insn_start) { 994 uint64_t pc; 995 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS 996 pc = ((uint64_t)args[1] << 32) | args[0]; 997 #else 998 pc = args[0]; 999 #endif 1000 if (oi != s->gen_first_op_idx) { 1001 qemu_log("\n"); 1002 } 1003 qemu_log(" ---- 0x%" PRIx64, pc); 1004 } else if (c == INDEX_op_call) { 1005 /* variable number of arguments */ 1006 nb_oargs = op->callo; 1007 nb_iargs = op->calli; 1008 nb_cargs = def->nb_cargs; 1009 1010 /* function name, flags, out args */ 1011 qemu_log(" %s %s,$0x%" TCG_PRIlx ",$%d", def->name, 1012 tcg_find_helper(s, args[nb_oargs + nb_iargs]), 1013 args[nb_oargs + nb_iargs + 1], nb_oargs); 1014 for (i = 0; i < nb_oargs; i++) { 1015 qemu_log(",%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), 1016 args[i])); 1017 } 1018 for (i = 0; i < nb_iargs; i++) { 1019 TCGArg arg = args[nb_oargs + i]; 1020 const char *t = "<dummy>"; 1021 if (arg != TCG_CALL_DUMMY_ARG) { 1022 t = tcg_get_arg_str_idx(s, buf, sizeof(buf), arg); 1023 } 1024 qemu_log(",%s", t); 1025 } 1026 } else { 1027 qemu_log(" %s ", def->name); 1028 1029 nb_oargs = def->nb_oargs; 1030 nb_iargs = def->nb_iargs; 1031 nb_cargs = def->nb_cargs; 1032 1033 k = 0; 1034 for (i = 0; i < nb_oargs; i++) { 1035 if (k != 0) { 1036 qemu_log(","); 1037 } 1038 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), 1039 args[k++])); 1040 } 1041 for (i = 0; i < nb_iargs; i++) { 1042 if (k != 0) { 1043 qemu_log(","); 1044 } 1045 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), 1046 args[k++])); 1047 } 1048 switch (c) { 1049 case INDEX_op_brcond_i32: 1050 case INDEX_op_setcond_i32: 1051 case INDEX_op_movcond_i32: 1052 case INDEX_op_brcond2_i32: 1053 case INDEX_op_setcond2_i32: 1054 case INDEX_op_brcond_i64: 1055 case INDEX_op_setcond_i64: 1056 case INDEX_op_movcond_i64: 1057 if (args[k] < ARRAY_SIZE(cond_name) && cond_name[args[k]]) { 1058 qemu_log(",%s", cond_name[args[k++]]); 1059 } else { 1060 qemu_log(",$0x%" TCG_PRIlx, args[k++]); 1061 } 1062 i = 1; 1063 break; 1064 case INDEX_op_qemu_ld_i32: 1065 case INDEX_op_qemu_st_i32: 1066 case INDEX_op_qemu_ld_i64: 1067 case INDEX_op_qemu_st_i64: 1068 { 1069 TCGMemOpIdx oi = args[k++]; 1070 TCGMemOp op = get_memop(oi); 1071 unsigned ix = get_mmuidx(oi); 1072 1073 if (op & ~(MO_AMASK | MO_BSWAP | MO_SSIZE)) { 1074 qemu_log(",$0x%x,%u", op, ix); 1075 } else { 1076 const char *s_al = "", *s_op; 1077 if (op & MO_AMASK) { 1078 if ((op & MO_AMASK) == MO_ALIGN) { 1079 s_al = "al+"; 1080 } else { 1081 s_al = "un+"; 1082 } 1083 } 1084 s_op = ldst_name[op & (MO_BSWAP | MO_SSIZE)]; 1085 qemu_log(",%s%s,%u", s_al, s_op, ix); 1086 } 1087 i = 1; 1088 } 1089 break; 1090 default: 1091 i = 0; 1092 break; 1093 } 1094 switch (c) { 1095 case INDEX_op_set_label: 1096 case INDEX_op_br: 1097 case INDEX_op_brcond_i32: 1098 case INDEX_op_brcond_i64: 1099 case INDEX_op_brcond2_i32: 1100 qemu_log("%s$L%d", k ? "," : "", arg_label(args[k])->id); 1101 i++, k++; 1102 break; 1103 default: 1104 break; 1105 } 1106 for (; i < nb_cargs; i++, k++) { 1107 qemu_log("%s$0x%" TCG_PRIlx, k ? "," : "", args[k]); 1108 } 1109 } 1110 qemu_log("\n"); 1111 } 1112 } 1113 1114 /* we give more priority to constraints with less registers */ 1115 static int get_constraint_priority(const TCGOpDef *def, int k) 1116 { 1117 const TCGArgConstraint *arg_ct; 1118 1119 int i, n; 1120 arg_ct = &def->args_ct[k]; 1121 if (arg_ct->ct & TCG_CT_ALIAS) { 1122 /* an alias is equivalent to a single register */ 1123 n = 1; 1124 } else { 1125 if (!(arg_ct->ct & TCG_CT_REG)) 1126 return 0; 1127 n = 0; 1128 for(i = 0; i < TCG_TARGET_NB_REGS; i++) { 1129 if (tcg_regset_test_reg(arg_ct->u.regs, i)) 1130 n++; 1131 } 1132 } 1133 return TCG_TARGET_NB_REGS - n + 1; 1134 } 1135 1136 /* sort from highest priority to lowest */ 1137 static void sort_constraints(TCGOpDef *def, int start, int n) 1138 { 1139 int i, j, p1, p2, tmp; 1140 1141 for(i = 0; i < n; i++) 1142 def->sorted_args[start + i] = start + i; 1143 if (n <= 1) 1144 return; 1145 for(i = 0; i < n - 1; i++) { 1146 for(j = i + 1; j < n; j++) { 1147 p1 = get_constraint_priority(def, def->sorted_args[start + i]); 1148 p2 = get_constraint_priority(def, def->sorted_args[start + j]); 1149 if (p1 < p2) { 1150 tmp = def->sorted_args[start + i]; 1151 def->sorted_args[start + i] = def->sorted_args[start + j]; 1152 def->sorted_args[start + j] = tmp; 1153 } 1154 } 1155 } 1156 } 1157 1158 void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs) 1159 { 1160 TCGOpcode op; 1161 TCGOpDef *def; 1162 const char *ct_str; 1163 int i, nb_args; 1164 1165 for(;;) { 1166 if (tdefs->op == (TCGOpcode)-1) 1167 break; 1168 op = tdefs->op; 1169 assert((unsigned)op < NB_OPS); 1170 def = &tcg_op_defs[op]; 1171 #if defined(CONFIG_DEBUG_TCG) 1172 /* Duplicate entry in op definitions? */ 1173 assert(!def->used); 1174 def->used = 1; 1175 #endif 1176 nb_args = def->nb_iargs + def->nb_oargs; 1177 for(i = 0; i < nb_args; i++) { 1178 ct_str = tdefs->args_ct_str[i]; 1179 /* Incomplete TCGTargetOpDef entry? */ 1180 assert(ct_str != NULL); 1181 tcg_regset_clear(def->args_ct[i].u.regs); 1182 def->args_ct[i].ct = 0; 1183 if (ct_str[0] >= '0' && ct_str[0] <= '9') { 1184 int oarg; 1185 oarg = ct_str[0] - '0'; 1186 assert(oarg < def->nb_oargs); 1187 assert(def->args_ct[oarg].ct & TCG_CT_REG); 1188 /* TCG_CT_ALIAS is for the output arguments. The input 1189 argument is tagged with TCG_CT_IALIAS. */ 1190 def->args_ct[i] = def->args_ct[oarg]; 1191 def->args_ct[oarg].ct = TCG_CT_ALIAS; 1192 def->args_ct[oarg].alias_index = i; 1193 def->args_ct[i].ct |= TCG_CT_IALIAS; 1194 def->args_ct[i].alias_index = oarg; 1195 } else { 1196 for(;;) { 1197 if (*ct_str == '\0') 1198 break; 1199 switch(*ct_str) { 1200 case 'i': 1201 def->args_ct[i].ct |= TCG_CT_CONST; 1202 ct_str++; 1203 break; 1204 default: 1205 if (target_parse_constraint(&def->args_ct[i], &ct_str) < 0) { 1206 fprintf(stderr, "Invalid constraint '%s' for arg %d of operation '%s'\n", 1207 ct_str, i, def->name); 1208 exit(1); 1209 } 1210 } 1211 } 1212 } 1213 } 1214 1215 /* TCGTargetOpDef entry with too much information? */ 1216 assert(i == TCG_MAX_OP_ARGS || tdefs->args_ct_str[i] == NULL); 1217 1218 /* sort the constraints (XXX: this is just an heuristic) */ 1219 sort_constraints(def, 0, def->nb_oargs); 1220 sort_constraints(def, def->nb_oargs, def->nb_iargs); 1221 1222 #if 0 1223 { 1224 int i; 1225 1226 printf("%s: sorted=", def->name); 1227 for(i = 0; i < def->nb_oargs + def->nb_iargs; i++) 1228 printf(" %d", def->sorted_args[i]); 1229 printf("\n"); 1230 } 1231 #endif 1232 tdefs++; 1233 } 1234 1235 #if defined(CONFIG_DEBUG_TCG) 1236 i = 0; 1237 for (op = 0; op < tcg_op_defs_max; op++) { 1238 const TCGOpDef *def = &tcg_op_defs[op]; 1239 if (def->flags & TCG_OPF_NOT_PRESENT) { 1240 /* Wrong entry in op definitions? */ 1241 if (def->used) { 1242 fprintf(stderr, "Invalid op definition for %s\n", def->name); 1243 i = 1; 1244 } 1245 } else { 1246 /* Missing entry in op definitions? */ 1247 if (!def->used) { 1248 fprintf(stderr, "Missing op definition for %s\n", def->name); 1249 i = 1; 1250 } 1251 } 1252 } 1253 if (i == 1) { 1254 tcg_abort(); 1255 } 1256 #endif 1257 } 1258 1259 void tcg_op_remove(TCGContext *s, TCGOp *op) 1260 { 1261 int next = op->next; 1262 int prev = op->prev; 1263 1264 if (next >= 0) { 1265 s->gen_op_buf[next].prev = prev; 1266 } else { 1267 s->gen_last_op_idx = prev; 1268 } 1269 if (prev >= 0) { 1270 s->gen_op_buf[prev].next = next; 1271 } else { 1272 s->gen_first_op_idx = next; 1273 } 1274 1275 memset(op, -1, sizeof(*op)); 1276 1277 #ifdef CONFIG_PROFILER 1278 s->del_op_count++; 1279 #endif 1280 } 1281 1282 #ifdef USE_LIVENESS_ANALYSIS 1283 /* liveness analysis: end of function: all temps are dead, and globals 1284 should be in memory. */ 1285 static inline void tcg_la_func_end(TCGContext *s, uint8_t *dead_temps, 1286 uint8_t *mem_temps) 1287 { 1288 memset(dead_temps, 1, s->nb_temps); 1289 memset(mem_temps, 1, s->nb_globals); 1290 memset(mem_temps + s->nb_globals, 0, s->nb_temps - s->nb_globals); 1291 } 1292 1293 /* liveness analysis: end of basic block: all temps are dead, globals 1294 and local temps should be in memory. */ 1295 static inline void tcg_la_bb_end(TCGContext *s, uint8_t *dead_temps, 1296 uint8_t *mem_temps) 1297 { 1298 int i; 1299 1300 memset(dead_temps, 1, s->nb_temps); 1301 memset(mem_temps, 1, s->nb_globals); 1302 for(i = s->nb_globals; i < s->nb_temps; i++) { 1303 mem_temps[i] = s->temps[i].temp_local; 1304 } 1305 } 1306 1307 /* Liveness analysis : update the opc_dead_args array to tell if a 1308 given input arguments is dead. Instructions updating dead 1309 temporaries are removed. */ 1310 static void tcg_liveness_analysis(TCGContext *s) 1311 { 1312 uint8_t *dead_temps, *mem_temps; 1313 int oi, oi_prev, nb_ops; 1314 1315 nb_ops = s->gen_next_op_idx; 1316 s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t)); 1317 s->op_sync_args = tcg_malloc(nb_ops * sizeof(uint8_t)); 1318 1319 dead_temps = tcg_malloc(s->nb_temps); 1320 mem_temps = tcg_malloc(s->nb_temps); 1321 tcg_la_func_end(s, dead_temps, mem_temps); 1322 1323 for (oi = s->gen_last_op_idx; oi >= 0; oi = oi_prev) { 1324 int i, nb_iargs, nb_oargs; 1325 TCGOpcode opc_new, opc_new2; 1326 bool have_opc_new2; 1327 uint16_t dead_args; 1328 uint8_t sync_args; 1329 TCGArg arg; 1330 1331 TCGOp * const op = &s->gen_op_buf[oi]; 1332 TCGArg * const args = &s->gen_opparam_buf[op->args]; 1333 TCGOpcode opc = op->opc; 1334 const TCGOpDef *def = &tcg_op_defs[opc]; 1335 1336 oi_prev = op->prev; 1337 1338 switch (opc) { 1339 case INDEX_op_call: 1340 { 1341 int call_flags; 1342 1343 nb_oargs = op->callo; 1344 nb_iargs = op->calli; 1345 call_flags = args[nb_oargs + nb_iargs + 1]; 1346 1347 /* pure functions can be removed if their result is unused */ 1348 if (call_flags & TCG_CALL_NO_SIDE_EFFECTS) { 1349 for (i = 0; i < nb_oargs; i++) { 1350 arg = args[i]; 1351 if (!dead_temps[arg] || mem_temps[arg]) { 1352 goto do_not_remove_call; 1353 } 1354 } 1355 goto do_remove; 1356 } else { 1357 do_not_remove_call: 1358 1359 /* output args are dead */ 1360 dead_args = 0; 1361 sync_args = 0; 1362 for (i = 0; i < nb_oargs; i++) { 1363 arg = args[i]; 1364 if (dead_temps[arg]) { 1365 dead_args |= (1 << i); 1366 } 1367 if (mem_temps[arg]) { 1368 sync_args |= (1 << i); 1369 } 1370 dead_temps[arg] = 1; 1371 mem_temps[arg] = 0; 1372 } 1373 1374 if (!(call_flags & TCG_CALL_NO_READ_GLOBALS)) { 1375 /* globals should be synced to memory */ 1376 memset(mem_temps, 1, s->nb_globals); 1377 } 1378 if (!(call_flags & (TCG_CALL_NO_WRITE_GLOBALS | 1379 TCG_CALL_NO_READ_GLOBALS))) { 1380 /* globals should go back to memory */ 1381 memset(dead_temps, 1, s->nb_globals); 1382 } 1383 1384 /* record arguments that die in this helper */ 1385 for (i = nb_oargs; i < nb_iargs + nb_oargs; i++) { 1386 arg = args[i]; 1387 if (arg != TCG_CALL_DUMMY_ARG) { 1388 if (dead_temps[arg]) { 1389 dead_args |= (1 << i); 1390 } 1391 } 1392 } 1393 /* input arguments are live for preceding opcodes */ 1394 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) { 1395 arg = args[i]; 1396 dead_temps[arg] = 0; 1397 } 1398 s->op_dead_args[oi] = dead_args; 1399 s->op_sync_args[oi] = sync_args; 1400 } 1401 } 1402 break; 1403 case INDEX_op_debug_insn_start: 1404 break; 1405 case INDEX_op_discard: 1406 /* mark the temporary as dead */ 1407 dead_temps[args[0]] = 1; 1408 mem_temps[args[0]] = 0; 1409 break; 1410 1411 case INDEX_op_add2_i32: 1412 opc_new = INDEX_op_add_i32; 1413 goto do_addsub2; 1414 case INDEX_op_sub2_i32: 1415 opc_new = INDEX_op_sub_i32; 1416 goto do_addsub2; 1417 case INDEX_op_add2_i64: 1418 opc_new = INDEX_op_add_i64; 1419 goto do_addsub2; 1420 case INDEX_op_sub2_i64: 1421 opc_new = INDEX_op_sub_i64; 1422 do_addsub2: 1423 nb_iargs = 4; 1424 nb_oargs = 2; 1425 /* Test if the high part of the operation is dead, but not 1426 the low part. The result can be optimized to a simple 1427 add or sub. This happens often for x86_64 guest when the 1428 cpu mode is set to 32 bit. */ 1429 if (dead_temps[args[1]] && !mem_temps[args[1]]) { 1430 if (dead_temps[args[0]] && !mem_temps[args[0]]) { 1431 goto do_remove; 1432 } 1433 /* Replace the opcode and adjust the args in place, 1434 leaving 3 unused args at the end. */ 1435 op->opc = opc = opc_new; 1436 args[1] = args[2]; 1437 args[2] = args[4]; 1438 /* Fall through and mark the single-word operation live. */ 1439 nb_iargs = 2; 1440 nb_oargs = 1; 1441 } 1442 goto do_not_remove; 1443 1444 case INDEX_op_mulu2_i32: 1445 opc_new = INDEX_op_mul_i32; 1446 opc_new2 = INDEX_op_muluh_i32; 1447 have_opc_new2 = TCG_TARGET_HAS_muluh_i32; 1448 goto do_mul2; 1449 case INDEX_op_muls2_i32: 1450 opc_new = INDEX_op_mul_i32; 1451 opc_new2 = INDEX_op_mulsh_i32; 1452 have_opc_new2 = TCG_TARGET_HAS_mulsh_i32; 1453 goto do_mul2; 1454 case INDEX_op_mulu2_i64: 1455 opc_new = INDEX_op_mul_i64; 1456 opc_new2 = INDEX_op_muluh_i64; 1457 have_opc_new2 = TCG_TARGET_HAS_muluh_i64; 1458 goto do_mul2; 1459 case INDEX_op_muls2_i64: 1460 opc_new = INDEX_op_mul_i64; 1461 opc_new2 = INDEX_op_mulsh_i64; 1462 have_opc_new2 = TCG_TARGET_HAS_mulsh_i64; 1463 goto do_mul2; 1464 do_mul2: 1465 nb_iargs = 2; 1466 nb_oargs = 2; 1467 if (dead_temps[args[1]] && !mem_temps[args[1]]) { 1468 if (dead_temps[args[0]] && !mem_temps[args[0]]) { 1469 /* Both parts of the operation are dead. */ 1470 goto do_remove; 1471 } 1472 /* The high part of the operation is dead; generate the low. */ 1473 op->opc = opc = opc_new; 1474 args[1] = args[2]; 1475 args[2] = args[3]; 1476 } else if (have_opc_new2 && dead_temps[args[0]] 1477 && !mem_temps[args[0]]) { 1478 /* The low part of the operation is dead; generate the high. */ 1479 op->opc = opc = opc_new2; 1480 args[0] = args[1]; 1481 args[1] = args[2]; 1482 args[2] = args[3]; 1483 } else { 1484 goto do_not_remove; 1485 } 1486 /* Mark the single-word operation live. */ 1487 nb_oargs = 1; 1488 goto do_not_remove; 1489 1490 default: 1491 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */ 1492 nb_iargs = def->nb_iargs; 1493 nb_oargs = def->nb_oargs; 1494 1495 /* Test if the operation can be removed because all 1496 its outputs are dead. We assume that nb_oargs == 0 1497 implies side effects */ 1498 if (!(def->flags & TCG_OPF_SIDE_EFFECTS) && nb_oargs != 0) { 1499 for (i = 0; i < nb_oargs; i++) { 1500 arg = args[i]; 1501 if (!dead_temps[arg] || mem_temps[arg]) { 1502 goto do_not_remove; 1503 } 1504 } 1505 do_remove: 1506 tcg_op_remove(s, op); 1507 } else { 1508 do_not_remove: 1509 /* output args are dead */ 1510 dead_args = 0; 1511 sync_args = 0; 1512 for (i = 0; i < nb_oargs; i++) { 1513 arg = args[i]; 1514 if (dead_temps[arg]) { 1515 dead_args |= (1 << i); 1516 } 1517 if (mem_temps[arg]) { 1518 sync_args |= (1 << i); 1519 } 1520 dead_temps[arg] = 1; 1521 mem_temps[arg] = 0; 1522 } 1523 1524 /* if end of basic block, update */ 1525 if (def->flags & TCG_OPF_BB_END) { 1526 tcg_la_bb_end(s, dead_temps, mem_temps); 1527 } else if (def->flags & TCG_OPF_SIDE_EFFECTS) { 1528 /* globals should be synced to memory */ 1529 memset(mem_temps, 1, s->nb_globals); 1530 } 1531 1532 /* record arguments that die in this opcode */ 1533 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) { 1534 arg = args[i]; 1535 if (dead_temps[arg]) { 1536 dead_args |= (1 << i); 1537 } 1538 } 1539 /* input arguments are live for preceding opcodes */ 1540 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) { 1541 arg = args[i]; 1542 dead_temps[arg] = 0; 1543 } 1544 s->op_dead_args[oi] = dead_args; 1545 s->op_sync_args[oi] = sync_args; 1546 } 1547 break; 1548 } 1549 } 1550 } 1551 #else 1552 /* dummy liveness analysis */ 1553 static void tcg_liveness_analysis(TCGContext *s) 1554 { 1555 int nb_ops; 1556 nb_ops = s->gen_opc_ptr - s->gen_opc_buf; 1557 1558 s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t)); 1559 memset(s->op_dead_args, 0, nb_ops * sizeof(uint16_t)); 1560 s->op_sync_args = tcg_malloc(nb_ops * sizeof(uint8_t)); 1561 memset(s->op_sync_args, 0, nb_ops * sizeof(uint8_t)); 1562 } 1563 #endif 1564 1565 #ifndef NDEBUG 1566 static void dump_regs(TCGContext *s) 1567 { 1568 TCGTemp *ts; 1569 int i; 1570 char buf[64]; 1571 1572 for(i = 0; i < s->nb_temps; i++) { 1573 ts = &s->temps[i]; 1574 printf(" %10s: ", tcg_get_arg_str_idx(s, buf, sizeof(buf), i)); 1575 switch(ts->val_type) { 1576 case TEMP_VAL_REG: 1577 printf("%s", tcg_target_reg_names[ts->reg]); 1578 break; 1579 case TEMP_VAL_MEM: 1580 printf("%d(%s)", (int)ts->mem_offset, tcg_target_reg_names[ts->mem_reg]); 1581 break; 1582 case TEMP_VAL_CONST: 1583 printf("$0x%" TCG_PRIlx, ts->val); 1584 break; 1585 case TEMP_VAL_DEAD: 1586 printf("D"); 1587 break; 1588 default: 1589 printf("???"); 1590 break; 1591 } 1592 printf("\n"); 1593 } 1594 1595 for(i = 0; i < TCG_TARGET_NB_REGS; i++) { 1596 if (s->reg_to_temp[i] >= 0) { 1597 printf("%s: %s\n", 1598 tcg_target_reg_names[i], 1599 tcg_get_arg_str_idx(s, buf, sizeof(buf), s->reg_to_temp[i])); 1600 } 1601 } 1602 } 1603 1604 static void check_regs(TCGContext *s) 1605 { 1606 int reg, k; 1607 TCGTemp *ts; 1608 char buf[64]; 1609 1610 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { 1611 k = s->reg_to_temp[reg]; 1612 if (k >= 0) { 1613 ts = &s->temps[k]; 1614 if (ts->val_type != TEMP_VAL_REG || 1615 ts->reg != reg) { 1616 printf("Inconsistency for register %s:\n", 1617 tcg_target_reg_names[reg]); 1618 goto fail; 1619 } 1620 } 1621 } 1622 for(k = 0; k < s->nb_temps; k++) { 1623 ts = &s->temps[k]; 1624 if (ts->val_type == TEMP_VAL_REG && 1625 !ts->fixed_reg && 1626 s->reg_to_temp[ts->reg] != k) { 1627 printf("Inconsistency for temp %s:\n", 1628 tcg_get_arg_str_idx(s, buf, sizeof(buf), k)); 1629 fail: 1630 printf("reg state:\n"); 1631 dump_regs(s); 1632 tcg_abort(); 1633 } 1634 } 1635 } 1636 #endif 1637 1638 static void temp_allocate_frame(TCGContext *s, int temp) 1639 { 1640 TCGTemp *ts; 1641 ts = &s->temps[temp]; 1642 #if !(defined(__sparc__) && TCG_TARGET_REG_BITS == 64) 1643 /* Sparc64 stack is accessed with offset of 2047 */ 1644 s->current_frame_offset = (s->current_frame_offset + 1645 (tcg_target_long)sizeof(tcg_target_long) - 1) & 1646 ~(sizeof(tcg_target_long) - 1); 1647 #endif 1648 if (s->current_frame_offset + (tcg_target_long)sizeof(tcg_target_long) > 1649 s->frame_end) { 1650 tcg_abort(); 1651 } 1652 ts->mem_offset = s->current_frame_offset; 1653 ts->mem_reg = s->frame_reg; 1654 ts->mem_allocated = 1; 1655 s->current_frame_offset += sizeof(tcg_target_long); 1656 } 1657 1658 /* sync register 'reg' by saving it to the corresponding temporary */ 1659 static inline void tcg_reg_sync(TCGContext *s, int reg) 1660 { 1661 TCGTemp *ts; 1662 int temp; 1663 1664 temp = s->reg_to_temp[reg]; 1665 ts = &s->temps[temp]; 1666 assert(ts->val_type == TEMP_VAL_REG); 1667 if (!ts->mem_coherent && !ts->fixed_reg) { 1668 if (!ts->mem_allocated) { 1669 temp_allocate_frame(s, temp); 1670 } 1671 tcg_out_st(s, ts->type, reg, ts->mem_reg, ts->mem_offset); 1672 } 1673 ts->mem_coherent = 1; 1674 } 1675 1676 /* free register 'reg' by spilling the corresponding temporary if necessary */ 1677 static void tcg_reg_free(TCGContext *s, int reg) 1678 { 1679 int temp; 1680 1681 temp = s->reg_to_temp[reg]; 1682 if (temp != -1) { 1683 tcg_reg_sync(s, reg); 1684 s->temps[temp].val_type = TEMP_VAL_MEM; 1685 s->reg_to_temp[reg] = -1; 1686 } 1687 } 1688 1689 /* Allocate a register belonging to reg1 & ~reg2 */ 1690 static int tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2) 1691 { 1692 int i, reg; 1693 TCGRegSet reg_ct; 1694 1695 tcg_regset_andnot(reg_ct, reg1, reg2); 1696 1697 /* first try free registers */ 1698 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) { 1699 reg = tcg_target_reg_alloc_order[i]; 1700 if (tcg_regset_test_reg(reg_ct, reg) && s->reg_to_temp[reg] == -1) 1701 return reg; 1702 } 1703 1704 /* XXX: do better spill choice */ 1705 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) { 1706 reg = tcg_target_reg_alloc_order[i]; 1707 if (tcg_regset_test_reg(reg_ct, reg)) { 1708 tcg_reg_free(s, reg); 1709 return reg; 1710 } 1711 } 1712 1713 tcg_abort(); 1714 } 1715 1716 /* mark a temporary as dead. */ 1717 static inline void temp_dead(TCGContext *s, int temp) 1718 { 1719 TCGTemp *ts; 1720 1721 ts = &s->temps[temp]; 1722 if (!ts->fixed_reg) { 1723 if (ts->val_type == TEMP_VAL_REG) { 1724 s->reg_to_temp[ts->reg] = -1; 1725 } 1726 if (temp < s->nb_globals || ts->temp_local) { 1727 ts->val_type = TEMP_VAL_MEM; 1728 } else { 1729 ts->val_type = TEMP_VAL_DEAD; 1730 } 1731 } 1732 } 1733 1734 /* sync a temporary to memory. 'allocated_regs' is used in case a 1735 temporary registers needs to be allocated to store a constant. */ 1736 static inline void temp_sync(TCGContext *s, int temp, TCGRegSet allocated_regs) 1737 { 1738 TCGTemp *ts; 1739 1740 ts = &s->temps[temp]; 1741 if (!ts->fixed_reg) { 1742 switch(ts->val_type) { 1743 case TEMP_VAL_CONST: 1744 ts->reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], 1745 allocated_regs); 1746 ts->val_type = TEMP_VAL_REG; 1747 s->reg_to_temp[ts->reg] = temp; 1748 ts->mem_coherent = 0; 1749 tcg_out_movi(s, ts->type, ts->reg, ts->val); 1750 /* fallthrough*/ 1751 case TEMP_VAL_REG: 1752 tcg_reg_sync(s, ts->reg); 1753 break; 1754 case TEMP_VAL_DEAD: 1755 case TEMP_VAL_MEM: 1756 break; 1757 default: 1758 tcg_abort(); 1759 } 1760 } 1761 } 1762 1763 /* save a temporary to memory. 'allocated_regs' is used in case a 1764 temporary registers needs to be allocated to store a constant. */ 1765 static inline void temp_save(TCGContext *s, int temp, TCGRegSet allocated_regs) 1766 { 1767 #ifdef USE_LIVENESS_ANALYSIS 1768 /* The liveness analysis already ensures that globals are back 1769 in memory. Keep an assert for safety. */ 1770 assert(s->temps[temp].val_type == TEMP_VAL_MEM || s->temps[temp].fixed_reg); 1771 #else 1772 temp_sync(s, temp, allocated_regs); 1773 temp_dead(s, temp); 1774 #endif 1775 } 1776 1777 /* save globals to their canonical location and assume they can be 1778 modified be the following code. 'allocated_regs' is used in case a 1779 temporary registers needs to be allocated to store a constant. */ 1780 static void save_globals(TCGContext *s, TCGRegSet allocated_regs) 1781 { 1782 int i; 1783 1784 for(i = 0; i < s->nb_globals; i++) { 1785 temp_save(s, i, allocated_regs); 1786 } 1787 } 1788 1789 /* sync globals to their canonical location and assume they can be 1790 read by the following code. 'allocated_regs' is used in case a 1791 temporary registers needs to be allocated to store a constant. */ 1792 static void sync_globals(TCGContext *s, TCGRegSet allocated_regs) 1793 { 1794 int i; 1795 1796 for (i = 0; i < s->nb_globals; i++) { 1797 #ifdef USE_LIVENESS_ANALYSIS 1798 assert(s->temps[i].val_type != TEMP_VAL_REG || s->temps[i].fixed_reg || 1799 s->temps[i].mem_coherent); 1800 #else 1801 temp_sync(s, i, allocated_regs); 1802 #endif 1803 } 1804 } 1805 1806 /* at the end of a basic block, we assume all temporaries are dead and 1807 all globals are stored at their canonical location. */ 1808 static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs) 1809 { 1810 TCGTemp *ts; 1811 int i; 1812 1813 for(i = s->nb_globals; i < s->nb_temps; i++) { 1814 ts = &s->temps[i]; 1815 if (ts->temp_local) { 1816 temp_save(s, i, allocated_regs); 1817 } else { 1818 #ifdef USE_LIVENESS_ANALYSIS 1819 /* The liveness analysis already ensures that temps are dead. 1820 Keep an assert for safety. */ 1821 assert(ts->val_type == TEMP_VAL_DEAD); 1822 #else 1823 temp_dead(s, i); 1824 #endif 1825 } 1826 } 1827 1828 save_globals(s, allocated_regs); 1829 } 1830 1831 #define IS_DEAD_ARG(n) ((dead_args >> (n)) & 1) 1832 #define NEED_SYNC_ARG(n) ((sync_args >> (n)) & 1) 1833 1834 static void tcg_reg_alloc_movi(TCGContext *s, const TCGArg *args, 1835 uint16_t dead_args, uint8_t sync_args) 1836 { 1837 TCGTemp *ots; 1838 tcg_target_ulong val; 1839 1840 ots = &s->temps[args[0]]; 1841 val = args[1]; 1842 1843 if (ots->fixed_reg) { 1844 /* for fixed registers, we do not do any constant 1845 propagation */ 1846 tcg_out_movi(s, ots->type, ots->reg, val); 1847 } else { 1848 /* The movi is not explicitly generated here */ 1849 if (ots->val_type == TEMP_VAL_REG) 1850 s->reg_to_temp[ots->reg] = -1; 1851 ots->val_type = TEMP_VAL_CONST; 1852 ots->val = val; 1853 } 1854 if (NEED_SYNC_ARG(0)) { 1855 temp_sync(s, args[0], s->reserved_regs); 1856 } 1857 if (IS_DEAD_ARG(0)) { 1858 temp_dead(s, args[0]); 1859 } 1860 } 1861 1862 static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def, 1863 const TCGArg *args, uint16_t dead_args, 1864 uint8_t sync_args) 1865 { 1866 TCGRegSet allocated_regs; 1867 TCGTemp *ts, *ots; 1868 TCGType otype, itype; 1869 1870 tcg_regset_set(allocated_regs, s->reserved_regs); 1871 ots = &s->temps[args[0]]; 1872 ts = &s->temps[args[1]]; 1873 1874 /* Note that otype != itype for no-op truncation. */ 1875 otype = ots->type; 1876 itype = ts->type; 1877 1878 /* If the source value is not in a register, and we're going to be 1879 forced to have it in a register in order to perform the copy, 1880 then copy the SOURCE value into its own register first. That way 1881 we don't have to reload SOURCE the next time it is used. */ 1882 if (((NEED_SYNC_ARG(0) || ots->fixed_reg) && ts->val_type != TEMP_VAL_REG) 1883 || ts->val_type == TEMP_VAL_MEM) { 1884 ts->reg = tcg_reg_alloc(s, tcg_target_available_regs[itype], 1885 allocated_regs); 1886 if (ts->val_type == TEMP_VAL_MEM) { 1887 tcg_out_ld(s, itype, ts->reg, ts->mem_reg, ts->mem_offset); 1888 ts->mem_coherent = 1; 1889 } else if (ts->val_type == TEMP_VAL_CONST) { 1890 tcg_out_movi(s, itype, ts->reg, ts->val); 1891 ts->mem_coherent = 0; 1892 } 1893 s->reg_to_temp[ts->reg] = args[1]; 1894 ts->val_type = TEMP_VAL_REG; 1895 } 1896 1897 if (IS_DEAD_ARG(0) && !ots->fixed_reg) { 1898 /* mov to a non-saved dead register makes no sense (even with 1899 liveness analysis disabled). */ 1900 assert(NEED_SYNC_ARG(0)); 1901 /* The code above should have moved the temp to a register. */ 1902 assert(ts->val_type == TEMP_VAL_REG); 1903 if (!ots->mem_allocated) { 1904 temp_allocate_frame(s, args[0]); 1905 } 1906 tcg_out_st(s, otype, ts->reg, ots->mem_reg, ots->mem_offset); 1907 if (IS_DEAD_ARG(1)) { 1908 temp_dead(s, args[1]); 1909 } 1910 temp_dead(s, args[0]); 1911 } else if (ts->val_type == TEMP_VAL_CONST) { 1912 /* propagate constant */ 1913 if (ots->val_type == TEMP_VAL_REG) { 1914 s->reg_to_temp[ots->reg] = -1; 1915 } 1916 ots->val_type = TEMP_VAL_CONST; 1917 ots->val = ts->val; 1918 if (IS_DEAD_ARG(1)) { 1919 temp_dead(s, args[1]); 1920 } 1921 } else { 1922 /* The code in the first if block should have moved the 1923 temp to a register. */ 1924 assert(ts->val_type == TEMP_VAL_REG); 1925 if (IS_DEAD_ARG(1) && !ts->fixed_reg && !ots->fixed_reg) { 1926 /* the mov can be suppressed */ 1927 if (ots->val_type == TEMP_VAL_REG) { 1928 s->reg_to_temp[ots->reg] = -1; 1929 } 1930 ots->reg = ts->reg; 1931 temp_dead(s, args[1]); 1932 } else { 1933 if (ots->val_type != TEMP_VAL_REG) { 1934 /* When allocating a new register, make sure to not spill the 1935 input one. */ 1936 tcg_regset_set_reg(allocated_regs, ts->reg); 1937 ots->reg = tcg_reg_alloc(s, tcg_target_available_regs[otype], 1938 allocated_regs); 1939 } 1940 tcg_out_mov(s, otype, ots->reg, ts->reg); 1941 } 1942 ots->val_type = TEMP_VAL_REG; 1943 ots->mem_coherent = 0; 1944 s->reg_to_temp[ots->reg] = args[0]; 1945 if (NEED_SYNC_ARG(0)) { 1946 tcg_reg_sync(s, ots->reg); 1947 } 1948 } 1949 } 1950 1951 static void tcg_reg_alloc_op(TCGContext *s, 1952 const TCGOpDef *def, TCGOpcode opc, 1953 const TCGArg *args, uint16_t dead_args, 1954 uint8_t sync_args) 1955 { 1956 TCGRegSet allocated_regs; 1957 int i, k, nb_iargs, nb_oargs, reg; 1958 TCGArg arg; 1959 const TCGArgConstraint *arg_ct; 1960 TCGTemp *ts; 1961 TCGArg new_args[TCG_MAX_OP_ARGS]; 1962 int const_args[TCG_MAX_OP_ARGS]; 1963 1964 nb_oargs = def->nb_oargs; 1965 nb_iargs = def->nb_iargs; 1966 1967 /* copy constants */ 1968 memcpy(new_args + nb_oargs + nb_iargs, 1969 args + nb_oargs + nb_iargs, 1970 sizeof(TCGArg) * def->nb_cargs); 1971 1972 /* satisfy input constraints */ 1973 tcg_regset_set(allocated_regs, s->reserved_regs); 1974 for(k = 0; k < nb_iargs; k++) { 1975 i = def->sorted_args[nb_oargs + k]; 1976 arg = args[i]; 1977 arg_ct = &def->args_ct[i]; 1978 ts = &s->temps[arg]; 1979 if (ts->val_type == TEMP_VAL_MEM) { 1980 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 1981 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); 1982 ts->val_type = TEMP_VAL_REG; 1983 ts->reg = reg; 1984 ts->mem_coherent = 1; 1985 s->reg_to_temp[reg] = arg; 1986 } else if (ts->val_type == TEMP_VAL_CONST) { 1987 if (tcg_target_const_match(ts->val, ts->type, arg_ct)) { 1988 /* constant is OK for instruction */ 1989 const_args[i] = 1; 1990 new_args[i] = ts->val; 1991 goto iarg_end; 1992 } else { 1993 /* need to move to a register */ 1994 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 1995 tcg_out_movi(s, ts->type, reg, ts->val); 1996 ts->val_type = TEMP_VAL_REG; 1997 ts->reg = reg; 1998 ts->mem_coherent = 0; 1999 s->reg_to_temp[reg] = arg; 2000 } 2001 } 2002 assert(ts->val_type == TEMP_VAL_REG); 2003 if (arg_ct->ct & TCG_CT_IALIAS) { 2004 if (ts->fixed_reg) { 2005 /* if fixed register, we must allocate a new register 2006 if the alias is not the same register */ 2007 if (arg != args[arg_ct->alias_index]) 2008 goto allocate_in_reg; 2009 } else { 2010 /* if the input is aliased to an output and if it is 2011 not dead after the instruction, we must allocate 2012 a new register and move it */ 2013 if (!IS_DEAD_ARG(i)) { 2014 goto allocate_in_reg; 2015 } 2016 /* check if the current register has already been allocated 2017 for another input aliased to an output */ 2018 int k2, i2; 2019 for (k2 = 0 ; k2 < k ; k2++) { 2020 i2 = def->sorted_args[nb_oargs + k2]; 2021 if ((def->args_ct[i2].ct & TCG_CT_IALIAS) && 2022 (new_args[i2] == ts->reg)) { 2023 goto allocate_in_reg; 2024 } 2025 } 2026 } 2027 } 2028 reg = ts->reg; 2029 if (tcg_regset_test_reg(arg_ct->u.regs, reg)) { 2030 /* nothing to do : the constraint is satisfied */ 2031 } else { 2032 allocate_in_reg: 2033 /* allocate a new register matching the constraint 2034 and move the temporary register into it */ 2035 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 2036 tcg_out_mov(s, ts->type, reg, ts->reg); 2037 } 2038 new_args[i] = reg; 2039 const_args[i] = 0; 2040 tcg_regset_set_reg(allocated_regs, reg); 2041 iarg_end: ; 2042 } 2043 2044 /* mark dead temporaries and free the associated registers */ 2045 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) { 2046 if (IS_DEAD_ARG(i)) { 2047 temp_dead(s, args[i]); 2048 } 2049 } 2050 2051 if (def->flags & TCG_OPF_BB_END) { 2052 tcg_reg_alloc_bb_end(s, allocated_regs); 2053 } else { 2054 if (def->flags & TCG_OPF_CALL_CLOBBER) { 2055 /* XXX: permit generic clobber register list ? */ 2056 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { 2057 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) { 2058 tcg_reg_free(s, reg); 2059 } 2060 } 2061 } 2062 if (def->flags & TCG_OPF_SIDE_EFFECTS) { 2063 /* sync globals if the op has side effects and might trigger 2064 an exception. */ 2065 sync_globals(s, allocated_regs); 2066 } 2067 2068 /* satisfy the output constraints */ 2069 tcg_regset_set(allocated_regs, s->reserved_regs); 2070 for(k = 0; k < nb_oargs; k++) { 2071 i = def->sorted_args[k]; 2072 arg = args[i]; 2073 arg_ct = &def->args_ct[i]; 2074 ts = &s->temps[arg]; 2075 if (arg_ct->ct & TCG_CT_ALIAS) { 2076 reg = new_args[arg_ct->alias_index]; 2077 } else { 2078 /* if fixed register, we try to use it */ 2079 reg = ts->reg; 2080 if (ts->fixed_reg && 2081 tcg_regset_test_reg(arg_ct->u.regs, reg)) { 2082 goto oarg_end; 2083 } 2084 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 2085 } 2086 tcg_regset_set_reg(allocated_regs, reg); 2087 /* if a fixed register is used, then a move will be done afterwards */ 2088 if (!ts->fixed_reg) { 2089 if (ts->val_type == TEMP_VAL_REG) { 2090 s->reg_to_temp[ts->reg] = -1; 2091 } 2092 ts->val_type = TEMP_VAL_REG; 2093 ts->reg = reg; 2094 /* temp value is modified, so the value kept in memory is 2095 potentially not the same */ 2096 ts->mem_coherent = 0; 2097 s->reg_to_temp[reg] = arg; 2098 } 2099 oarg_end: 2100 new_args[i] = reg; 2101 } 2102 } 2103 2104 /* emit instruction */ 2105 tcg_out_op(s, opc, new_args, const_args); 2106 2107 /* move the outputs in the correct register if needed */ 2108 for(i = 0; i < nb_oargs; i++) { 2109 ts = &s->temps[args[i]]; 2110 reg = new_args[i]; 2111 if (ts->fixed_reg && ts->reg != reg) { 2112 tcg_out_mov(s, ts->type, ts->reg, reg); 2113 } 2114 if (NEED_SYNC_ARG(i)) { 2115 tcg_reg_sync(s, reg); 2116 } 2117 if (IS_DEAD_ARG(i)) { 2118 temp_dead(s, args[i]); 2119 } 2120 } 2121 } 2122 2123 #ifdef TCG_TARGET_STACK_GROWSUP 2124 #define STACK_DIR(x) (-(x)) 2125 #else 2126 #define STACK_DIR(x) (x) 2127 #endif 2128 2129 static void tcg_reg_alloc_call(TCGContext *s, int nb_oargs, int nb_iargs, 2130 const TCGArg * const args, uint16_t dead_args, 2131 uint8_t sync_args) 2132 { 2133 int flags, nb_regs, i, reg; 2134 TCGArg arg; 2135 TCGTemp *ts; 2136 intptr_t stack_offset; 2137 size_t call_stack_size; 2138 tcg_insn_unit *func_addr; 2139 int allocate_args; 2140 TCGRegSet allocated_regs; 2141 2142 func_addr = (tcg_insn_unit *)(intptr_t)args[nb_oargs + nb_iargs]; 2143 flags = args[nb_oargs + nb_iargs + 1]; 2144 2145 nb_regs = ARRAY_SIZE(tcg_target_call_iarg_regs); 2146 if (nb_regs > nb_iargs) { 2147 nb_regs = nb_iargs; 2148 } 2149 2150 /* assign stack slots first */ 2151 call_stack_size = (nb_iargs - nb_regs) * sizeof(tcg_target_long); 2152 call_stack_size = (call_stack_size + TCG_TARGET_STACK_ALIGN - 1) & 2153 ~(TCG_TARGET_STACK_ALIGN - 1); 2154 allocate_args = (call_stack_size > TCG_STATIC_CALL_ARGS_SIZE); 2155 if (allocate_args) { 2156 /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed, 2157 preallocate call stack */ 2158 tcg_abort(); 2159 } 2160 2161 stack_offset = TCG_TARGET_CALL_STACK_OFFSET; 2162 for(i = nb_regs; i < nb_iargs; i++) { 2163 arg = args[nb_oargs + i]; 2164 #ifdef TCG_TARGET_STACK_GROWSUP 2165 stack_offset -= sizeof(tcg_target_long); 2166 #endif 2167 if (arg != TCG_CALL_DUMMY_ARG) { 2168 ts = &s->temps[arg]; 2169 if (ts->val_type == TEMP_VAL_REG) { 2170 tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_offset); 2171 } else if (ts->val_type == TEMP_VAL_MEM) { 2172 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], 2173 s->reserved_regs); 2174 /* XXX: not correct if reading values from the stack */ 2175 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); 2176 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset); 2177 } else if (ts->val_type == TEMP_VAL_CONST) { 2178 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], 2179 s->reserved_regs); 2180 /* XXX: sign extend may be needed on some targets */ 2181 tcg_out_movi(s, ts->type, reg, ts->val); 2182 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset); 2183 } else { 2184 tcg_abort(); 2185 } 2186 } 2187 #ifndef TCG_TARGET_STACK_GROWSUP 2188 stack_offset += sizeof(tcg_target_long); 2189 #endif 2190 } 2191 2192 /* assign input registers */ 2193 tcg_regset_set(allocated_regs, s->reserved_regs); 2194 for(i = 0; i < nb_regs; i++) { 2195 arg = args[nb_oargs + i]; 2196 if (arg != TCG_CALL_DUMMY_ARG) { 2197 ts = &s->temps[arg]; 2198 reg = tcg_target_call_iarg_regs[i]; 2199 tcg_reg_free(s, reg); 2200 if (ts->val_type == TEMP_VAL_REG) { 2201 if (ts->reg != reg) { 2202 tcg_out_mov(s, ts->type, reg, ts->reg); 2203 } 2204 } else if (ts->val_type == TEMP_VAL_MEM) { 2205 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); 2206 } else if (ts->val_type == TEMP_VAL_CONST) { 2207 /* XXX: sign extend ? */ 2208 tcg_out_movi(s, ts->type, reg, ts->val); 2209 } else { 2210 tcg_abort(); 2211 } 2212 tcg_regset_set_reg(allocated_regs, reg); 2213 } 2214 } 2215 2216 /* mark dead temporaries and free the associated registers */ 2217 for(i = nb_oargs; i < nb_iargs + nb_oargs; i++) { 2218 if (IS_DEAD_ARG(i)) { 2219 temp_dead(s, args[i]); 2220 } 2221 } 2222 2223 /* clobber call registers */ 2224 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { 2225 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) { 2226 tcg_reg_free(s, reg); 2227 } 2228 } 2229 2230 /* Save globals if they might be written by the helper, sync them if 2231 they might be read. */ 2232 if (flags & TCG_CALL_NO_READ_GLOBALS) { 2233 /* Nothing to do */ 2234 } else if (flags & TCG_CALL_NO_WRITE_GLOBALS) { 2235 sync_globals(s, allocated_regs); 2236 } else { 2237 save_globals(s, allocated_regs); 2238 } 2239 2240 tcg_out_call(s, func_addr); 2241 2242 /* assign output registers and emit moves if needed */ 2243 for(i = 0; i < nb_oargs; i++) { 2244 arg = args[i]; 2245 ts = &s->temps[arg]; 2246 reg = tcg_target_call_oarg_regs[i]; 2247 assert(s->reg_to_temp[reg] == -1); 2248 2249 if (ts->fixed_reg) { 2250 if (ts->reg != reg) { 2251 tcg_out_mov(s, ts->type, ts->reg, reg); 2252 } 2253 } else { 2254 if (ts->val_type == TEMP_VAL_REG) { 2255 s->reg_to_temp[ts->reg] = -1; 2256 } 2257 ts->val_type = TEMP_VAL_REG; 2258 ts->reg = reg; 2259 ts->mem_coherent = 0; 2260 s->reg_to_temp[reg] = arg; 2261 if (NEED_SYNC_ARG(i)) { 2262 tcg_reg_sync(s, reg); 2263 } 2264 if (IS_DEAD_ARG(i)) { 2265 temp_dead(s, args[i]); 2266 } 2267 } 2268 } 2269 } 2270 2271 #ifdef CONFIG_PROFILER 2272 2273 static int64_t tcg_table_op_count[NB_OPS]; 2274 2275 void tcg_dump_op_count(FILE *f, fprintf_function cpu_fprintf) 2276 { 2277 int i; 2278 2279 for (i = 0; i < NB_OPS; i++) { 2280 cpu_fprintf(f, "%s %" PRId64 "\n", tcg_op_defs[i].name, 2281 tcg_table_op_count[i]); 2282 } 2283 } 2284 #else 2285 void tcg_dump_op_count(FILE *f, fprintf_function cpu_fprintf) 2286 { 2287 cpu_fprintf(f, "[TCG profiler not compiled]\n"); 2288 } 2289 #endif 2290 2291 2292 static inline int tcg_gen_code_common(TCGContext *s, 2293 tcg_insn_unit *gen_code_buf, 2294 long search_pc) 2295 { 2296 int oi, oi_next; 2297 2298 #ifdef DEBUG_DISAS 2299 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) { 2300 qemu_log("OP:\n"); 2301 tcg_dump_ops(s); 2302 qemu_log("\n"); 2303 } 2304 #endif 2305 2306 #ifdef CONFIG_PROFILER 2307 s->opt_time -= profile_getclock(); 2308 #endif 2309 2310 #ifdef USE_TCG_OPTIMIZATIONS 2311 tcg_optimize(s); 2312 #endif 2313 2314 #ifdef CONFIG_PROFILER 2315 s->opt_time += profile_getclock(); 2316 s->la_time -= profile_getclock(); 2317 #endif 2318 2319 tcg_liveness_analysis(s); 2320 2321 #ifdef CONFIG_PROFILER 2322 s->la_time += profile_getclock(); 2323 #endif 2324 2325 #ifdef DEBUG_DISAS 2326 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) { 2327 qemu_log("OP after optimization and liveness analysis:\n"); 2328 tcg_dump_ops(s); 2329 qemu_log("\n"); 2330 } 2331 #endif 2332 2333 tcg_reg_alloc_start(s); 2334 2335 s->code_buf = gen_code_buf; 2336 s->code_ptr = gen_code_buf; 2337 2338 tcg_out_tb_init(s); 2339 2340 for (oi = s->gen_first_op_idx; oi >= 0; oi = oi_next) { 2341 TCGOp * const op = &s->gen_op_buf[oi]; 2342 TCGArg * const args = &s->gen_opparam_buf[op->args]; 2343 TCGOpcode opc = op->opc; 2344 const TCGOpDef *def = &tcg_op_defs[opc]; 2345 uint16_t dead_args = s->op_dead_args[oi]; 2346 uint8_t sync_args = s->op_sync_args[oi]; 2347 2348 oi_next = op->next; 2349 #ifdef CONFIG_PROFILER 2350 tcg_table_op_count[opc]++; 2351 #endif 2352 2353 switch (opc) { 2354 case INDEX_op_mov_i32: 2355 case INDEX_op_mov_i64: 2356 tcg_reg_alloc_mov(s, def, args, dead_args, sync_args); 2357 break; 2358 case INDEX_op_movi_i32: 2359 case INDEX_op_movi_i64: 2360 tcg_reg_alloc_movi(s, args, dead_args, sync_args); 2361 break; 2362 case INDEX_op_debug_insn_start: 2363 break; 2364 case INDEX_op_discard: 2365 temp_dead(s, args[0]); 2366 break; 2367 case INDEX_op_set_label: 2368 tcg_reg_alloc_bb_end(s, s->reserved_regs); 2369 tcg_out_label(s, arg_label(args[0]), s->code_ptr); 2370 break; 2371 case INDEX_op_call: 2372 tcg_reg_alloc_call(s, op->callo, op->calli, args, 2373 dead_args, sync_args); 2374 break; 2375 default: 2376 /* Sanity check that we've not introduced any unhandled opcodes. */ 2377 if (def->flags & TCG_OPF_NOT_PRESENT) { 2378 tcg_abort(); 2379 } 2380 /* Note: in order to speed up the code, it would be much 2381 faster to have specialized register allocator functions for 2382 some common argument patterns */ 2383 tcg_reg_alloc_op(s, def, opc, args, dead_args, sync_args); 2384 break; 2385 } 2386 if (search_pc >= 0 && search_pc < tcg_current_code_size(s)) { 2387 return oi; 2388 } 2389 #ifndef NDEBUG 2390 check_regs(s); 2391 #endif 2392 } 2393 2394 /* Generate TB finalization at the end of block */ 2395 tcg_out_tb_finalize(s); 2396 return -1; 2397 } 2398 2399 int tcg_gen_code(TCGContext *s, tcg_insn_unit *gen_code_buf) 2400 { 2401 #ifdef CONFIG_PROFILER 2402 { 2403 int n; 2404 2405 n = s->gen_last_op_idx + 1; 2406 s->op_count += n; 2407 if (n > s->op_count_max) { 2408 s->op_count_max = n; 2409 } 2410 2411 n = s->nb_temps; 2412 s->temp_count += n; 2413 if (n > s->temp_count_max) { 2414 s->temp_count_max = n; 2415 } 2416 } 2417 #endif 2418 2419 tcg_gen_code_common(s, gen_code_buf, -1); 2420 2421 /* flush instruction cache */ 2422 flush_icache_range((uintptr_t)s->code_buf, (uintptr_t)s->code_ptr); 2423 2424 return tcg_current_code_size(s); 2425 } 2426 2427 /* Return the index of the micro operation such as the pc after is < 2428 offset bytes from the start of the TB. The contents of gen_code_buf must 2429 not be changed, though writing the same values is ok. 2430 Return -1 if not found. */ 2431 int tcg_gen_code_search_pc(TCGContext *s, tcg_insn_unit *gen_code_buf, 2432 long offset) 2433 { 2434 return tcg_gen_code_common(s, gen_code_buf, offset); 2435 } 2436 2437 #ifdef CONFIG_PROFILER 2438 void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf) 2439 { 2440 TCGContext *s = &tcg_ctx; 2441 int64_t tot; 2442 2443 tot = s->interm_time + s->code_time; 2444 cpu_fprintf(f, "JIT cycles %" PRId64 " (%0.3f s at 2.4 GHz)\n", 2445 tot, tot / 2.4e9); 2446 cpu_fprintf(f, "translated TBs %" PRId64 " (aborted=%" PRId64 " %0.1f%%)\n", 2447 s->tb_count, 2448 s->tb_count1 - s->tb_count, 2449 s->tb_count1 ? (double)(s->tb_count1 - s->tb_count) / s->tb_count1 * 100.0 : 0); 2450 cpu_fprintf(f, "avg ops/TB %0.1f max=%d\n", 2451 s->tb_count ? (double)s->op_count / s->tb_count : 0, s->op_count_max); 2452 cpu_fprintf(f, "deleted ops/TB %0.2f\n", 2453 s->tb_count ? 2454 (double)s->del_op_count / s->tb_count : 0); 2455 cpu_fprintf(f, "avg temps/TB %0.2f max=%d\n", 2456 s->tb_count ? 2457 (double)s->temp_count / s->tb_count : 0, 2458 s->temp_count_max); 2459 2460 cpu_fprintf(f, "cycles/op %0.1f\n", 2461 s->op_count ? (double)tot / s->op_count : 0); 2462 cpu_fprintf(f, "cycles/in byte %0.1f\n", 2463 s->code_in_len ? (double)tot / s->code_in_len : 0); 2464 cpu_fprintf(f, "cycles/out byte %0.1f\n", 2465 s->code_out_len ? (double)tot / s->code_out_len : 0); 2466 if (tot == 0) 2467 tot = 1; 2468 cpu_fprintf(f, " gen_interm time %0.1f%%\n", 2469 (double)s->interm_time / tot * 100.0); 2470 cpu_fprintf(f, " gen_code time %0.1f%%\n", 2471 (double)s->code_time / tot * 100.0); 2472 cpu_fprintf(f, "optim./code time %0.1f%%\n", 2473 (double)s->opt_time / (s->code_time ? s->code_time : 1) 2474 * 100.0); 2475 cpu_fprintf(f, "liveness/code time %0.1f%%\n", 2476 (double)s->la_time / (s->code_time ? s->code_time : 1) * 100.0); 2477 cpu_fprintf(f, "cpu_restore count %" PRId64 "\n", 2478 s->restore_count); 2479 cpu_fprintf(f, " avg cycles %0.1f\n", 2480 s->restore_count ? (double)s->restore_time / s->restore_count : 0); 2481 } 2482 #else 2483 void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf) 2484 { 2485 cpu_fprintf(f, "[TCG profiler not compiled]\n"); 2486 } 2487 #endif 2488 2489 #ifdef ELF_HOST_MACHINE 2490 /* In order to use this feature, the backend needs to do three things: 2491 2492 (1) Define ELF_HOST_MACHINE to indicate both what value to 2493 put into the ELF image and to indicate support for the feature. 2494 2495 (2) Define tcg_register_jit. This should create a buffer containing 2496 the contents of a .debug_frame section that describes the post- 2497 prologue unwind info for the tcg machine. 2498 2499 (3) Call tcg_register_jit_int, with the constructed .debug_frame. 2500 */ 2501 2502 /* Begin GDB interface. THE FOLLOWING MUST MATCH GDB DOCS. */ 2503 typedef enum { 2504 JIT_NOACTION = 0, 2505 JIT_REGISTER_FN, 2506 JIT_UNREGISTER_FN 2507 } jit_actions_t; 2508 2509 struct jit_code_entry { 2510 struct jit_code_entry *next_entry; 2511 struct jit_code_entry *prev_entry; 2512 const void *symfile_addr; 2513 uint64_t symfile_size; 2514 }; 2515 2516 struct jit_descriptor { 2517 uint32_t version; 2518 uint32_t action_flag; 2519 struct jit_code_entry *relevant_entry; 2520 struct jit_code_entry *first_entry; 2521 }; 2522 2523 void __jit_debug_register_code(void) __attribute__((noinline)); 2524 void __jit_debug_register_code(void) 2525 { 2526 asm(""); 2527 } 2528 2529 /* Must statically initialize the version, because GDB may check 2530 the version before we can set it. */ 2531 struct jit_descriptor __jit_debug_descriptor = { 1, 0, 0, 0 }; 2532 2533 /* End GDB interface. */ 2534 2535 static int find_string(const char *strtab, const char *str) 2536 { 2537 const char *p = strtab + 1; 2538 2539 while (1) { 2540 if (strcmp(p, str) == 0) { 2541 return p - strtab; 2542 } 2543 p += strlen(p) + 1; 2544 } 2545 } 2546 2547 static void tcg_register_jit_int(void *buf_ptr, size_t buf_size, 2548 const void *debug_frame, 2549 size_t debug_frame_size) 2550 { 2551 struct __attribute__((packed)) DebugInfo { 2552 uint32_t len; 2553 uint16_t version; 2554 uint32_t abbrev; 2555 uint8_t ptr_size; 2556 uint8_t cu_die; 2557 uint16_t cu_lang; 2558 uintptr_t cu_low_pc; 2559 uintptr_t cu_high_pc; 2560 uint8_t fn_die; 2561 char fn_name[16]; 2562 uintptr_t fn_low_pc; 2563 uintptr_t fn_high_pc; 2564 uint8_t cu_eoc; 2565 }; 2566 2567 struct ElfImage { 2568 ElfW(Ehdr) ehdr; 2569 ElfW(Phdr) phdr; 2570 ElfW(Shdr) shdr[7]; 2571 ElfW(Sym) sym[2]; 2572 struct DebugInfo di; 2573 uint8_t da[24]; 2574 char str[80]; 2575 }; 2576 2577 struct ElfImage *img; 2578 2579 static const struct ElfImage img_template = { 2580 .ehdr = { 2581 .e_ident[EI_MAG0] = ELFMAG0, 2582 .e_ident[EI_MAG1] = ELFMAG1, 2583 .e_ident[EI_MAG2] = ELFMAG2, 2584 .e_ident[EI_MAG3] = ELFMAG3, 2585 .e_ident[EI_CLASS] = ELF_CLASS, 2586 .e_ident[EI_DATA] = ELF_DATA, 2587 .e_ident[EI_VERSION] = EV_CURRENT, 2588 .e_type = ET_EXEC, 2589 .e_machine = ELF_HOST_MACHINE, 2590 .e_version = EV_CURRENT, 2591 .e_phoff = offsetof(struct ElfImage, phdr), 2592 .e_shoff = offsetof(struct ElfImage, shdr), 2593 .e_ehsize = sizeof(ElfW(Shdr)), 2594 .e_phentsize = sizeof(ElfW(Phdr)), 2595 .e_phnum = 1, 2596 .e_shentsize = sizeof(ElfW(Shdr)), 2597 .e_shnum = ARRAY_SIZE(img->shdr), 2598 .e_shstrndx = ARRAY_SIZE(img->shdr) - 1, 2599 #ifdef ELF_HOST_FLAGS 2600 .e_flags = ELF_HOST_FLAGS, 2601 #endif 2602 #ifdef ELF_OSABI 2603 .e_ident[EI_OSABI] = ELF_OSABI, 2604 #endif 2605 }, 2606 .phdr = { 2607 .p_type = PT_LOAD, 2608 .p_flags = PF_X, 2609 }, 2610 .shdr = { 2611 [0] = { .sh_type = SHT_NULL }, 2612 /* Trick: The contents of code_gen_buffer are not present in 2613 this fake ELF file; that got allocated elsewhere. Therefore 2614 we mark .text as SHT_NOBITS (similar to .bss) so that readers 2615 will not look for contents. We can record any address. */ 2616 [1] = { /* .text */ 2617 .sh_type = SHT_NOBITS, 2618 .sh_flags = SHF_EXECINSTR | SHF_ALLOC, 2619 }, 2620 [2] = { /* .debug_info */ 2621 .sh_type = SHT_PROGBITS, 2622 .sh_offset = offsetof(struct ElfImage, di), 2623 .sh_size = sizeof(struct DebugInfo), 2624 }, 2625 [3] = { /* .debug_abbrev */ 2626 .sh_type = SHT_PROGBITS, 2627 .sh_offset = offsetof(struct ElfImage, da), 2628 .sh_size = sizeof(img->da), 2629 }, 2630 [4] = { /* .debug_frame */ 2631 .sh_type = SHT_PROGBITS, 2632 .sh_offset = sizeof(struct ElfImage), 2633 }, 2634 [5] = { /* .symtab */ 2635 .sh_type = SHT_SYMTAB, 2636 .sh_offset = offsetof(struct ElfImage, sym), 2637 .sh_size = sizeof(img->sym), 2638 .sh_info = 1, 2639 .sh_link = ARRAY_SIZE(img->shdr) - 1, 2640 .sh_entsize = sizeof(ElfW(Sym)), 2641 }, 2642 [6] = { /* .strtab */ 2643 .sh_type = SHT_STRTAB, 2644 .sh_offset = offsetof(struct ElfImage, str), 2645 .sh_size = sizeof(img->str), 2646 } 2647 }, 2648 .sym = { 2649 [1] = { /* code_gen_buffer */ 2650 .st_info = ELF_ST_INFO(STB_GLOBAL, STT_FUNC), 2651 .st_shndx = 1, 2652 } 2653 }, 2654 .di = { 2655 .len = sizeof(struct DebugInfo) - 4, 2656 .version = 2, 2657 .ptr_size = sizeof(void *), 2658 .cu_die = 1, 2659 .cu_lang = 0x8001, /* DW_LANG_Mips_Assembler */ 2660 .fn_die = 2, 2661 .fn_name = "code_gen_buffer" 2662 }, 2663 .da = { 2664 1, /* abbrev number (the cu) */ 2665 0x11, 1, /* DW_TAG_compile_unit, has children */ 2666 0x13, 0x5, /* DW_AT_language, DW_FORM_data2 */ 2667 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */ 2668 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */ 2669 0, 0, /* end of abbrev */ 2670 2, /* abbrev number (the fn) */ 2671 0x2e, 0, /* DW_TAG_subprogram, no children */ 2672 0x3, 0x8, /* DW_AT_name, DW_FORM_string */ 2673 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */ 2674 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */ 2675 0, 0, /* end of abbrev */ 2676 0 /* no more abbrev */ 2677 }, 2678 .str = "\0" ".text\0" ".debug_info\0" ".debug_abbrev\0" 2679 ".debug_frame\0" ".symtab\0" ".strtab\0" "code_gen_buffer", 2680 }; 2681 2682 /* We only need a single jit entry; statically allocate it. */ 2683 static struct jit_code_entry one_entry; 2684 2685 uintptr_t buf = (uintptr_t)buf_ptr; 2686 size_t img_size = sizeof(struct ElfImage) + debug_frame_size; 2687 DebugFrameHeader *dfh; 2688 2689 img = g_malloc(img_size); 2690 *img = img_template; 2691 2692 img->phdr.p_vaddr = buf; 2693 img->phdr.p_paddr = buf; 2694 img->phdr.p_memsz = buf_size; 2695 2696 img->shdr[1].sh_name = find_string(img->str, ".text"); 2697 img->shdr[1].sh_addr = buf; 2698 img->shdr[1].sh_size = buf_size; 2699 2700 img->shdr[2].sh_name = find_string(img->str, ".debug_info"); 2701 img->shdr[3].sh_name = find_string(img->str, ".debug_abbrev"); 2702 2703 img->shdr[4].sh_name = find_string(img->str, ".debug_frame"); 2704 img->shdr[4].sh_size = debug_frame_size; 2705 2706 img->shdr[5].sh_name = find_string(img->str, ".symtab"); 2707 img->shdr[6].sh_name = find_string(img->str, ".strtab"); 2708 2709 img->sym[1].st_name = find_string(img->str, "code_gen_buffer"); 2710 img->sym[1].st_value = buf; 2711 img->sym[1].st_size = buf_size; 2712 2713 img->di.cu_low_pc = buf; 2714 img->di.cu_high_pc = buf + buf_size; 2715 img->di.fn_low_pc = buf; 2716 img->di.fn_high_pc = buf + buf_size; 2717 2718 dfh = (DebugFrameHeader *)(img + 1); 2719 memcpy(dfh, debug_frame, debug_frame_size); 2720 dfh->fde.func_start = buf; 2721 dfh->fde.func_len = buf_size; 2722 2723 #ifdef DEBUG_JIT 2724 /* Enable this block to be able to debug the ELF image file creation. 2725 One can use readelf, objdump, or other inspection utilities. */ 2726 { 2727 FILE *f = fopen("/tmp/qemu.jit", "w+b"); 2728 if (f) { 2729 if (fwrite(img, img_size, 1, f) != img_size) { 2730 /* Avoid stupid unused return value warning for fwrite. */ 2731 } 2732 fclose(f); 2733 } 2734 } 2735 #endif 2736 2737 one_entry.symfile_addr = img; 2738 one_entry.symfile_size = img_size; 2739 2740 __jit_debug_descriptor.action_flag = JIT_REGISTER_FN; 2741 __jit_debug_descriptor.relevant_entry = &one_entry; 2742 __jit_debug_descriptor.first_entry = &one_entry; 2743 __jit_debug_register_code(); 2744 } 2745 #else 2746 /* No support for the feature. Provide the entry point expected by exec.c, 2747 and implement the internal function we declared earlier. */ 2748 2749 static void tcg_register_jit_int(void *buf, size_t size, 2750 const void *debug_frame, 2751 size_t debug_frame_size) 2752 { 2753 } 2754 2755 void tcg_register_jit(void *buf, size_t buf_size) 2756 { 2757 } 2758 #endif /* ELF_HOST_MACHINE */ 2759