xref: /qemu/tcg/sparc64/tcg-target-reg-bits.h (revision 903e870f2453731f9b44ce9734cfcb5509304677)
1  /* SPDX-License-Identifier: MIT */
2  /*
3   * Define target-specific register size
4   * Copyright (c) 2023 Linaro
5   */
6  
7  #ifndef TCG_TARGET_REG_BITS_H
8  #define TCG_TARGET_REG_BITS_H
9  
10  #define TCG_TARGET_REG_BITS  64
11  
12  #endif
13